1 //=- WebAssemblyMCCodeEmitter.cpp - Convert WebAssembly code to machine code -// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// \brief This file implements the WebAssemblyMCCodeEmitter class. 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" 16 #include "llvm/ADT/STLExtras.h" 17 #include "llvm/ADT/Statistic.h" 18 #include "llvm/MC/MCCodeEmitter.h" 19 #include "llvm/MC/MCFixup.h" 20 #include "llvm/MC/MCInst.h" 21 #include "llvm/MC/MCInstrInfo.h" 22 #include "llvm/MC/MCRegisterInfo.h" 23 #include "llvm/MC/MCSubtargetInfo.h" 24 #include "llvm/MC/MCSymbol.h" 25 #include "llvm/Support/EndianStream.h" 26 #include "llvm/Support/LEB128.h" 27 #include "llvm/Support/raw_ostream.h" 28 using namespace llvm; 29 30 #define DEBUG_TYPE "mccodeemitter" 31 32 STATISTIC(MCNumEmitted, "Number of MC instructions emitted."); 33 STATISTIC(MCNumFixups, "Number of MC fixups created."); 34 35 namespace { 36 class WebAssemblyMCCodeEmitter final : public MCCodeEmitter { 37 const MCInstrInfo &MCII; 38 MCContext &Ctx; 39 40 // Implementation generated by tablegen. 41 uint64_t getBinaryCodeForInstr(const MCInst &MI, 42 SmallVectorImpl<MCFixup> &Fixups, 43 const MCSubtargetInfo &STI) const; 44 45 void encodeInstruction(const MCInst &MI, raw_ostream &OS, 46 SmallVectorImpl<MCFixup> &Fixups, 47 const MCSubtargetInfo &STI) const override; 48 49 public: 50 WebAssemblyMCCodeEmitter(const MCInstrInfo &mcii, MCContext &ctx) 51 : MCII(mcii), Ctx(ctx) { 52 (void)Ctx; 53 } 54 }; 55 } // end anonymous namespace 56 57 MCCodeEmitter *llvm::createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII, 58 MCContext &Ctx) { 59 return new WebAssemblyMCCodeEmitter(MCII, Ctx); 60 } 61 62 void WebAssemblyMCCodeEmitter::encodeInstruction( 63 const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups, 64 const MCSubtargetInfo &STI) const { 65 uint64_t Start = OS.tell(); 66 67 uint64_t Binary = getBinaryCodeForInstr(MI, Fixups, STI); 68 assert(Binary < UINT8_MAX && "Multi-byte opcodes not supported yet"); 69 OS << uint8_t(Binary); 70 71 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); 72 for (unsigned i = 0, e = MI.getNumOperands(); i < e; ++i) { 73 const MCOperand &MO = MI.getOperand(i); 74 if (MO.isReg()) { 75 /* nothing to encode */ 76 } else if (MO.isImm()) { 77 if (i < Desc.getNumOperands()) { 78 assert(Desc.TSFlags == 0 && 79 "WebAssembly non-variable_ops don't use TSFlags"); 80 const MCOperandInfo &Info = Desc.OpInfo[i]; 81 if (Info.OperandType == WebAssembly::OPERAND_I32IMM) { 82 encodeSLEB128(int32_t(MO.getImm()), OS); 83 } else if (Info.OperandType == WebAssembly::OPERAND_I64IMM) { 84 encodeSLEB128(int64_t(MO.getImm()), OS); 85 } else { 86 encodeULEB128(uint64_t(MO.getImm()), OS); 87 } 88 } else { 89 assert(Desc.TSFlags == (WebAssemblyII::VariableOpIsImmediate | 90 WebAssemblyII::VariableOpImmediateIsLabel)); 91 encodeULEB128(uint64_t(MO.getImm()), OS); 92 } 93 } else if (MO.isFPImm()) { 94 assert(i < Desc.getNumOperands() && 95 "Unexpected floating-point immediate as a non-fixed operand"); 96 assert(Desc.TSFlags == 0 && 97 "WebAssembly variable_ops floating point ops don't use TSFlags"); 98 const MCOperandInfo &Info = Desc.OpInfo[i]; 99 if (Info.OperandType == WebAssembly::OPERAND_F32IMM) { 100 // TODO: MC converts all floating point immediate operands to double. 101 // This is fine for numeric values, but may cause NaNs to change bits. 102 float f = float(MO.getFPImm()); 103 support::endian::Writer<support::little>(OS).write<float>(f); 104 } else { 105 assert(Info.OperandType == WebAssembly::OPERAND_F64IMM); 106 double d = MO.getFPImm(); 107 support::endian::Writer<support::little>(OS).write<double>(d); 108 } 109 } else if (MO.isExpr()) { 110 Fixups.push_back(MCFixup::create( 111 OS.tell() - Start, MO.getExpr(), 112 STI.getTargetTriple().isArch64Bit() ? FK_Data_8 : FK_Data_4, 113 MI.getLoc())); 114 ++MCNumFixups; 115 encodeULEB128(STI.getTargetTriple().isArch64Bit() ? UINT64_MAX 116 : uint64_t(UINT32_MAX), 117 OS); 118 } else { 119 llvm_unreachable("unexpected operand kind"); 120 } 121 } 122 123 ++MCNumEmitted; // Keep track of the # of mi's emitted. 124 } 125 126 #include "WebAssemblyGenMCCodeEmitter.inc" 127