xref: /llvm-project/llvm/lib/Target/Mips/MipsMulMulBugPass.cpp (revision 73e89cf66d4b88d568ff4c718ae7bf55588ef2be)
1 //===- MipsMulMulBugPass.cpp - Mips VR4300 mulmul bugfix pass -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Early revisions of the VR4300 have a hardware bug where two consecutive
10 // multiplications can produce an incorrect result in the second multiply.
11 //
12 // This pass scans for mul instructions in each basic block and inserts
13 // a nop whenever the following conditions are met:
14 //
15 // - The current instruction is a single or double-precision floating-point
16 //   mul instruction.
17 // - The next instruction is either a mul instruction (any kind)
18 //   or a branch instruction.
19 //===----------------------------------------------------------------------===//
20 
21 #include "Mips.h"
22 #include "MipsInstrInfo.h"
23 #include "MipsSubtarget.h"
24 #include "llvm/CodeGen/MachineBasicBlock.h"
25 #include "llvm/CodeGen/MachineFunction.h"
26 #include "llvm/CodeGen/MachineFunctionPass.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Target/TargetMachine.h"
29 
30 #define DEBUG_TYPE "mips-vr4300-mulmul-fix"
31 
32 using namespace llvm;
33 
34 namespace {
35 
36 class MipsMulMulBugFix : public MachineFunctionPass {
37 public:
38   MipsMulMulBugFix() : MachineFunctionPass(ID) {
39     initializeMipsMulMulBugFixPass(*PassRegistry::getPassRegistry());
40   }
41 
42   StringRef getPassName() const override { return "Mips VR4300 mulmul bugfix"; }
43 
44   MachineFunctionProperties getRequiredProperties() const override {
45     return MachineFunctionProperties().set(
46         MachineFunctionProperties::Property::NoVRegs);
47   }
48 
49   bool runOnMachineFunction(MachineFunction &MF) override;
50 
51   static char ID;
52 
53 private:
54   bool fixMulMulBB(MachineBasicBlock &MBB, const MipsInstrInfo &MipsII);
55 };
56 
57 } // namespace
58 
59 INITIALIZE_PASS(MipsMulMulBugFix, "mips-vr4300-mulmul-fix",
60                 "Mips VR4300 mulmul bugfix", false, false)
61 
62 char MipsMulMulBugFix::ID = 0;
63 
64 bool MipsMulMulBugFix::runOnMachineFunction(MachineFunction &MF) {
65   const MipsInstrInfo &MipsII =
66       *static_cast<const MipsInstrInfo *>(MF.getSubtarget().getInstrInfo());
67 
68   bool Modified = false;
69 
70   for (auto &MBB : MF)
71     Modified |= fixMulMulBB(MBB, MipsII);
72 
73   return Modified;
74 }
75 
76 static bool isFirstMul(const MachineInstr &MI) {
77   switch (MI.getOpcode()) {
78   case Mips::FMUL_S:
79   case Mips::FMUL_D:
80   case Mips::FMUL_D32:
81   case Mips::FMUL_D64:
82     return true;
83   default:
84     return false;
85   }
86 }
87 
88 static bool isSecondMulOrBranch(const MachineInstr &MI) {
89   if (MI.isBranch() || MI.isIndirectBranch() || MI.isCall())
90     return true;
91 
92   switch (MI.getOpcode()) {
93   case Mips::MUL:
94   case Mips::FMUL_S:
95   case Mips::FMUL_D:
96   case Mips::FMUL_D32:
97   case Mips::FMUL_D64:
98   case Mips::MULT:
99   case Mips::MULTu:
100   case Mips::DMULT:
101   case Mips::DMULTu:
102     return true;
103   default:
104     return false;
105   }
106 }
107 
108 bool MipsMulMulBugFix::fixMulMulBB(MachineBasicBlock &MBB,
109                                    const MipsInstrInfo &MipsII) {
110   bool Modified = false;
111 
112   MachineBasicBlock::instr_iterator NextMII;
113 
114   // Iterate through the instructions in the basic block
115   for (MachineBasicBlock::instr_iterator MII = MBB.instr_begin(),
116                                          E = MBB.instr_end();
117        MII != E; MII = NextMII) {
118 
119     NextMII = next_nodbg(MII, E);
120 
121     // Trigger when the current instruction is a mul and the next instruction
122     // is either a mul or a branch in case the branch target start with a mul
123     if (NextMII != E && isFirstMul(*MII) && isSecondMulOrBranch(*NextMII)) {
124       LLVM_DEBUG(dbgs() << "Found mulmul!\n");
125 
126       const MCInstrDesc &NewMCID = MipsII.get(Mips::NOP);
127       BuildMI(MBB, NextMII, DebugLoc(), NewMCID);
128       Modified = true;
129     }
130   }
131 
132   return Modified;
133 }
134 
135 FunctionPass *llvm::createMipsMulMulBugPass() { return new MipsMulMulBugFix(); }
136