xref: /llvm-project/llvm/lib/Target/M68k/GISel/M68kInstructionSelector.cpp (revision 1fe7d9c79967d1e1456778e5008b8f68bc16d41f)
16bf22ae4SJim Lin //===-- M68kInstructionSelector.cpp -----------------------------*- C++ -*-===//
299152a41SMin-Yih Hsu //===----------------------------------------------------------------------===//
399152a41SMin-Yih Hsu /// \file
499152a41SMin-Yih Hsu /// This file implements the targeting of the InstructionSelector class for
599152a41SMin-Yih Hsu /// M68k.
699152a41SMin-Yih Hsu /// \todo This should be generated by TableGen.
799152a41SMin-Yih Hsu //===----------------------------------------------------------------------===//
899152a41SMin-Yih Hsu 
999152a41SMin-Yih Hsu #include "M68kRegisterBankInfo.h"
1099152a41SMin-Yih Hsu #include "M68kSubtarget.h"
1199152a41SMin-Yih Hsu #include "M68kTargetMachine.h"
12*1fe7d9c7Spvanhout #include "llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h"
1399152a41SMin-Yih Hsu #include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
1499152a41SMin-Yih Hsu #include "llvm/Support/Debug.h"
1599152a41SMin-Yih Hsu 
1699152a41SMin-Yih Hsu #define DEBUG_TYPE "m68k-isel"
1799152a41SMin-Yih Hsu 
1899152a41SMin-Yih Hsu using namespace llvm;
1999152a41SMin-Yih Hsu 
2099152a41SMin-Yih Hsu #define GET_GLOBALISEL_PREDICATE_BITSET
2199152a41SMin-Yih Hsu #include "M68kGenGlobalISel.inc"
2299152a41SMin-Yih Hsu #undef GET_GLOBALISEL_PREDICATE_BITSET
2399152a41SMin-Yih Hsu 
2499152a41SMin-Yih Hsu namespace {
2599152a41SMin-Yih Hsu 
2699152a41SMin-Yih Hsu class M68kInstructionSelector : public InstructionSelector {
2799152a41SMin-Yih Hsu public:
2899152a41SMin-Yih Hsu   M68kInstructionSelector(const M68kTargetMachine &TM, const M68kSubtarget &STI,
2999152a41SMin-Yih Hsu                           const M68kRegisterBankInfo &RBI);
3099152a41SMin-Yih Hsu 
3199152a41SMin-Yih Hsu   bool select(MachineInstr &I) override;
getName()3299152a41SMin-Yih Hsu   static const char *getName() { return DEBUG_TYPE; }
3399152a41SMin-Yih Hsu 
3499152a41SMin-Yih Hsu private:
3599152a41SMin-Yih Hsu   bool selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const;
3699152a41SMin-Yih Hsu 
3799152a41SMin-Yih Hsu   const M68kTargetMachine &TM;
3899152a41SMin-Yih Hsu   const M68kInstrInfo &TII;
3999152a41SMin-Yih Hsu   const M68kRegisterInfo &TRI;
4099152a41SMin-Yih Hsu   const M68kRegisterBankInfo &RBI;
4199152a41SMin-Yih Hsu 
4299152a41SMin-Yih Hsu #define GET_GLOBALISEL_PREDICATES_DECL
4399152a41SMin-Yih Hsu #include "M68kGenGlobalISel.inc"
4499152a41SMin-Yih Hsu #undef GET_GLOBALISEL_PREDICATES_DECL
4599152a41SMin-Yih Hsu 
4699152a41SMin-Yih Hsu #define GET_GLOBALISEL_TEMPORARIES_DECL
4799152a41SMin-Yih Hsu #include "M68kGenGlobalISel.inc"
4899152a41SMin-Yih Hsu #undef GET_GLOBALISEL_TEMPORARIES_DECL
4999152a41SMin-Yih Hsu };
5099152a41SMin-Yih Hsu 
5199152a41SMin-Yih Hsu } // end anonymous namespace
5299152a41SMin-Yih Hsu 
5399152a41SMin-Yih Hsu #define GET_GLOBALISEL_IMPL
5499152a41SMin-Yih Hsu #include "M68kGenGlobalISel.inc"
5599152a41SMin-Yih Hsu #undef GET_GLOBALISEL_IMPL
5699152a41SMin-Yih Hsu 
M68kInstructionSelector(const M68kTargetMachine & TM,const M68kSubtarget & STI,const M68kRegisterBankInfo & RBI)5799152a41SMin-Yih Hsu M68kInstructionSelector::M68kInstructionSelector(
5899152a41SMin-Yih Hsu     const M68kTargetMachine &TM, const M68kSubtarget &STI,
5999152a41SMin-Yih Hsu     const M68kRegisterBankInfo &RBI)
6099152a41SMin-Yih Hsu     : InstructionSelector(), TM(TM), TII(*STI.getInstrInfo()),
6199152a41SMin-Yih Hsu       TRI(*STI.getRegisterInfo()), RBI(RBI),
6299152a41SMin-Yih Hsu 
6399152a41SMin-Yih Hsu #define GET_GLOBALISEL_PREDICATES_INIT
6499152a41SMin-Yih Hsu #include "M68kGenGlobalISel.inc"
6599152a41SMin-Yih Hsu #undef GET_GLOBALISEL_PREDICATES_INIT
6699152a41SMin-Yih Hsu #define GET_GLOBALISEL_TEMPORARIES_INIT
6799152a41SMin-Yih Hsu #include "M68kGenGlobalISel.inc"
6899152a41SMin-Yih Hsu #undef GET_GLOBALISEL_TEMPORARIES_INIT
6999152a41SMin-Yih Hsu {
7099152a41SMin-Yih Hsu }
7199152a41SMin-Yih Hsu 
select(MachineInstr & I)7299152a41SMin-Yih Hsu bool M68kInstructionSelector::select(MachineInstr &I) {
7399152a41SMin-Yih Hsu   // Certain non-generic instructions also need some special handling.
7499152a41SMin-Yih Hsu   if (!isPreISelGenericOpcode(I.getOpcode()))
7599152a41SMin-Yih Hsu     return true;
7699152a41SMin-Yih Hsu 
7799152a41SMin-Yih Hsu   if (selectImpl(I, *CoverageInfo))
7899152a41SMin-Yih Hsu     return true;
7999152a41SMin-Yih Hsu 
8099152a41SMin-Yih Hsu   return false;
8199152a41SMin-Yih Hsu }
8299152a41SMin-Yih Hsu 
8399152a41SMin-Yih Hsu namespace llvm {
8499152a41SMin-Yih Hsu InstructionSelector *
createM68kInstructionSelector(const M68kTargetMachine & TM,const M68kSubtarget & Subtarget,const M68kRegisterBankInfo & RBI)8599152a41SMin-Yih Hsu createM68kInstructionSelector(const M68kTargetMachine &TM,
8699152a41SMin-Yih Hsu                               const M68kSubtarget &Subtarget,
8799152a41SMin-Yih Hsu                               const M68kRegisterBankInfo &RBI) {
8899152a41SMin-Yih Hsu   return new M68kInstructionSelector(TM, Subtarget, RBI);
8999152a41SMin-Yih Hsu }
9099152a41SMin-Yih Hsu } // end namespace llvm
91