xref: /llvm-project/lldb/test/API/functionalities/gdb_remote_client/TestRemoteRegNums.py (revision 2238dcc39358353cac21df75c3c3286ab20b8f53)
18561ad92SMuhammad Omair Javaidimport lldb
28561ad92SMuhammad Omair Javaidfrom lldbsuite.test.lldbtest import *
38561ad92SMuhammad Omair Javaidfrom lldbsuite.test.decorators import *
433c0f93fSPavel Labathfrom lldbsuite.test.gdbclientutils import *
533c0f93fSPavel Labathfrom lldbsuite.test.lldbgdbclient import GDBRemoteTestBase
68561ad92SMuhammad Omair Javaid
78561ad92SMuhammad Omair Javaid
88561ad92SMuhammad Omair Javaid# This test case checks for register number mismatch between lldb and gdb stub.
98561ad92SMuhammad Omair Javaid# LLDB client assigns register numbers to target xml registers in increasing
108561ad92SMuhammad Omair Javaid# order starting with regnum = 0, while gdb-remote may specify different regnum
118561ad92SMuhammad Omair Javaid# which is stored as eRegisterKindProcessPlugin. Remote side will use its
128561ad92SMuhammad Omair Javaid# register number in expedited register list, value_regs and invalidate_regnums.
138561ad92SMuhammad Omair Javaid#
148561ad92SMuhammad Omair Javaid# This test creates a ficticious target xml with non-sequential regnums to test
158561ad92SMuhammad Omair Javaid# that correct registers are accessed in all of above mentioned cases.
168561ad92SMuhammad Omair Javaid
178561ad92SMuhammad Omair Javaid
18*2238dcc3SJonas Devlieghereclass TestRemoteRegNums(GDBRemoteTestBase):
198561ad92SMuhammad Omair Javaid    @skipIfXmlSupportMissing
208561ad92SMuhammad Omair Javaid    def test(self):
218561ad92SMuhammad Omair Javaid        class MyResponder(MockGDBServerResponder):
228561ad92SMuhammad Omair Javaid            def haltReason(self):
238561ad92SMuhammad Omair Javaid                return "T02thread:1ff0d;threads:1ff0d;thread-pcs:000000010001bc00;00:00bc010001000000;09:c04825ebfe7f0000;"
248561ad92SMuhammad Omair Javaid
258561ad92SMuhammad Omair Javaid            def threadStopInfo(self, threadnum):
268561ad92SMuhammad Omair Javaid                return "T02thread:1ff0d;threads:1ff0d;thread-pcs:000000010001bc00;00:00bc010001000000;09:c04825ebfe7f0000;"
278561ad92SMuhammad Omair Javaid
288561ad92SMuhammad Omair Javaid            def writeRegisters(self):
298561ad92SMuhammad Omair Javaid                return "E02"
308561ad92SMuhammad Omair Javaid
318561ad92SMuhammad Omair Javaid            def readRegisters(self):
328561ad92SMuhammad Omair Javaid                return "E01"
338561ad92SMuhammad Omair Javaid
348561ad92SMuhammad Omair Javaid            rax_regnum2_val = "7882773ce0ffffff"
358561ad92SMuhammad Omair Javaid            rbx_regnum4_val = "1122334455667788"
368561ad92SMuhammad Omair Javaid
378561ad92SMuhammad Omair Javaid            def readRegister(self, regnum):
388561ad92SMuhammad Omair Javaid                # lldb will try sending "p0" to see if the p packet is supported,
398561ad92SMuhammad Omair Javaid                # give a bogus value; in theory lldb could use this value in the
408561ad92SMuhammad Omair Javaid                # register context and that would be valid behavior.
418561ad92SMuhammad Omair Javaid
428561ad92SMuhammad Omair Javaid                # notably, don't give values for registers 1 & 3 -- lldb should
438561ad92SMuhammad Omair Javaid                # get those from the ? stop packet ("T11") and it is a pref regression
448561ad92SMuhammad Omair Javaid                # if lldb is asking for these register values.
458561ad92SMuhammad Omair Javaid                if regnum == 0:
468561ad92SMuhammad Omair Javaid                    return "5555555555555555"
478561ad92SMuhammad Omair Javaid                if regnum == 2:
488561ad92SMuhammad Omair Javaid                    return self.rax_regnum2_val
498561ad92SMuhammad Omair Javaid                if regnum == 4:
508561ad92SMuhammad Omair Javaid                    return self.rbx_regnum4_val
518561ad92SMuhammad Omair Javaid
528561ad92SMuhammad Omair Javaid                return "E03"
538561ad92SMuhammad Omair Javaid
548561ad92SMuhammad Omair Javaid            def writeRegister(self, regnum, value_hex):
558561ad92SMuhammad Omair Javaid                if regnum == 2:
568561ad92SMuhammad Omair Javaid                    self.rax_regnum2_val = value_hex
578561ad92SMuhammad Omair Javaid                if regnum == 4:
588561ad92SMuhammad Omair Javaid                    self.rbx_regnum4_val = value_hex
598561ad92SMuhammad Omair Javaid
608561ad92SMuhammad Omair Javaid                return "OK"
618561ad92SMuhammad Omair Javaid
628561ad92SMuhammad Omair Javaid            def qXferRead(self, obj, annex, offset, length):
638561ad92SMuhammad Omair Javaid                if annex == "target.xml":
64*2238dcc3SJonas Devlieghere                    return (
65*2238dcc3SJonas Devlieghere                        """<?xml version="1.0"?>
668561ad92SMuhammad Omair Javaid                        <target version="1.0">
678561ad92SMuhammad Omair Javaid                          <architecture>i386:x86-64</architecture>
688561ad92SMuhammad Omair Javaid                          <feature name="org.gnu.gdb.i386.core">
698561ad92SMuhammad Omair Javaid                            <reg name="rip" bitsize="64" regnum="0" type="code_ptr" group="general" altname="pc" generic="pc"/>
708561ad92SMuhammad Omair Javaid                            <reg name="rax" bitsize="64" regnum="2" type="code_ptr" group="general"/>
718561ad92SMuhammad Omair Javaid                            <reg name="rbx" bitsize="64" regnum="4" type="code_ptr" group="general"/>
728561ad92SMuhammad Omair Javaid                            <reg name="eax" bitsize="32" regnum="5" value_regnums="2" invalidate_regnums="2" type="code_ptr" group="general"/>
738561ad92SMuhammad Omair Javaid                            <reg name="ebx" bitsize="32" regnum="7" value_regnums="4" invalidate_regnums="4" type="code_ptr" group="general"/>
748561ad92SMuhammad Omair Javaid                            <reg name="rsi" bitsize="64" regnum="9" type="code_ptr" group="general"/>
758561ad92SMuhammad Omair Javaid                          </feature>
76*2238dcc3SJonas Devlieghere                        </target>""",
77*2238dcc3SJonas Devlieghere                        False,
78*2238dcc3SJonas Devlieghere                    )
798561ad92SMuhammad Omair Javaid                else:
808561ad92SMuhammad Omair Javaid                    return None, False
818561ad92SMuhammad Omair Javaid
828561ad92SMuhammad Omair Javaid        self.server.responder = MyResponder()
83*2238dcc3SJonas Devlieghere        target = self.dbg.CreateTarget("")
848561ad92SMuhammad Omair Javaid        if self.TraceOn():
858561ad92SMuhammad Omair Javaid            self.runCmd("log enable gdb-remote packets")
86*2238dcc3SJonas Devlieghere            self.addTearDownHook(lambda: self.runCmd("log disable gdb-remote packets"))
878561ad92SMuhammad Omair Javaid        process = self.connect(target)
888561ad92SMuhammad Omair Javaid
898561ad92SMuhammad Omair Javaid        thread = process.GetThreadAtIndex(0)
908561ad92SMuhammad Omair Javaid        frame = thread.GetFrameAtIndex(0)
918561ad92SMuhammad Omair Javaid        rax = frame.FindRegister("rax").GetValueAsUnsigned()
928561ad92SMuhammad Omair Javaid        eax = frame.FindRegister("eax").GetValueAsUnsigned()
938561ad92SMuhammad Omair Javaid        rbx = frame.FindRegister("rbx").GetValueAsUnsigned()
948561ad92SMuhammad Omair Javaid        ebx = frame.FindRegister("ebx").GetValueAsUnsigned()
958561ad92SMuhammad Omair Javaid        rsi = frame.FindRegister("rsi").GetValueAsUnsigned()
968561ad92SMuhammad Omair Javaid        pc = frame.GetPC()
978561ad92SMuhammad Omair Javaid        rip = frame.FindRegister("rip").GetValueAsUnsigned()
988561ad92SMuhammad Omair Javaid
998561ad92SMuhammad Omair Javaid        if self.TraceOn():
100*2238dcc3SJonas Devlieghere            print(
101*2238dcc3SJonas Devlieghere                "Register values: rax == 0x%x, rbx == 0x%x, rsi == 0x%x, pc == 0x%x, rip == 0x%x"
102*2238dcc3SJonas Devlieghere                % (rax, rbx, rsi, pc, rip)
103*2238dcc3SJonas Devlieghere            )
1048561ad92SMuhammad Omair Javaid
105*2238dcc3SJonas Devlieghere        self.assertEqual(rax, 0xFFFFFFE03C778278)
1068561ad92SMuhammad Omair Javaid        self.assertEqual(rbx, 0x8877665544332211)
107*2238dcc3SJonas Devlieghere        self.assertEqual(eax, 0x3C778278)
1088561ad92SMuhammad Omair Javaid        self.assertEqual(ebx, 0x44332211)
109*2238dcc3SJonas Devlieghere        self.assertEqual(rsi, 0x00007FFEEB2548C0)
110*2238dcc3SJonas Devlieghere        self.assertEqual(pc, 0x10001BC00)
111*2238dcc3SJonas Devlieghere        self.assertEqual(rip, 0x10001BC00)
1128561ad92SMuhammad Omair Javaid
1138561ad92SMuhammad Omair Javaid        frame.FindRegister("eax").SetValueFromCString("1")
1148561ad92SMuhammad Omair Javaid        frame.FindRegister("ebx").SetValueFromCString("0")
1158561ad92SMuhammad Omair Javaid        eax = frame.FindRegister("eax").GetValueAsUnsigned()
1168561ad92SMuhammad Omair Javaid        ebx = frame.FindRegister("ebx").GetValueAsUnsigned()
1178561ad92SMuhammad Omair Javaid        rax = frame.FindRegister("rax").GetValueAsUnsigned()
1188561ad92SMuhammad Omair Javaid        rbx = frame.FindRegister("rbx").GetValueAsUnsigned()
1198561ad92SMuhammad Omair Javaid
1208561ad92SMuhammad Omair Javaid        if self.TraceOn():
121*2238dcc3SJonas Devlieghere            print(
122*2238dcc3SJonas Devlieghere                "Register values: rax == 0x%x, rbx == 0x%x, rsi == 0x%x, pc == 0x%x, rip == 0x%x"
123*2238dcc3SJonas Devlieghere                % (rax, rbx, rsi, pc, rip)
124*2238dcc3SJonas Devlieghere            )
1258561ad92SMuhammad Omair Javaid
126*2238dcc3SJonas Devlieghere        self.assertEqual(rax, 0xFFFFFFE000000001)
1278561ad92SMuhammad Omair Javaid        self.assertEqual(rbx, 0x8877665500000000)
1288561ad92SMuhammad Omair Javaid        self.assertEqual(eax, 0x00000001)
1298561ad92SMuhammad Omair Javaid        self.assertEqual(ebx, 0x00000000)
130*2238dcc3SJonas Devlieghere        self.assertEqual(rsi, 0x00007FFEEB2548C0)
131*2238dcc3SJonas Devlieghere        self.assertEqual(pc, 0x10001BC00)
132*2238dcc3SJonas Devlieghere        self.assertEqual(rip, 0x10001BC00)
133