14475aca1SJan Vesely #define _CLC_VSTORE_DECL(SUFFIX, PRIM_TYPE, VEC_TYPE, WIDTH, ADDR_SPACE, RND) \ 24475aca1SJan Vesely _CLC_OVERLOAD _CLC_DECL void vstore##SUFFIX##WIDTH##RND(VEC_TYPE vec, size_t offset, ADDR_SPACE PRIM_TYPE *out); 351441f80STom Stellard 44475aca1SJan Vesely #define _CLC_VECTOR_VSTORE_DECL(SUFFIX, MEM_TYPE, PRIM_TYPE, ADDR_SPACE, RND) \ 54475aca1SJan Vesely _CLC_VSTORE_DECL(SUFFIX, MEM_TYPE, PRIM_TYPE##2, 2, ADDR_SPACE, RND) \ 64475aca1SJan Vesely _CLC_VSTORE_DECL(SUFFIX, MEM_TYPE, PRIM_TYPE##3, 3, ADDR_SPACE, RND) \ 74475aca1SJan Vesely _CLC_VSTORE_DECL(SUFFIX, MEM_TYPE, PRIM_TYPE##4, 4, ADDR_SPACE, RND) \ 84475aca1SJan Vesely _CLC_VSTORE_DECL(SUFFIX, MEM_TYPE, PRIM_TYPE##8, 8, ADDR_SPACE, RND) \ 94475aca1SJan Vesely _CLC_VSTORE_DECL(SUFFIX, MEM_TYPE, PRIM_TYPE##16, 16, ADDR_SPACE, RND) 10ad867272SJan Vesely 114475aca1SJan Vesely #define _CLC_VECTOR_VSTORE_PRIM3(SUFFIX, MEM_TYPE, PRIM_TYPE, RND) \ 124475aca1SJan Vesely _CLC_VECTOR_VSTORE_DECL(SUFFIX, MEM_TYPE, PRIM_TYPE, __private, RND) \ 134475aca1SJan Vesely _CLC_VECTOR_VSTORE_DECL(SUFFIX, MEM_TYPE, PRIM_TYPE, __local, RND) \ 144475aca1SJan Vesely _CLC_VECTOR_VSTORE_DECL(SUFFIX, MEM_TYPE, PRIM_TYPE, __global, RND) 1551441f80STom Stellard 1651441f80STom Stellard #define _CLC_VECTOR_VSTORE_PRIM1(PRIM_TYPE) \ 174475aca1SJan Vesely _CLC_VECTOR_VSTORE_PRIM3(,PRIM_TYPE, PRIM_TYPE, ) 184475aca1SJan Vesely 194475aca1SJan Vesely #define _CLC_VECTOR_VSTORE_HALF_PRIM1(PRIM_TYPE, RND) \ 204475aca1SJan Vesely _CLC_VSTORE_DECL(_half, half, PRIM_TYPE, , __private, RND) \ 214475aca1SJan Vesely _CLC_VSTORE_DECL(_half, half, PRIM_TYPE, , __local, RND) \ 224475aca1SJan Vesely _CLC_VSTORE_DECL(_half, half, PRIM_TYPE, , __global, RND) \ 234475aca1SJan Vesely _CLC_VECTOR_VSTORE_PRIM3(_half, half, PRIM_TYPE, RND) \ 244475aca1SJan Vesely _CLC_VSTORE_DECL(a_half, half, PRIM_TYPE, , __private, RND) \ 254475aca1SJan Vesely _CLC_VSTORE_DECL(a_half, half, PRIM_TYPE, , __local, RND) \ 264475aca1SJan Vesely _CLC_VSTORE_DECL(a_half, half, PRIM_TYPE, , __global, RND) \ 274475aca1SJan Vesely _CLC_VECTOR_VSTORE_PRIM3(a_half, half, PRIM_TYPE, RND) 2851441f80STom Stellard 297ab2d0bdSJan Vesely _CLC_VECTOR_VSTORE_PRIM1(char) 307ab2d0bdSJan Vesely _CLC_VECTOR_VSTORE_PRIM1(uchar) 317ab2d0bdSJan Vesely _CLC_VECTOR_VSTORE_PRIM1(short) 327ab2d0bdSJan Vesely _CLC_VECTOR_VSTORE_PRIM1(ushort) 337ab2d0bdSJan Vesely _CLC_VECTOR_VSTORE_PRIM1(int) 347ab2d0bdSJan Vesely _CLC_VECTOR_VSTORE_PRIM1(uint) 357ab2d0bdSJan Vesely _CLC_VECTOR_VSTORE_PRIM1(long) 367ab2d0bdSJan Vesely _CLC_VECTOR_VSTORE_PRIM1(ulong) 377ab2d0bdSJan Vesely _CLC_VECTOR_VSTORE_PRIM1(float) 384475aca1SJan Vesely 394475aca1SJan Vesely _CLC_VECTOR_VSTORE_HALF_PRIM1(float,) 40d526a2b6SJan Vesely _CLC_VECTOR_VSTORE_HALF_PRIM1(float, _rtz) 412655312cSJan Vesely _CLC_VECTOR_VSTORE_HALF_PRIM1(float, _rtn) 42f2d876aeSJan Vesely _CLC_VECTOR_VSTORE_HALF_PRIM1(float, _rtp) 43*1c570566SJan Vesely _CLC_VECTOR_VSTORE_HALF_PRIM1(float, _rte) 4451441f80STom Stellard 4551441f80STom Stellard #ifdef cl_khr_fp64 46ad867272SJan Vesely _CLC_VECTOR_VSTORE_PRIM1(double) 474475aca1SJan Vesely _CLC_VECTOR_VSTORE_HALF_PRIM1(double,) 48d526a2b6SJan Vesely _CLC_VECTOR_VSTORE_HALF_PRIM1(double, _rtz) 492655312cSJan Vesely _CLC_VECTOR_VSTORE_HALF_PRIM1(double, _rtn) 50f2d876aeSJan Vesely _CLC_VECTOR_VSTORE_HALF_PRIM1(double, _rtp) 51*1c570566SJan Vesely _CLC_VECTOR_VSTORE_HALF_PRIM1(double, _rte) 5251441f80STom Stellard #endif 5351441f80STom Stellard 54661ac03aSJan Vesely #ifdef cl_khr_fp16 55661ac03aSJan Vesely _CLC_VECTOR_VSTORE_PRIM1(half) 56661ac03aSJan Vesely #endif 57661ac03aSJan Vesely 587ab2d0bdSJan Vesely 59661ac03aSJan Vesely #undef _CLC_VSTORE_DECL 60661ac03aSJan Vesely #undef _CLC_VECTOR_VSTORE_DECL 61661ac03aSJan Vesely #undef _CLC_VECTOR_VSTORE_PRIM3 62661ac03aSJan Vesely #undef _CLC_VECTOR_VSTORE_PRIM1 63