1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 template <class T> 33 struct S { 34 T f; 35 S(T a) : f(a) {} 36 S() : f() {} 37 operator T() { return T(); } 38 ~S() {} 39 }; 40 41 volatile int g __attribute__((aligned(128))) = 1212; 42 43 struct SS { 44 int a; 45 int b : 4; 46 int &c; 47 SS(int &d) : a(0), b(0), c(d) { 48 #pragma omp target 49 #pragma omp teams private(a, b, c) 50 #ifdef LAMBDA 51 [&]() { 52 ++this->a, --b, (this)->c /= 1; 53 }(); 54 #else 55 ++this->a, --b, c /= 1; 56 #endif 57 } 58 }; 59 60 template<typename T> 61 struct SST { 62 T a; 63 SST() : a(T()) { 64 #pragma omp target 65 #pragma omp teams private(a) 66 #ifdef LAMBDA 67 [&]() { 68 [&]() { 69 ++this->a; 70 }(); 71 }(); 72 #else 73 ++(this)->a; 74 #endif 75 } 76 }; 77 78 template <typename T> 79 T tmain() { 80 S<T> test; 81 SST<T> sst; 82 T t_var __attribute__((aligned(128))) = T(); 83 T vec[] __attribute__((aligned(128))) = {1, 2}; 84 S<T> s_arr[] __attribute__((aligned(128))) = {1, 2}; 85 S<T> var __attribute__((aligned(128))) (3); 86 #pragma omp target 87 #pragma omp teams private(t_var, vec, s_arr, var) 88 { 89 vec[0] = t_var; 90 s_arr[0] = var; 91 } 92 return T(); 93 } 94 95 int main() { 96 static int sivar; 97 SS ss(sivar); 98 #ifdef LAMBDA 99 100 101 // lambda and target region in main 102 103 // target region in struct constructor 104 105 // offloading function in struct constructor 106 107 // outlined teams region in struct constructor 108 // call void [[INNER_LAMBDA_CONSTR:@.+]]([[CAP_0_TY]]* 109 110 // inner lambda in struct constructor 111 // define{{.*}} void [[INNER_LAMBDA_CONSTR]]([[CAP_0_TY]]* 112 113 114 // ret 115 116 [&]() { 117 #pragma omp target 118 #pragma omp teams private(g, sivar) 119 { 120 121 g = 1; 122 sivar = 2; 123 [&]() { 124 g = 2; 125 sivar = 4; 126 }(); 127 } 128 }(); 129 return 0; 130 #else 131 S<float> test; 132 int t_var = 0; 133 int vec[] = {1, 2}; 134 S<float> s_arr[] = {1, 2}; 135 S<float> var(3); 136 #pragma omp target 137 #pragma omp teams private(t_var, vec, s_arr, var, sivar) 138 { 139 vec[0] = t_var; 140 s_arr[0] = var; 141 sivar = 3; 142 } 143 return tmain<int>(); 144 #endif 145 } 146 147 148 // target region in main function 149 150 151 // template tmain 152 153 // target in SS constructor 154 155 156 // target in tmain template 157 158 159 // SST constructor 160 161 // target in SST constructor 162 163 164 #endif 165 166 // CHECK1-LABEL: define {{[^@]+}}@main 167 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 168 // CHECK1-NEXT: entry: 169 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 170 // CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 171 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 172 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 173 // CHECK1-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 174 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 175 // CHECK1-NEXT: ret i32 0 176 // 177 // 178 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 179 // CHECK1-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 180 // CHECK1-NEXT: entry: 181 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 182 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 183 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 184 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 185 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 186 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 187 // CHECK1-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 188 // CHECK1-NEXT: ret void 189 // 190 // 191 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 192 // CHECK1-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 193 // CHECK1-NEXT: entry: 194 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 195 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 196 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 197 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 198 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 199 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 200 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 201 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 202 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 203 // CHECK1-NEXT: store i32 0, i32* [[A]], align 8 204 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 205 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 206 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 207 // CHECK1-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 208 // CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 209 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 210 // CHECK1-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 211 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 212 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS** 213 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8 214 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 215 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to %struct.SS** 216 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP4]], align 8 217 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 218 // CHECK1-NEXT: store i8* null, i8** [[TMP5]], align 8 219 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 220 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 221 // CHECK1-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 222 // CHECK1-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 223 // CHECK1-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 224 // CHECK1: omp_offload.failed: 225 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(%struct.SS* [[THIS1]]) #[[ATTR4:[0-9]+]] 226 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 227 // CHECK1: omp_offload.cont: 228 // CHECK1-NEXT: ret void 229 // 230 // 231 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48 232 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] { 233 // CHECK1-NEXT: entry: 234 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 235 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 236 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 237 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 238 // CHECK1-NEXT: ret void 239 // 240 // 241 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 242 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 243 // CHECK1-NEXT: entry: 244 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 245 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 246 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 247 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 248 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 249 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 250 // CHECK1-NEXT: [[C:%.*]] = alloca i32, align 4 251 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 252 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 253 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 254 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 255 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 256 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 257 // CHECK1-NEXT: store i32* [[A]], i32** [[TMP]], align 8 258 // CHECK1-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 259 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 260 // CHECK1-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[TMP1]], align 8 261 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 262 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8 263 // CHECK1-NEXT: store i32* [[TMP3]], i32** [[TMP2]], align 8 264 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 265 // CHECK1-NEXT: store i32* [[B]], i32** [[TMP4]], align 8 266 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 267 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP1]], align 8 268 // CHECK1-NEXT: store i32* [[TMP6]], i32** [[TMP5]], align 8 269 // CHECK1-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 270 // CHECK1-NEXT: ret void 271 // 272 // 273 // CHECK1-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 274 // CHECK1-SAME: (%class.anon.0* nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 275 // CHECK1-NEXT: entry: 276 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8 277 // CHECK1-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8 278 // CHECK1-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8 279 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 280 // CHECK1-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 281 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 282 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 283 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 284 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 285 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 286 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 287 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 288 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 289 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 290 // CHECK1-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 291 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 292 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 293 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 294 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 295 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 296 // CHECK1-NEXT: ret void 297 // 298 // 299 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 300 // CHECK1-SAME: () #[[ATTR3]] { 301 // CHECK1-NEXT: entry: 302 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 303 // CHECK1-NEXT: ret void 304 // 305 // 306 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 307 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 308 // CHECK1-NEXT: entry: 309 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 310 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 311 // CHECK1-NEXT: [[G:%.*]] = alloca i32, align 128 312 // CHECK1-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 313 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8 314 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 315 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 316 // CHECK1-NEXT: store i32 1, i32* [[G]], align 128 317 // CHECK1-NEXT: store i32 2, i32* [[SIVAR]], align 4 318 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 319 // CHECK1-NEXT: store i32* [[G]], i32** [[TMP0]], align 8 320 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 321 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[TMP1]], align 8 322 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.1* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 323 // CHECK1-NEXT: ret void 324 // 325 // 326 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 327 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 328 // CHECK1-NEXT: entry: 329 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 330 // CHECK1-NEXT: ret void 331 // 332 // 333 // CHECK2-LABEL: define {{[^@]+}}@main 334 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 335 // CHECK2-NEXT: entry: 336 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 337 // CHECK2-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 338 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 339 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 340 // CHECK2-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 341 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 342 // CHECK2-NEXT: ret i32 0 343 // 344 // 345 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 346 // CHECK2-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 347 // CHECK2-NEXT: entry: 348 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 349 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 350 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 351 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 352 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 353 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 354 // CHECK2-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 355 // CHECK2-NEXT: ret void 356 // 357 // 358 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 359 // CHECK2-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 360 // CHECK2-NEXT: entry: 361 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 362 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 363 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 364 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 365 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 366 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 367 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 368 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 369 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 370 // CHECK2-NEXT: store i32 0, i32* [[A]], align 8 371 // CHECK2-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 372 // CHECK2-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 373 // CHECK2-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 374 // CHECK2-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 375 // CHECK2-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 376 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 377 // CHECK2-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 378 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 379 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS** 380 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8 381 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 382 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to %struct.SS** 383 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP4]], align 8 384 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 385 // CHECK2-NEXT: store i8* null, i8** [[TMP5]], align 8 386 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 387 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 388 // CHECK2-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 389 // CHECK2-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 390 // CHECK2-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 391 // CHECK2: omp_offload.failed: 392 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(%struct.SS* [[THIS1]]) #[[ATTR4:[0-9]+]] 393 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 394 // CHECK2: omp_offload.cont: 395 // CHECK2-NEXT: ret void 396 // 397 // 398 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48 399 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] { 400 // CHECK2-NEXT: entry: 401 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 402 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 403 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 404 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 405 // CHECK2-NEXT: ret void 406 // 407 // 408 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 409 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 410 // CHECK2-NEXT: entry: 411 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 412 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 413 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 414 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 415 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 8 416 // CHECK2-NEXT: [[B:%.*]] = alloca i32, align 4 417 // CHECK2-NEXT: [[C:%.*]] = alloca i32, align 4 418 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 419 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 420 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 421 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 422 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 423 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 424 // CHECK2-NEXT: store i32* [[A]], i32** [[TMP]], align 8 425 // CHECK2-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 426 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 427 // CHECK2-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[TMP1]], align 8 428 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 429 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8 430 // CHECK2-NEXT: store i32* [[TMP3]], i32** [[TMP2]], align 8 431 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 432 // CHECK2-NEXT: store i32* [[B]], i32** [[TMP4]], align 8 433 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 434 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP1]], align 8 435 // CHECK2-NEXT: store i32* [[TMP6]], i32** [[TMP5]], align 8 436 // CHECK2-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 437 // CHECK2-NEXT: ret void 438 // 439 // 440 // CHECK2-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 441 // CHECK2-SAME: (%class.anon.0* nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 442 // CHECK2-NEXT: entry: 443 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8 444 // CHECK2-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8 445 // CHECK2-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8 446 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 447 // CHECK2-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 448 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 449 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 450 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 451 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 452 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 453 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 454 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 455 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 456 // CHECK2-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 457 // CHECK2-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 458 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 459 // CHECK2-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 460 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 461 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 462 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 463 // CHECK2-NEXT: ret void 464 // 465 // 466 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 467 // CHECK2-SAME: () #[[ATTR3]] { 468 // CHECK2-NEXT: entry: 469 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 470 // CHECK2-NEXT: ret void 471 // 472 // 473 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 474 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 475 // CHECK2-NEXT: entry: 476 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 477 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 478 // CHECK2-NEXT: [[G:%.*]] = alloca i32, align 128 479 // CHECK2-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 480 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8 481 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 482 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 483 // CHECK2-NEXT: store i32 1, i32* [[G]], align 128 484 // CHECK2-NEXT: store i32 2, i32* [[SIVAR]], align 4 485 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 486 // CHECK2-NEXT: store i32* [[G]], i32** [[TMP0]], align 8 487 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 488 // CHECK2-NEXT: store i32* [[SIVAR]], i32** [[TMP1]], align 8 489 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.1* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 490 // CHECK2-NEXT: ret void 491 // 492 // 493 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 494 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] { 495 // CHECK2-NEXT: entry: 496 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 497 // CHECK2-NEXT: ret void 498 // 499 // 500 // CHECK3-LABEL: define {{[^@]+}}@main 501 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 502 // CHECK3-NEXT: entry: 503 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 504 // CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 505 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 506 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 507 // CHECK3-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 508 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 509 // CHECK3-NEXT: ret i32 0 510 // 511 // 512 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 513 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 514 // CHECK3-NEXT: entry: 515 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 516 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 517 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 518 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 519 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 520 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 521 // CHECK3-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 522 // CHECK3-NEXT: ret void 523 // 524 // 525 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 526 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 527 // CHECK3-NEXT: entry: 528 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 529 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 530 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 531 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 532 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 533 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 534 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 535 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 536 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 537 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4 538 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 539 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 540 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 541 // CHECK3-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 542 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 543 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 544 // CHECK3-NEXT: store i32* [[TMP0]], i32** [[C]], align 4 545 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 546 // CHECK3-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS** 547 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4 548 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 549 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to %struct.SS** 550 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP4]], align 4 551 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 552 // CHECK3-NEXT: store i8* null, i8** [[TMP5]], align 4 553 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 554 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 555 // CHECK3-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 556 // CHECK3-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 557 // CHECK3-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 558 // CHECK3: omp_offload.failed: 559 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(%struct.SS* [[THIS1]]) #[[ATTR4:[0-9]+]] 560 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 561 // CHECK3: omp_offload.cont: 562 // CHECK3-NEXT: ret void 563 // 564 // 565 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48 566 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] { 567 // CHECK3-NEXT: entry: 568 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 569 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 570 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 571 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 572 // CHECK3-NEXT: ret void 573 // 574 // 575 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 576 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 577 // CHECK3-NEXT: entry: 578 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 579 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 580 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 581 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 582 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 4 583 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 584 // CHECK3-NEXT: [[C:%.*]] = alloca i32, align 4 585 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 4 586 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 587 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 588 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 589 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 590 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 591 // CHECK3-NEXT: store i32* [[A]], i32** [[TMP]], align 4 592 // CHECK3-NEXT: store i32* [[C]], i32** [[_TMP1]], align 4 593 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 594 // CHECK3-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[TMP1]], align 4 595 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 596 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 4 597 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[TMP2]], align 4 598 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 599 // CHECK3-NEXT: store i32* [[B]], i32** [[TMP4]], align 4 600 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 601 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP1]], align 4 602 // CHECK3-NEXT: store i32* [[TMP6]], i32** [[TMP5]], align 4 603 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 604 // CHECK3-NEXT: ret void 605 // 606 // 607 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 608 // CHECK3-SAME: (%class.anon.0* nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 609 // CHECK3-NEXT: entry: 610 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 4 611 // CHECK3-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 4 612 // CHECK3-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 4 613 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 614 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 4 615 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 616 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 4 617 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 618 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 619 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 620 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 621 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 4 622 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 623 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 624 // CHECK3-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 625 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 626 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 4 627 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 628 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 629 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 630 // CHECK3-NEXT: ret void 631 // 632 // 633 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 634 // CHECK3-SAME: () #[[ATTR3]] { 635 // CHECK3-NEXT: entry: 636 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 637 // CHECK3-NEXT: ret void 638 // 639 // 640 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 641 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 642 // CHECK3-NEXT: entry: 643 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 644 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 645 // CHECK3-NEXT: [[G:%.*]] = alloca i32, align 128 646 // CHECK3-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 647 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 4 648 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 649 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 650 // CHECK3-NEXT: store i32 1, i32* [[G]], align 128 651 // CHECK3-NEXT: store i32 2, i32* [[SIVAR]], align 4 652 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 653 // CHECK3-NEXT: store i32* [[G]], i32** [[TMP0]], align 4 654 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 655 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[TMP1]], align 4 656 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.1* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 657 // CHECK3-NEXT: ret void 658 // 659 // 660 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 661 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] { 662 // CHECK3-NEXT: entry: 663 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 664 // CHECK3-NEXT: ret void 665 // 666 // 667 // CHECK4-LABEL: define {{[^@]+}}@main 668 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 669 // CHECK4-NEXT: entry: 670 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 671 // CHECK4-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 672 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 673 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 674 // CHECK4-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 675 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 676 // CHECK4-NEXT: ret i32 0 677 // 678 // 679 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 680 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 681 // CHECK4-NEXT: entry: 682 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 683 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 684 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 685 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 686 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 687 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 688 // CHECK4-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 689 // CHECK4-NEXT: ret void 690 // 691 // 692 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 693 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 694 // CHECK4-NEXT: entry: 695 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 696 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 697 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 698 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 699 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 700 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 701 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 702 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 703 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 704 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4 705 // CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 706 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 707 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 708 // CHECK4-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 709 // CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 710 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 711 // CHECK4-NEXT: store i32* [[TMP0]], i32** [[C]], align 4 712 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 713 // CHECK4-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS** 714 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4 715 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 716 // CHECK4-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to %struct.SS** 717 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP4]], align 4 718 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 719 // CHECK4-NEXT: store i8* null, i8** [[TMP5]], align 4 720 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 721 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 722 // CHECK4-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 723 // CHECK4-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 724 // CHECK4-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 725 // CHECK4: omp_offload.failed: 726 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(%struct.SS* [[THIS1]]) #[[ATTR4:[0-9]+]] 727 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 728 // CHECK4: omp_offload.cont: 729 // CHECK4-NEXT: ret void 730 // 731 // 732 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48 733 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] { 734 // CHECK4-NEXT: entry: 735 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 736 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 737 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 738 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 739 // CHECK4-NEXT: ret void 740 // 741 // 742 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 743 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 744 // CHECK4-NEXT: entry: 745 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 746 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 747 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 748 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 749 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 4 750 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 751 // CHECK4-NEXT: [[C:%.*]] = alloca i32, align 4 752 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 4 753 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 754 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 755 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 756 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 757 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 758 // CHECK4-NEXT: store i32* [[A]], i32** [[TMP]], align 4 759 // CHECK4-NEXT: store i32* [[C]], i32** [[_TMP1]], align 4 760 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 761 // CHECK4-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[TMP1]], align 4 762 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 763 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 4 764 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[TMP2]], align 4 765 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 766 // CHECK4-NEXT: store i32* [[B]], i32** [[TMP4]], align 4 767 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 768 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP1]], align 4 769 // CHECK4-NEXT: store i32* [[TMP6]], i32** [[TMP5]], align 4 770 // CHECK4-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 771 // CHECK4-NEXT: ret void 772 // 773 // 774 // CHECK4-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 775 // CHECK4-SAME: (%class.anon.0* nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 776 // CHECK4-NEXT: entry: 777 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 4 778 // CHECK4-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 4 779 // CHECK4-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 4 780 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 781 // CHECK4-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 4 782 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 783 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 4 784 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 785 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 786 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 787 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 788 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 4 789 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 790 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 791 // CHECK4-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 792 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 793 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 4 794 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 795 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 796 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 797 // CHECK4-NEXT: ret void 798 // 799 // 800 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 801 // CHECK4-SAME: () #[[ATTR3]] { 802 // CHECK4-NEXT: entry: 803 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 804 // CHECK4-NEXT: ret void 805 // 806 // 807 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 808 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 809 // CHECK4-NEXT: entry: 810 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 811 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 812 // CHECK4-NEXT: [[G:%.*]] = alloca i32, align 128 813 // CHECK4-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 814 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 4 815 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 816 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 817 // CHECK4-NEXT: store i32 1, i32* [[G]], align 128 818 // CHECK4-NEXT: store i32 2, i32* [[SIVAR]], align 4 819 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 820 // CHECK4-NEXT: store i32* [[G]], i32** [[TMP0]], align 4 821 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 822 // CHECK4-NEXT: store i32* [[SIVAR]], i32** [[TMP1]], align 4 823 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.1* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 824 // CHECK4-NEXT: ret void 825 // 826 // 827 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 828 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] { 829 // CHECK4-NEXT: entry: 830 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 831 // CHECK4-NEXT: ret void 832 // 833 // 834 // CHECK5-LABEL: define {{[^@]+}}@main 835 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 836 // CHECK5-NEXT: entry: 837 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 838 // CHECK5-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 839 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 840 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 841 // CHECK5-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 842 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 843 // CHECK5-NEXT: ret i32 0 844 // 845 // 846 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 847 // CHECK5-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 848 // CHECK5-NEXT: entry: 849 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 850 // CHECK5-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 851 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 852 // CHECK5-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 853 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 854 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 855 // CHECK5-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 856 // CHECK5-NEXT: ret void 857 // 858 // 859 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 860 // CHECK5-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 861 // CHECK5-NEXT: entry: 862 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 863 // CHECK5-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 864 // CHECK5-NEXT: [[A2:%.*]] = alloca i32, align 4 865 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32*, align 8 866 // CHECK5-NEXT: [[B3:%.*]] = alloca i32, align 4 867 // CHECK5-NEXT: [[C4:%.*]] = alloca i32, align 4 868 // CHECK5-NEXT: [[_TMP5:%.*]] = alloca i32*, align 8 869 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 870 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 871 // CHECK5-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 872 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 873 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 874 // CHECK5-NEXT: store i32 0, i32* [[A]], align 8 875 // CHECK5-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 876 // CHECK5-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 877 // CHECK5-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 878 // CHECK5-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 879 // CHECK5-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 880 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 881 // CHECK5-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 882 // CHECK5-NEXT: store i32* [[A2]], i32** [[TMP]], align 8 883 // CHECK5-NEXT: store i32* [[C4]], i32** [[_TMP5]], align 8 884 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 885 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 886 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 887 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8 888 // CHECK5-NEXT: store i32* [[TMP3]], i32** [[TMP2]], align 8 889 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 890 // CHECK5-NEXT: store i32* [[B3]], i32** [[TMP4]], align 8 891 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 892 // CHECK5-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP5]], align 8 893 // CHECK5-NEXT: store i32* [[TMP6]], i32** [[TMP5]], align 8 894 // CHECK5-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 895 // CHECK5-NEXT: ret void 896 // 897 // 898 // CHECK5-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 899 // CHECK5-SAME: (%class.anon.0* nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 900 // CHECK5-NEXT: entry: 901 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8 902 // CHECK5-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8 903 // CHECK5-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8 904 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 905 // CHECK5-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 906 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 907 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 908 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 909 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 910 // CHECK5-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 911 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 912 // CHECK5-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 913 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 914 // CHECK5-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 915 // CHECK5-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 916 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 917 // CHECK5-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 918 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 919 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 920 // CHECK5-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 921 // CHECK5-NEXT: ret void 922 // 923 // 924 // CHECK6-LABEL: define {{[^@]+}}@main 925 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 926 // CHECK6-NEXT: entry: 927 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 928 // CHECK6-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 929 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 930 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 931 // CHECK6-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 932 // CHECK6-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 933 // CHECK6-NEXT: ret i32 0 934 // 935 // 936 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 937 // CHECK6-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 938 // CHECK6-NEXT: entry: 939 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 940 // CHECK6-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 941 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 942 // CHECK6-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 943 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 944 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 945 // CHECK6-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 946 // CHECK6-NEXT: ret void 947 // 948 // 949 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 950 // CHECK6-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 951 // CHECK6-NEXT: entry: 952 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 953 // CHECK6-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 954 // CHECK6-NEXT: [[A2:%.*]] = alloca i32, align 4 955 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32*, align 8 956 // CHECK6-NEXT: [[B3:%.*]] = alloca i32, align 4 957 // CHECK6-NEXT: [[C4:%.*]] = alloca i32, align 4 958 // CHECK6-NEXT: [[_TMP5:%.*]] = alloca i32*, align 8 959 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 960 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 961 // CHECK6-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 962 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 963 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 964 // CHECK6-NEXT: store i32 0, i32* [[A]], align 8 965 // CHECK6-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 966 // CHECK6-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 967 // CHECK6-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 968 // CHECK6-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 969 // CHECK6-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 970 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 971 // CHECK6-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 972 // CHECK6-NEXT: store i32* [[A2]], i32** [[TMP]], align 8 973 // CHECK6-NEXT: store i32* [[C4]], i32** [[_TMP5]], align 8 974 // CHECK6-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 975 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 976 // CHECK6-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 977 // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8 978 // CHECK6-NEXT: store i32* [[TMP3]], i32** [[TMP2]], align 8 979 // CHECK6-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 980 // CHECK6-NEXT: store i32* [[B3]], i32** [[TMP4]], align 8 981 // CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 982 // CHECK6-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP5]], align 8 983 // CHECK6-NEXT: store i32* [[TMP6]], i32** [[TMP5]], align 8 984 // CHECK6-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 985 // CHECK6-NEXT: ret void 986 // 987 // 988 // CHECK6-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 989 // CHECK6-SAME: (%class.anon.0* nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 990 // CHECK6-NEXT: entry: 991 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8 992 // CHECK6-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8 993 // CHECK6-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8 994 // CHECK6-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 995 // CHECK6-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 996 // CHECK6-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 997 // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 998 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 999 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1000 // CHECK6-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 1001 // CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 1002 // CHECK6-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 1003 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1004 // CHECK6-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 1005 // CHECK6-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 1006 // CHECK6-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 1007 // CHECK6-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 1008 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1009 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 1010 // CHECK6-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 1011 // CHECK6-NEXT: ret void 1012 // 1013 // 1014 // CHECK7-LABEL: define {{[^@]+}}@main 1015 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 1016 // CHECK7-NEXT: entry: 1017 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1018 // CHECK7-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1019 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 1020 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 1021 // CHECK7-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1022 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 1023 // CHECK7-NEXT: ret i32 0 1024 // 1025 // 1026 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1027 // CHECK7-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1028 // CHECK7-NEXT: entry: 1029 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1030 // CHECK7-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 1031 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1032 // CHECK7-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 1033 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1034 // CHECK7-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 1035 // CHECK7-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1036 // CHECK7-NEXT: ret void 1037 // 1038 // 1039 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1040 // CHECK7-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1041 // CHECK7-NEXT: entry: 1042 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1043 // CHECK7-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 1044 // CHECK7-NEXT: [[A2:%.*]] = alloca i32, align 4 1045 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32*, align 4 1046 // CHECK7-NEXT: [[B3:%.*]] = alloca i32, align 4 1047 // CHECK7-NEXT: [[C4:%.*]] = alloca i32, align 4 1048 // CHECK7-NEXT: [[_TMP5:%.*]] = alloca i32*, align 4 1049 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 1050 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1051 // CHECK7-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 1052 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1053 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1054 // CHECK7-NEXT: store i32 0, i32* [[A]], align 4 1055 // CHECK7-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1056 // CHECK7-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1057 // CHECK7-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1058 // CHECK7-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1059 // CHECK7-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1060 // CHECK7-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 1061 // CHECK7-NEXT: store i32* [[TMP0]], i32** [[C]], align 4 1062 // CHECK7-NEXT: store i32* [[A2]], i32** [[TMP]], align 4 1063 // CHECK7-NEXT: store i32* [[C4]], i32** [[_TMP5]], align 4 1064 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1065 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 1066 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1067 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 4 1068 // CHECK7-NEXT: store i32* [[TMP3]], i32** [[TMP2]], align 4 1069 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1070 // CHECK7-NEXT: store i32* [[B3]], i32** [[TMP4]], align 4 1071 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1072 // CHECK7-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP5]], align 4 1073 // CHECK7-NEXT: store i32* [[TMP6]], i32** [[TMP5]], align 4 1074 // CHECK7-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 1075 // CHECK7-NEXT: ret void 1076 // 1077 // 1078 // CHECK7-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 1079 // CHECK7-SAME: (%class.anon.0* nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 1080 // CHECK7-NEXT: entry: 1081 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 4 1082 // CHECK7-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 4 1083 // CHECK7-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 4 1084 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 1085 // CHECK7-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 4 1086 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 1087 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 4 1088 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1089 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1090 // CHECK7-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 1091 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 1092 // CHECK7-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 4 1093 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1094 // CHECK7-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 1095 // CHECK7-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 1096 // CHECK7-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 1097 // CHECK7-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 4 1098 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1099 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 1100 // CHECK7-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 1101 // CHECK7-NEXT: ret void 1102 // 1103 // 1104 // CHECK8-LABEL: define {{[^@]+}}@main 1105 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 1106 // CHECK8-NEXT: entry: 1107 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1108 // CHECK8-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1109 // CHECK8-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 1110 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 1111 // CHECK8-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1112 // CHECK8-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 1113 // CHECK8-NEXT: ret i32 0 1114 // 1115 // 1116 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1117 // CHECK8-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1118 // CHECK8-NEXT: entry: 1119 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1120 // CHECK8-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 1121 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1122 // CHECK8-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 1123 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1124 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 1125 // CHECK8-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1126 // CHECK8-NEXT: ret void 1127 // 1128 // 1129 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1130 // CHECK8-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1131 // CHECK8-NEXT: entry: 1132 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1133 // CHECK8-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 1134 // CHECK8-NEXT: [[A2:%.*]] = alloca i32, align 4 1135 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32*, align 4 1136 // CHECK8-NEXT: [[B3:%.*]] = alloca i32, align 4 1137 // CHECK8-NEXT: [[C4:%.*]] = alloca i32, align 4 1138 // CHECK8-NEXT: [[_TMP5:%.*]] = alloca i32*, align 4 1139 // CHECK8-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 1140 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1141 // CHECK8-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 1142 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1143 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1144 // CHECK8-NEXT: store i32 0, i32* [[A]], align 4 1145 // CHECK8-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1146 // CHECK8-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1147 // CHECK8-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1148 // CHECK8-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1149 // CHECK8-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1150 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 1151 // CHECK8-NEXT: store i32* [[TMP0]], i32** [[C]], align 4 1152 // CHECK8-NEXT: store i32* [[A2]], i32** [[TMP]], align 4 1153 // CHECK8-NEXT: store i32* [[C4]], i32** [[_TMP5]], align 4 1154 // CHECK8-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1155 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 1156 // CHECK8-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1157 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 4 1158 // CHECK8-NEXT: store i32* [[TMP3]], i32** [[TMP2]], align 4 1159 // CHECK8-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1160 // CHECK8-NEXT: store i32* [[B3]], i32** [[TMP4]], align 4 1161 // CHECK8-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1162 // CHECK8-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP5]], align 4 1163 // CHECK8-NEXT: store i32* [[TMP6]], i32** [[TMP5]], align 4 1164 // CHECK8-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 1165 // CHECK8-NEXT: ret void 1166 // 1167 // 1168 // CHECK8-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 1169 // CHECK8-SAME: (%class.anon.0* nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 1170 // CHECK8-NEXT: entry: 1171 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 4 1172 // CHECK8-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 4 1173 // CHECK8-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 4 1174 // CHECK8-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 1175 // CHECK8-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 4 1176 // CHECK8-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 1177 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 4 1178 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1179 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1180 // CHECK8-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 1181 // CHECK8-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 1182 // CHECK8-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 4 1183 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1184 // CHECK8-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 1185 // CHECK8-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 1186 // CHECK8-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 1187 // CHECK8-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 4 1188 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1189 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 1190 // CHECK8-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 1191 // CHECK8-NEXT: ret void 1192 // 1193 // 1194 // CHECK9-LABEL: define {{[^@]+}}@main 1195 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 1196 // CHECK9-NEXT: entry: 1197 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1198 // CHECK9-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 1199 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1200 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1201 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1202 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1203 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 1204 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1205 // CHECK9-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1206 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 1207 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 1208 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1209 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1210 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1211 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1212 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1213 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1214 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 1215 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1216 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1217 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1218 // CHECK9: omp_offload.failed: 1219 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136() #[[ATTR4:[0-9]+]] 1220 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1221 // CHECK9: omp_offload.cont: 1222 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 1223 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1224 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1225 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1226 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1227 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1228 // CHECK9: arraydestroy.body: 1229 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1230 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1231 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1232 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1233 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 1234 // CHECK9: arraydestroy.done1: 1235 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1236 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1237 // CHECK9-NEXT: ret i32 [[TMP4]] 1238 // 1239 // 1240 // CHECK9-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1241 // CHECK9-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1242 // CHECK9-NEXT: entry: 1243 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1244 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1245 // CHECK9-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1246 // CHECK9-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1247 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1248 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1249 // CHECK9-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1250 // CHECK9-NEXT: ret void 1251 // 1252 // 1253 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1254 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1255 // CHECK9-NEXT: entry: 1256 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1257 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1258 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1259 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 1260 // CHECK9-NEXT: ret void 1261 // 1262 // 1263 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1264 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1265 // CHECK9-NEXT: entry: 1266 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1267 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1268 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1269 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1270 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1271 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1272 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1273 // CHECK9-NEXT: ret void 1274 // 1275 // 1276 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136 1277 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 1278 // CHECK9-NEXT: entry: 1279 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1280 // CHECK9-NEXT: ret void 1281 // 1282 // 1283 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1284 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1285 // CHECK9-NEXT: entry: 1286 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1287 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1288 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1289 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1290 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1291 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1292 // CHECK9-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1293 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1294 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1295 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1296 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1297 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1298 // CHECK9: arrayctor.loop: 1299 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1300 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1301 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1302 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1303 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1304 // CHECK9: arrayctor.cont: 1305 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 1306 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 4 1307 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 1308 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 4 1309 // CHECK9-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1310 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8* 1311 // CHECK9-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[VAR]] to i8* 1312 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP1]], i8* align 4 [[TMP2]], i64 4, i1 false) 1313 // CHECK9-NEXT: store i32 3, i32* [[SIVAR]], align 4 1314 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1315 // CHECK9-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1316 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i64 2 1317 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1318 // CHECK9: arraydestroy.body: 1319 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1320 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1321 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1322 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 1323 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1324 // CHECK9: arraydestroy.done3: 1325 // CHECK9-NEXT: ret void 1326 // 1327 // 1328 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1329 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1330 // CHECK9-NEXT: entry: 1331 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1332 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1333 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1334 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1335 // CHECK9-NEXT: ret void 1336 // 1337 // 1338 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1339 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 1340 // CHECK9-NEXT: entry: 1341 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1342 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1343 // CHECK9-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 1344 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1345 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 1346 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 1347 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 1348 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1349 // CHECK9-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 1350 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 128 1351 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1352 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1353 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1354 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 1355 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1356 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 1357 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 signext 3) 1358 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1359 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1360 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1361 // CHECK9: omp_offload.failed: 1362 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86() #[[ATTR4]] 1363 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1364 // CHECK9: omp_offload.cont: 1365 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1366 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1367 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1368 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1369 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1370 // CHECK9: arraydestroy.body: 1371 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1372 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1373 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1374 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1375 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 1376 // CHECK9: arraydestroy.done1: 1377 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1378 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1379 // CHECK9-NEXT: ret i32 [[TMP4]] 1380 // 1381 // 1382 // CHECK9-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1383 // CHECK9-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1384 // CHECK9-NEXT: entry: 1385 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1386 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1387 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1388 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1389 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1390 // CHECK9-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1391 // CHECK9-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1392 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1393 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1394 // CHECK9-NEXT: store i32 0, i32* [[A]], align 8 1395 // CHECK9-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1396 // CHECK9-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1397 // CHECK9-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1398 // CHECK9-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1399 // CHECK9-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1400 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1401 // CHECK9-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 1402 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1403 // CHECK9-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS** 1404 // CHECK9-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8 1405 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1406 // CHECK9-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to %struct.SS** 1407 // CHECK9-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP4]], align 8 1408 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1409 // CHECK9-NEXT: store i8* null, i8** [[TMP5]], align 8 1410 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1411 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1412 // CHECK9-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1413 // CHECK9-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 1414 // CHECK9-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1415 // CHECK9: omp_offload.failed: 1416 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(%struct.SS* [[THIS1]]) #[[ATTR4]] 1417 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1418 // CHECK9: omp_offload.cont: 1419 // CHECK9-NEXT: ret void 1420 // 1421 // 1422 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48 1423 // CHECK9-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 1424 // CHECK9-NEXT: entry: 1425 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1426 // CHECK9-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1427 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1428 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1429 // CHECK9-NEXT: ret void 1430 // 1431 // 1432 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1433 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 1434 // CHECK9-NEXT: entry: 1435 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1436 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1437 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1438 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4 1439 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1440 // CHECK9-NEXT: [[B:%.*]] = alloca i32, align 4 1441 // CHECK9-NEXT: [[C:%.*]] = alloca i32, align 4 1442 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1443 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1444 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1445 // CHECK9-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1446 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1447 // CHECK9-NEXT: store i32* [[A]], i32** [[TMP]], align 8 1448 // CHECK9-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 1449 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 1450 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1451 // CHECK9-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 1452 // CHECK9-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 1453 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[B]], align 4 1454 // CHECK9-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 1455 // CHECK9-NEXT: store i32 [[DEC]], i32* [[B]], align 4 1456 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP1]], align 8 1457 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1458 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 1459 // CHECK9-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 1460 // CHECK9-NEXT: ret void 1461 // 1462 // 1463 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1464 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1465 // CHECK9-NEXT: entry: 1466 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1467 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1468 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1469 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1470 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 1471 // CHECK9-NEXT: ret void 1472 // 1473 // 1474 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1475 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1476 // CHECK9-NEXT: entry: 1477 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1478 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1479 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1480 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1481 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1482 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1483 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1484 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 1485 // CHECK9-NEXT: ret void 1486 // 1487 // 1488 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1489 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1490 // CHECK9-NEXT: entry: 1491 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1492 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1493 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1494 // CHECK9-NEXT: ret void 1495 // 1496 // 1497 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1498 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1499 // CHECK9-NEXT: entry: 1500 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1501 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1502 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1503 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 1504 // CHECK9-NEXT: ret void 1505 // 1506 // 1507 // CHECK9-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 1508 // CHECK9-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1509 // CHECK9-NEXT: entry: 1510 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1511 // CHECK9-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1512 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1513 // CHECK9-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 1514 // CHECK9-NEXT: ret void 1515 // 1516 // 1517 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1518 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1519 // CHECK9-NEXT: entry: 1520 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1521 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1522 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1523 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1524 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1525 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1526 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 1527 // CHECK9-NEXT: ret void 1528 // 1529 // 1530 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86 1531 // CHECK9-SAME: () #[[ATTR3]] { 1532 // CHECK9-NEXT: entry: 1533 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 1534 // CHECK9-NEXT: ret void 1535 // 1536 // 1537 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 1538 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1539 // CHECK9-NEXT: entry: 1540 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1541 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1542 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1543 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 1544 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 1545 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 1546 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1547 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1548 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1549 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1550 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1551 // CHECK9: arrayctor.loop: 1552 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1553 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1554 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1555 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1556 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1557 // CHECK9: arrayctor.cont: 1558 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 1559 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 128 1560 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 1561 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 128 1562 // CHECK9-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1563 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast %struct.S.0* [[ARRAYIDX1]] to i8* 1564 // CHECK9-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[VAR]] to i8* 1565 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP1]], i8* align 128 [[TMP2]], i64 4, i1 false) 1566 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1567 // CHECK9-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1568 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN2]], i64 2 1569 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1570 // CHECK9: arraydestroy.body: 1571 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1572 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1573 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1574 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 1575 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1576 // CHECK9: arraydestroy.done3: 1577 // CHECK9-NEXT: ret void 1578 // 1579 // 1580 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1581 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1582 // CHECK9-NEXT: entry: 1583 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1584 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1585 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1586 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1587 // CHECK9-NEXT: ret void 1588 // 1589 // 1590 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1591 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1592 // CHECK9-NEXT: entry: 1593 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1594 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1595 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1596 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1597 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 1598 // CHECK9-NEXT: ret void 1599 // 1600 // 1601 // CHECK9-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 1602 // CHECK9-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1603 // CHECK9-NEXT: entry: 1604 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1605 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1606 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1607 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1608 // CHECK9-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1609 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1610 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 1611 // CHECK9-NEXT: store i32 0, i32* [[A]], align 4 1612 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1613 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SST** 1614 // CHECK9-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP1]], align 8 1615 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1616 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SST** 1617 // CHECK9-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP3]], align 8 1618 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1619 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 1620 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1621 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1622 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1623 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1624 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1625 // CHECK9: omp_offload.failed: 1626 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64(%struct.SST* [[THIS1]]) #[[ATTR4]] 1627 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1628 // CHECK9: omp_offload.cont: 1629 // CHECK9-NEXT: ret void 1630 // 1631 // 1632 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64 1633 // CHECK9-SAME: (%struct.SST* [[THIS:%.*]]) #[[ATTR3]] { 1634 // CHECK9-NEXT: entry: 1635 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1636 // CHECK9-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1637 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1638 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SST* [[TMP0]]) 1639 // CHECK9-NEXT: ret void 1640 // 1641 // 1642 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 1643 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SST* [[THIS:%.*]]) #[[ATTR3]] { 1644 // CHECK9-NEXT: entry: 1645 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1646 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1647 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1648 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4 1649 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1650 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1651 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1652 // CHECK9-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1653 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1654 // CHECK9-NEXT: store i32* [[A]], i32** [[TMP]], align 8 1655 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 1656 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1657 // CHECK9-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 1658 // CHECK9-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 1659 // CHECK9-NEXT: ret void 1660 // 1661 // 1662 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1663 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1664 // CHECK9-NEXT: entry: 1665 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1666 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1667 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1668 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1669 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1670 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1671 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1672 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1673 // CHECK9-NEXT: ret void 1674 // 1675 // 1676 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1677 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1678 // CHECK9-NEXT: entry: 1679 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1680 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1681 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1682 // CHECK9-NEXT: ret void 1683 // 1684 // 1685 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1686 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1687 // CHECK9-NEXT: entry: 1688 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1689 // CHECK9-NEXT: ret void 1690 // 1691 // 1692 // CHECK10-LABEL: define {{[^@]+}}@main 1693 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1694 // CHECK10-NEXT: entry: 1695 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1696 // CHECK10-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 1697 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1698 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1699 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1700 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1701 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 1702 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1703 // CHECK10-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1704 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 1705 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1706 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1707 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1708 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1709 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1710 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1711 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1712 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 1713 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1714 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1715 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1716 // CHECK10: omp_offload.failed: 1717 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136() #[[ATTR4:[0-9]+]] 1718 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1719 // CHECK10: omp_offload.cont: 1720 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 1721 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1722 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1723 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1724 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1725 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1726 // CHECK10: arraydestroy.body: 1727 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1728 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1729 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1730 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1731 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 1732 // CHECK10: arraydestroy.done1: 1733 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1734 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1735 // CHECK10-NEXT: ret i32 [[TMP4]] 1736 // 1737 // 1738 // CHECK10-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1739 // CHECK10-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1740 // CHECK10-NEXT: entry: 1741 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1742 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1743 // CHECK10-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1744 // CHECK10-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1745 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1746 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1747 // CHECK10-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1748 // CHECK10-NEXT: ret void 1749 // 1750 // 1751 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1752 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1753 // CHECK10-NEXT: entry: 1754 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1755 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1756 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1757 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 1758 // CHECK10-NEXT: ret void 1759 // 1760 // 1761 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1762 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1763 // CHECK10-NEXT: entry: 1764 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1765 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1766 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1767 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1768 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1769 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1770 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1771 // CHECK10-NEXT: ret void 1772 // 1773 // 1774 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136 1775 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] { 1776 // CHECK10-NEXT: entry: 1777 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1778 // CHECK10-NEXT: ret void 1779 // 1780 // 1781 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1782 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1783 // CHECK10-NEXT: entry: 1784 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1785 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1786 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1787 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1788 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1789 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1790 // CHECK10-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1791 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1792 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1793 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1794 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1795 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1796 // CHECK10: arrayctor.loop: 1797 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1798 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1799 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1800 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1801 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1802 // CHECK10: arrayctor.cont: 1803 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 1804 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 4 1805 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 1806 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 4 1807 // CHECK10-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1808 // CHECK10-NEXT: [[TMP1:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8* 1809 // CHECK10-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[VAR]] to i8* 1810 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP1]], i8* align 4 [[TMP2]], i64 4, i1 false) 1811 // CHECK10-NEXT: store i32 3, i32* [[SIVAR]], align 4 1812 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1813 // CHECK10-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1814 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i64 2 1815 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1816 // CHECK10: arraydestroy.body: 1817 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1818 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1819 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1820 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 1821 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1822 // CHECK10: arraydestroy.done3: 1823 // CHECK10-NEXT: ret void 1824 // 1825 // 1826 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1827 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1828 // CHECK10-NEXT: entry: 1829 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1830 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1831 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1832 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1833 // CHECK10-NEXT: ret void 1834 // 1835 // 1836 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1837 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 1838 // CHECK10-NEXT: entry: 1839 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1840 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1841 // CHECK10-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 1842 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1843 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 1844 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 1845 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 1846 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1847 // CHECK10-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 1848 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 128 1849 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1850 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1851 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1852 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 1853 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1854 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 1855 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 signext 3) 1856 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1857 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1858 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1859 // CHECK10: omp_offload.failed: 1860 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86() #[[ATTR4]] 1861 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1862 // CHECK10: omp_offload.cont: 1863 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1864 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1865 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1866 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1867 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1868 // CHECK10: arraydestroy.body: 1869 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1870 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1871 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1872 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1873 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 1874 // CHECK10: arraydestroy.done1: 1875 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1876 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1877 // CHECK10-NEXT: ret i32 [[TMP4]] 1878 // 1879 // 1880 // CHECK10-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1881 // CHECK10-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1882 // CHECK10-NEXT: entry: 1883 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1884 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1885 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1886 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1887 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1888 // CHECK10-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1889 // CHECK10-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1890 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1891 // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1892 // CHECK10-NEXT: store i32 0, i32* [[A]], align 8 1893 // CHECK10-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1894 // CHECK10-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1895 // CHECK10-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1896 // CHECK10-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1897 // CHECK10-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1898 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1899 // CHECK10-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 1900 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1901 // CHECK10-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS** 1902 // CHECK10-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8 1903 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1904 // CHECK10-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to %struct.SS** 1905 // CHECK10-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP4]], align 8 1906 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1907 // CHECK10-NEXT: store i8* null, i8** [[TMP5]], align 8 1908 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1909 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1910 // CHECK10-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1911 // CHECK10-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 1912 // CHECK10-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1913 // CHECK10: omp_offload.failed: 1914 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(%struct.SS* [[THIS1]]) #[[ATTR4]] 1915 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1916 // CHECK10: omp_offload.cont: 1917 // CHECK10-NEXT: ret void 1918 // 1919 // 1920 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48 1921 // CHECK10-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 1922 // CHECK10-NEXT: entry: 1923 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1924 // CHECK10-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1925 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1926 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1927 // CHECK10-NEXT: ret void 1928 // 1929 // 1930 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 1931 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 1932 // CHECK10-NEXT: entry: 1933 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1934 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1935 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1936 // CHECK10-NEXT: [[A:%.*]] = alloca i32, align 4 1937 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1938 // CHECK10-NEXT: [[B:%.*]] = alloca i32, align 4 1939 // CHECK10-NEXT: [[C:%.*]] = alloca i32, align 4 1940 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1941 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1942 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1943 // CHECK10-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1944 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1945 // CHECK10-NEXT: store i32* [[A]], i32** [[TMP]], align 8 1946 // CHECK10-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 1947 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 1948 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1949 // CHECK10-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 1950 // CHECK10-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 1951 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[B]], align 4 1952 // CHECK10-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 1953 // CHECK10-NEXT: store i32 [[DEC]], i32* [[B]], align 4 1954 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP1]], align 8 1955 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1956 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 1957 // CHECK10-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 1958 // CHECK10-NEXT: ret void 1959 // 1960 // 1961 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1962 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1963 // CHECK10-NEXT: entry: 1964 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1965 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1966 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1967 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1968 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 1969 // CHECK10-NEXT: ret void 1970 // 1971 // 1972 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1973 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1974 // CHECK10-NEXT: entry: 1975 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1976 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1977 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1978 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1979 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1980 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1981 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1982 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 1983 // CHECK10-NEXT: ret void 1984 // 1985 // 1986 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1987 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1988 // CHECK10-NEXT: entry: 1989 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1990 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1991 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1992 // CHECK10-NEXT: ret void 1993 // 1994 // 1995 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1996 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1997 // CHECK10-NEXT: entry: 1998 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1999 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2000 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2001 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 2002 // CHECK10-NEXT: ret void 2003 // 2004 // 2005 // CHECK10-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 2006 // CHECK10-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2007 // CHECK10-NEXT: entry: 2008 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 2009 // CHECK10-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 2010 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 2011 // CHECK10-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 2012 // CHECK10-NEXT: ret void 2013 // 2014 // 2015 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2016 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2017 // CHECK10-NEXT: entry: 2018 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2019 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2020 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2021 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2022 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2023 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2024 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 2025 // CHECK10-NEXT: ret void 2026 // 2027 // 2028 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86 2029 // CHECK10-SAME: () #[[ATTR3]] { 2030 // CHECK10-NEXT: entry: 2031 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 2032 // CHECK10-NEXT: ret void 2033 // 2034 // 2035 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 2036 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2037 // CHECK10-NEXT: entry: 2038 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2039 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2040 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 2041 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 2042 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 2043 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 2044 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2045 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2046 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2047 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2048 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2049 // CHECK10: arrayctor.loop: 2050 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2051 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2052 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 2053 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2054 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2055 // CHECK10: arrayctor.cont: 2056 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 2057 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 128 2058 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 2059 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 128 2060 // CHECK10-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 2061 // CHECK10-NEXT: [[TMP1:%.*]] = bitcast %struct.S.0* [[ARRAYIDX1]] to i8* 2062 // CHECK10-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[VAR]] to i8* 2063 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP1]], i8* align 128 [[TMP2]], i64 4, i1 false) 2064 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2065 // CHECK10-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2066 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN2]], i64 2 2067 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2068 // CHECK10: arraydestroy.body: 2069 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2070 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2071 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2072 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 2073 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 2074 // CHECK10: arraydestroy.done3: 2075 // CHECK10-NEXT: ret void 2076 // 2077 // 2078 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2079 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2080 // CHECK10-NEXT: entry: 2081 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2082 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2083 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2084 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2085 // CHECK10-NEXT: ret void 2086 // 2087 // 2088 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2089 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2090 // CHECK10-NEXT: entry: 2091 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2092 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2093 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2094 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2095 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 2096 // CHECK10-NEXT: ret void 2097 // 2098 // 2099 // CHECK10-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 2100 // CHECK10-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2101 // CHECK10-NEXT: entry: 2102 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 2103 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2104 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2105 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2106 // CHECK10-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 2107 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 2108 // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 2109 // CHECK10-NEXT: store i32 0, i32* [[A]], align 4 2110 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2111 // CHECK10-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SST** 2112 // CHECK10-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP1]], align 8 2113 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2114 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SST** 2115 // CHECK10-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP3]], align 8 2116 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2117 // CHECK10-NEXT: store i8* null, i8** [[TMP4]], align 8 2118 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2119 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2120 // CHECK10-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2121 // CHECK10-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2122 // CHECK10-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2123 // CHECK10: omp_offload.failed: 2124 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64(%struct.SST* [[THIS1]]) #[[ATTR4]] 2125 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 2126 // CHECK10: omp_offload.cont: 2127 // CHECK10-NEXT: ret void 2128 // 2129 // 2130 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64 2131 // CHECK10-SAME: (%struct.SST* [[THIS:%.*]]) #[[ATTR3]] { 2132 // CHECK10-NEXT: entry: 2133 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 2134 // CHECK10-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 2135 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 2136 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SST* [[TMP0]]) 2137 // CHECK10-NEXT: ret void 2138 // 2139 // 2140 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 2141 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SST* [[THIS:%.*]]) #[[ATTR3]] { 2142 // CHECK10-NEXT: entry: 2143 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2144 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2145 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 2146 // CHECK10-NEXT: [[A:%.*]] = alloca i32, align 4 2147 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2148 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2149 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2150 // CHECK10-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 2151 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 2152 // CHECK10-NEXT: store i32* [[A]], i32** [[TMP]], align 8 2153 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 2154 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2155 // CHECK10-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 2156 // CHECK10-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 2157 // CHECK10-NEXT: ret void 2158 // 2159 // 2160 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2161 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2162 // CHECK10-NEXT: entry: 2163 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2164 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2165 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2166 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2167 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2168 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2169 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2170 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2171 // CHECK10-NEXT: ret void 2172 // 2173 // 2174 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2175 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2176 // CHECK10-NEXT: entry: 2177 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2178 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2179 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2180 // CHECK10-NEXT: ret void 2181 // 2182 // 2183 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2184 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 2185 // CHECK10-NEXT: entry: 2186 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2187 // CHECK10-NEXT: ret void 2188 // 2189 // 2190 // CHECK11-LABEL: define {{[^@]+}}@main 2191 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2192 // CHECK11-NEXT: entry: 2193 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2194 // CHECK11-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2195 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2196 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2197 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2198 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2199 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 2200 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2201 // CHECK11-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 2202 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 2203 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2204 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2205 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2206 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2207 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 2208 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2209 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 2210 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 2211 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2212 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2213 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2214 // CHECK11: omp_offload.failed: 2215 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136() #[[ATTR4:[0-9]+]] 2216 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2217 // CHECK11: omp_offload.cont: 2218 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 2219 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2220 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2221 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2222 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2223 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2224 // CHECK11: arraydestroy.body: 2225 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2226 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2227 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2228 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2229 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 2230 // CHECK11: arraydestroy.done1: 2231 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2232 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2233 // CHECK11-NEXT: ret i32 [[TMP4]] 2234 // 2235 // 2236 // CHECK11-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 2237 // CHECK11-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2238 // CHECK11-NEXT: entry: 2239 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2240 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 2241 // CHECK11-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2242 // CHECK11-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 2243 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2244 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 2245 // CHECK11-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 2246 // CHECK11-NEXT: ret void 2247 // 2248 // 2249 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2250 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2251 // CHECK11-NEXT: entry: 2252 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2253 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2254 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2255 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 2256 // CHECK11-NEXT: ret void 2257 // 2258 // 2259 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2260 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2261 // CHECK11-NEXT: entry: 2262 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2263 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2264 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2265 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2266 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2267 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2268 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 2269 // CHECK11-NEXT: ret void 2270 // 2271 // 2272 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136 2273 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { 2274 // CHECK11-NEXT: entry: 2275 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 2276 // CHECK11-NEXT: ret void 2277 // 2278 // 2279 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2280 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2281 // CHECK11-NEXT: entry: 2282 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2283 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2284 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2285 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2286 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2287 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2288 // CHECK11-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 2289 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2290 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2291 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2292 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2293 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2294 // CHECK11: arrayctor.loop: 2295 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2296 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2297 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 2298 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2299 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2300 // CHECK11: arrayctor.cont: 2301 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 2302 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 4 2303 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 0 2304 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 4 2305 // CHECK11-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2306 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8* 2307 // CHECK11-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[VAR]] to i8* 2308 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP1]], i8* align 4 [[TMP2]], i32 4, i1 false) 2309 // CHECK11-NEXT: store i32 3, i32* [[SIVAR]], align 4 2310 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2311 // CHECK11-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2312 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i32 2 2313 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2314 // CHECK11: arraydestroy.body: 2315 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2316 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2317 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2318 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 2319 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 2320 // CHECK11: arraydestroy.done3: 2321 // CHECK11-NEXT: ret void 2322 // 2323 // 2324 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2325 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2326 // CHECK11-NEXT: entry: 2327 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2328 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2329 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2330 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2331 // CHECK11-NEXT: ret void 2332 // 2333 // 2334 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2335 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 2336 // CHECK11-NEXT: entry: 2337 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2338 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2339 // CHECK11-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 2340 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 2341 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 2342 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 2343 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 2344 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 2345 // CHECK11-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 2346 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 128 2347 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2348 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2349 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2350 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 2351 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2352 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 2353 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 2354 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2355 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2356 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2357 // CHECK11: omp_offload.failed: 2358 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86() #[[ATTR4]] 2359 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2360 // CHECK11: omp_offload.cont: 2361 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2362 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2363 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2364 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2365 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2366 // CHECK11: arraydestroy.body: 2367 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2368 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2369 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2370 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2371 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 2372 // CHECK11: arraydestroy.done1: 2373 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2374 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2375 // CHECK11-NEXT: ret i32 [[TMP4]] 2376 // 2377 // 2378 // CHECK11-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 2379 // CHECK11-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2380 // CHECK11-NEXT: entry: 2381 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2382 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 2383 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2384 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2385 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2386 // CHECK11-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2387 // CHECK11-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 2388 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2389 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2390 // CHECK11-NEXT: store i32 0, i32* [[A]], align 4 2391 // CHECK11-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 2392 // CHECK11-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 2393 // CHECK11-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 2394 // CHECK11-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 2395 // CHECK11-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2396 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 2397 // CHECK11-NEXT: store i32* [[TMP0]], i32** [[C]], align 4 2398 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2399 // CHECK11-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS** 2400 // CHECK11-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4 2401 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2402 // CHECK11-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to %struct.SS** 2403 // CHECK11-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP4]], align 4 2404 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2405 // CHECK11-NEXT: store i8* null, i8** [[TMP5]], align 4 2406 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2407 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2408 // CHECK11-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2409 // CHECK11-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 2410 // CHECK11-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2411 // CHECK11: omp_offload.failed: 2412 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(%struct.SS* [[THIS1]]) #[[ATTR4]] 2413 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2414 // CHECK11: omp_offload.cont: 2415 // CHECK11-NEXT: ret void 2416 // 2417 // 2418 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48 2419 // CHECK11-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 2420 // CHECK11-NEXT: entry: 2421 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2422 // CHECK11-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2423 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2424 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2425 // CHECK11-NEXT: ret void 2426 // 2427 // 2428 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2429 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 2430 // CHECK11-NEXT: entry: 2431 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2432 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2433 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2434 // CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4 2435 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32*, align 4 2436 // CHECK11-NEXT: [[B:%.*]] = alloca i32, align 4 2437 // CHECK11-NEXT: [[C:%.*]] = alloca i32, align 4 2438 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32*, align 4 2439 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2440 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2441 // CHECK11-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2442 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2443 // CHECK11-NEXT: store i32* [[A]], i32** [[TMP]], align 4 2444 // CHECK11-NEXT: store i32* [[C]], i32** [[_TMP1]], align 4 2445 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 4 2446 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2447 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 2448 // CHECK11-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 2449 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[B]], align 4 2450 // CHECK11-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 2451 // CHECK11-NEXT: store i32 [[DEC]], i32* [[B]], align 4 2452 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP1]], align 4 2453 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2454 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 2455 // CHECK11-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 2456 // CHECK11-NEXT: ret void 2457 // 2458 // 2459 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2460 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2461 // CHECK11-NEXT: entry: 2462 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2463 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2464 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2465 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2466 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 2467 // CHECK11-NEXT: ret void 2468 // 2469 // 2470 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2471 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2472 // CHECK11-NEXT: entry: 2473 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2474 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2475 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2476 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2477 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2478 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2479 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2480 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 2481 // CHECK11-NEXT: ret void 2482 // 2483 // 2484 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2485 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2486 // CHECK11-NEXT: entry: 2487 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2488 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2489 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2490 // CHECK11-NEXT: ret void 2491 // 2492 // 2493 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2494 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2495 // CHECK11-NEXT: entry: 2496 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2497 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2498 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2499 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 2500 // CHECK11-NEXT: ret void 2501 // 2502 // 2503 // CHECK11-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 2504 // CHECK11-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2505 // CHECK11-NEXT: entry: 2506 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 2507 // CHECK11-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 2508 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 2509 // CHECK11-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 2510 // CHECK11-NEXT: ret void 2511 // 2512 // 2513 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2514 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2515 // CHECK11-NEXT: entry: 2516 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2517 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2518 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2519 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2520 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2521 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2522 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 2523 // CHECK11-NEXT: ret void 2524 // 2525 // 2526 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86 2527 // CHECK11-SAME: () #[[ATTR3]] { 2528 // CHECK11-NEXT: entry: 2529 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 2530 // CHECK11-NEXT: ret void 2531 // 2532 // 2533 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 2534 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2535 // CHECK11-NEXT: entry: 2536 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2537 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2538 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 2539 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 2540 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 2541 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 2542 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2543 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2544 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2545 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2546 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2547 // CHECK11: arrayctor.loop: 2548 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2549 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2550 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2551 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2552 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2553 // CHECK11: arrayctor.cont: 2554 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 2555 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 128 2556 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 0 2557 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 128 2558 // CHECK11-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2559 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast %struct.S.0* [[ARRAYIDX1]] to i8* 2560 // CHECK11-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[VAR]] to i8* 2561 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP1]], i8* align 128 [[TMP2]], i32 4, i1 false) 2562 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2563 // CHECK11-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2564 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN2]], i32 2 2565 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2566 // CHECK11: arraydestroy.body: 2567 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2568 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2569 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2570 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 2571 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 2572 // CHECK11: arraydestroy.done3: 2573 // CHECK11-NEXT: ret void 2574 // 2575 // 2576 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2577 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2578 // CHECK11-NEXT: entry: 2579 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2580 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2581 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2582 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2583 // CHECK11-NEXT: ret void 2584 // 2585 // 2586 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2587 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2588 // CHECK11-NEXT: entry: 2589 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2590 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2591 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2592 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2593 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 2594 // CHECK11-NEXT: ret void 2595 // 2596 // 2597 // CHECK11-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 2598 // CHECK11-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2599 // CHECK11-NEXT: entry: 2600 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 2601 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2602 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2603 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2604 // CHECK11-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 2605 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 2606 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 2607 // CHECK11-NEXT: store i32 0, i32* [[A]], align 4 2608 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2609 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SST** 2610 // CHECK11-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP1]], align 4 2611 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2612 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SST** 2613 // CHECK11-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP3]], align 4 2614 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2615 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 2616 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2617 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2618 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2619 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2620 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2621 // CHECK11: omp_offload.failed: 2622 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64(%struct.SST* [[THIS1]]) #[[ATTR4]] 2623 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2624 // CHECK11: omp_offload.cont: 2625 // CHECK11-NEXT: ret void 2626 // 2627 // 2628 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64 2629 // CHECK11-SAME: (%struct.SST* [[THIS:%.*]]) #[[ATTR3]] { 2630 // CHECK11-NEXT: entry: 2631 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 2632 // CHECK11-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 2633 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 2634 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SST* [[TMP0]]) 2635 // CHECK11-NEXT: ret void 2636 // 2637 // 2638 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 2639 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SST* [[THIS:%.*]]) #[[ATTR3]] { 2640 // CHECK11-NEXT: entry: 2641 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2642 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2643 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 2644 // CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4 2645 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32*, align 4 2646 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2647 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2648 // CHECK11-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 2649 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 2650 // CHECK11-NEXT: store i32* [[A]], i32** [[TMP]], align 4 2651 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 4 2652 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2653 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 2654 // CHECK11-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 2655 // CHECK11-NEXT: ret void 2656 // 2657 // 2658 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2659 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2660 // CHECK11-NEXT: entry: 2661 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2662 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2663 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2664 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2665 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2666 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2667 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2668 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2669 // CHECK11-NEXT: ret void 2670 // 2671 // 2672 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2673 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2674 // CHECK11-NEXT: entry: 2675 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2676 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2677 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2678 // CHECK11-NEXT: ret void 2679 // 2680 // 2681 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2682 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 2683 // CHECK11-NEXT: entry: 2684 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2685 // CHECK11-NEXT: ret void 2686 // 2687 // 2688 // CHECK12-LABEL: define {{[^@]+}}@main 2689 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 2690 // CHECK12-NEXT: entry: 2691 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2692 // CHECK12-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2693 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2694 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2695 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2696 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2697 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 2698 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2699 // CHECK12-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 2700 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 2701 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 2702 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2703 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2704 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2705 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 2706 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2707 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 2708 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 2709 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2710 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2711 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2712 // CHECK12: omp_offload.failed: 2713 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136() #[[ATTR4:[0-9]+]] 2714 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2715 // CHECK12: omp_offload.cont: 2716 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 2717 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2718 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2719 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2720 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2721 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2722 // CHECK12: arraydestroy.body: 2723 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2724 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2725 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2726 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2727 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 2728 // CHECK12: arraydestroy.done1: 2729 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2730 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2731 // CHECK12-NEXT: ret i32 [[TMP4]] 2732 // 2733 // 2734 // CHECK12-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 2735 // CHECK12-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2736 // CHECK12-NEXT: entry: 2737 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2738 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 2739 // CHECK12-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2740 // CHECK12-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 2741 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2742 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 2743 // CHECK12-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 2744 // CHECK12-NEXT: ret void 2745 // 2746 // 2747 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2748 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2749 // CHECK12-NEXT: entry: 2750 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2751 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2752 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2753 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 2754 // CHECK12-NEXT: ret void 2755 // 2756 // 2757 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2758 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2759 // CHECK12-NEXT: entry: 2760 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2761 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2762 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2763 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2764 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2765 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2766 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 2767 // CHECK12-NEXT: ret void 2768 // 2769 // 2770 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136 2771 // CHECK12-SAME: () #[[ATTR3:[0-9]+]] { 2772 // CHECK12-NEXT: entry: 2773 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 2774 // CHECK12-NEXT: ret void 2775 // 2776 // 2777 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 2778 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2779 // CHECK12-NEXT: entry: 2780 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2781 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2782 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2783 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2784 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2785 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2786 // CHECK12-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 2787 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2788 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2789 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2790 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2791 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2792 // CHECK12: arrayctor.loop: 2793 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2794 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2795 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 2796 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2797 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2798 // CHECK12: arrayctor.cont: 2799 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 2800 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 4 2801 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 0 2802 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 4 2803 // CHECK12-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2804 // CHECK12-NEXT: [[TMP1:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8* 2805 // CHECK12-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[VAR]] to i8* 2806 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP1]], i8* align 4 [[TMP2]], i32 4, i1 false) 2807 // CHECK12-NEXT: store i32 3, i32* [[SIVAR]], align 4 2808 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2809 // CHECK12-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2810 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i32 2 2811 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2812 // CHECK12: arraydestroy.body: 2813 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2814 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2815 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2816 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 2817 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 2818 // CHECK12: arraydestroy.done3: 2819 // CHECK12-NEXT: ret void 2820 // 2821 // 2822 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2823 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2824 // CHECK12-NEXT: entry: 2825 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2826 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2827 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2828 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2829 // CHECK12-NEXT: ret void 2830 // 2831 // 2832 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2833 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat { 2834 // CHECK12-NEXT: entry: 2835 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2836 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2837 // CHECK12-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 2838 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 2839 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 2840 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 2841 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 2842 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 2843 // CHECK12-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 2844 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 128 2845 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2846 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2847 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2848 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 2849 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2850 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 2851 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 2852 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2853 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2854 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2855 // CHECK12: omp_offload.failed: 2856 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86() #[[ATTR4]] 2857 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2858 // CHECK12: omp_offload.cont: 2859 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2860 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2861 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2862 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2863 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2864 // CHECK12: arraydestroy.body: 2865 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2866 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2867 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2868 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2869 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 2870 // CHECK12: arraydestroy.done1: 2871 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2872 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2873 // CHECK12-NEXT: ret i32 [[TMP4]] 2874 // 2875 // 2876 // CHECK12-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 2877 // CHECK12-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2878 // CHECK12-NEXT: entry: 2879 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2880 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 2881 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2882 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2883 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2884 // CHECK12-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2885 // CHECK12-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 2886 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2887 // CHECK12-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2888 // CHECK12-NEXT: store i32 0, i32* [[A]], align 4 2889 // CHECK12-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 2890 // CHECK12-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 2891 // CHECK12-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 2892 // CHECK12-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 2893 // CHECK12-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2894 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 2895 // CHECK12-NEXT: store i32* [[TMP0]], i32** [[C]], align 4 2896 // CHECK12-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2897 // CHECK12-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS** 2898 // CHECK12-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4 2899 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2900 // CHECK12-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to %struct.SS** 2901 // CHECK12-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP4]], align 4 2902 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2903 // CHECK12-NEXT: store i8* null, i8** [[TMP5]], align 4 2904 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2905 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2906 // CHECK12-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2907 // CHECK12-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 2908 // CHECK12-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2909 // CHECK12: omp_offload.failed: 2910 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(%struct.SS* [[THIS1]]) #[[ATTR4]] 2911 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2912 // CHECK12: omp_offload.cont: 2913 // CHECK12-NEXT: ret void 2914 // 2915 // 2916 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48 2917 // CHECK12-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 2918 // CHECK12-NEXT: entry: 2919 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2920 // CHECK12-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2921 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2922 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2923 // CHECK12-NEXT: ret void 2924 // 2925 // 2926 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 2927 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 2928 // CHECK12-NEXT: entry: 2929 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2930 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2931 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2932 // CHECK12-NEXT: [[A:%.*]] = alloca i32, align 4 2933 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32*, align 4 2934 // CHECK12-NEXT: [[B:%.*]] = alloca i32, align 4 2935 // CHECK12-NEXT: [[C:%.*]] = alloca i32, align 4 2936 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32*, align 4 2937 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2938 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2939 // CHECK12-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2940 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2941 // CHECK12-NEXT: store i32* [[A]], i32** [[TMP]], align 4 2942 // CHECK12-NEXT: store i32* [[C]], i32** [[_TMP1]], align 4 2943 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 4 2944 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2945 // CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 2946 // CHECK12-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 2947 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[B]], align 4 2948 // CHECK12-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 2949 // CHECK12-NEXT: store i32 [[DEC]], i32* [[B]], align 4 2950 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP1]], align 4 2951 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2952 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 2953 // CHECK12-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 2954 // CHECK12-NEXT: ret void 2955 // 2956 // 2957 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2958 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2959 // CHECK12-NEXT: entry: 2960 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2961 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2962 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2963 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2964 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 2965 // CHECK12-NEXT: ret void 2966 // 2967 // 2968 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2969 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2970 // CHECK12-NEXT: entry: 2971 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2972 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2973 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2974 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2975 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2976 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2977 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2978 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 2979 // CHECK12-NEXT: ret void 2980 // 2981 // 2982 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2983 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2984 // CHECK12-NEXT: entry: 2985 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2986 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2987 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2988 // CHECK12-NEXT: ret void 2989 // 2990 // 2991 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2992 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2993 // CHECK12-NEXT: entry: 2994 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2995 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2996 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2997 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 2998 // CHECK12-NEXT: ret void 2999 // 3000 // 3001 // CHECK12-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 3002 // CHECK12-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3003 // CHECK12-NEXT: entry: 3004 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 3005 // CHECK12-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 3006 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 3007 // CHECK12-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 3008 // CHECK12-NEXT: ret void 3009 // 3010 // 3011 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3012 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3013 // CHECK12-NEXT: entry: 3014 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3015 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3016 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3017 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3018 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3019 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3020 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 3021 // CHECK12-NEXT: ret void 3022 // 3023 // 3024 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86 3025 // CHECK12-SAME: () #[[ATTR3]] { 3026 // CHECK12-NEXT: entry: 3027 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 3028 // CHECK12-NEXT: ret void 3029 // 3030 // 3031 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 3032 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3033 // CHECK12-NEXT: entry: 3034 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3035 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3036 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 3037 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 3038 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 3039 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 3040 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3041 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3042 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3043 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3044 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3045 // CHECK12: arrayctor.loop: 3046 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3047 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3048 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 3049 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3050 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3051 // CHECK12: arrayctor.cont: 3052 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 3053 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 128 3054 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 0 3055 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 128 3056 // CHECK12-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3057 // CHECK12-NEXT: [[TMP1:%.*]] = bitcast %struct.S.0* [[ARRAYIDX1]] to i8* 3058 // CHECK12-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[VAR]] to i8* 3059 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP1]], i8* align 128 [[TMP2]], i32 4, i1 false) 3060 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3061 // CHECK12-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3062 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN2]], i32 2 3063 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3064 // CHECK12: arraydestroy.body: 3065 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3066 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3067 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3068 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 3069 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 3070 // CHECK12: arraydestroy.done3: 3071 // CHECK12-NEXT: ret void 3072 // 3073 // 3074 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3075 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3076 // CHECK12-NEXT: entry: 3077 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3078 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3079 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3080 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3081 // CHECK12-NEXT: ret void 3082 // 3083 // 3084 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3085 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3086 // CHECK12-NEXT: entry: 3087 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3088 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3089 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3090 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3091 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 3092 // CHECK12-NEXT: ret void 3093 // 3094 // 3095 // CHECK12-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 3096 // CHECK12-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3097 // CHECK12-NEXT: entry: 3098 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 3099 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 3100 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 3101 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 3102 // CHECK12-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 3103 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 3104 // CHECK12-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 3105 // CHECK12-NEXT: store i32 0, i32* [[A]], align 4 3106 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3107 // CHECK12-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SST** 3108 // CHECK12-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP1]], align 4 3109 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3110 // CHECK12-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SST** 3111 // CHECK12-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP3]], align 4 3112 // CHECK12-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3113 // CHECK12-NEXT: store i8* null, i8** [[TMP4]], align 4 3114 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3115 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3116 // CHECK12-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3117 // CHECK12-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 3118 // CHECK12-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3119 // CHECK12: omp_offload.failed: 3120 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64(%struct.SST* [[THIS1]]) #[[ATTR4]] 3121 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3122 // CHECK12: omp_offload.cont: 3123 // CHECK12-NEXT: ret void 3124 // 3125 // 3126 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64 3127 // CHECK12-SAME: (%struct.SST* [[THIS:%.*]]) #[[ATTR3]] { 3128 // CHECK12-NEXT: entry: 3129 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 3130 // CHECK12-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 3131 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 3132 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SST* [[TMP0]]) 3133 // CHECK12-NEXT: ret void 3134 // 3135 // 3136 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3 3137 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SST* [[THIS:%.*]]) #[[ATTR3]] { 3138 // CHECK12-NEXT: entry: 3139 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3140 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3141 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 3142 // CHECK12-NEXT: [[A:%.*]] = alloca i32, align 4 3143 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32*, align 4 3144 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3145 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3146 // CHECK12-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 3147 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 3148 // CHECK12-NEXT: store i32* [[A]], i32** [[TMP]], align 4 3149 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 4 3150 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3151 // CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 3152 // CHECK12-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 3153 // CHECK12-NEXT: ret void 3154 // 3155 // 3156 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3157 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3158 // CHECK12-NEXT: entry: 3159 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3160 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3161 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3162 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3163 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3164 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3165 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3166 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3167 // CHECK12-NEXT: ret void 3168 // 3169 // 3170 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3171 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3172 // CHECK12-NEXT: entry: 3173 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3174 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3175 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3176 // CHECK12-NEXT: ret void 3177 // 3178 // 3179 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3180 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 3181 // CHECK12-NEXT: entry: 3182 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 3183 // CHECK12-NEXT: ret void 3184 // 3185 // 3186 // CHECK13-LABEL: define {{[^@]+}}@main 3187 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 3188 // CHECK13-NEXT: entry: 3189 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3190 // CHECK13-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 3191 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3192 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3193 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3194 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3195 // CHECK13-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 3196 // CHECK13-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3197 // CHECK13-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3198 // CHECK13-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 3199 // CHECK13-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 3200 // CHECK13-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 3201 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3202 // CHECK13-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 3203 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3204 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3205 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3206 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3207 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3208 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3209 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3210 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3211 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 3212 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3213 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3214 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3215 // CHECK13: arrayctor.loop: 3216 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3217 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3218 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 3219 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3220 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3221 // CHECK13: arrayctor.cont: 3222 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 3223 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR1]], align 4 3224 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0 3225 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 3226 // CHECK13-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 0 3227 // CHECK13-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 3228 // CHECK13-NEXT: [[TMP3:%.*]] = bitcast %struct.S* [[VAR4]] to i8* 3229 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i64 4, i1 false) 3230 // CHECK13-NEXT: store i32 3, i32* [[SIVAR]], align 4 3231 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 3232 // CHECK13-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3233 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i64 2 3234 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3235 // CHECK13: arraydestroy.body: 3236 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3237 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3238 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3239 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3240 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3241 // CHECK13: arraydestroy.done7: 3242 // CHECK13-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 3243 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3244 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3245 // CHECK13-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3246 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i64 2 3247 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 3248 // CHECK13: arraydestroy.body9: 3249 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S* [ [[TMP5]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 3250 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST10]], i64 -1 3251 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 3252 // CHECK13-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 3253 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 3254 // CHECK13: arraydestroy.done13: 3255 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3256 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 3257 // CHECK13-NEXT: ret i32 [[TMP6]] 3258 // 3259 // 3260 // CHECK13-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 3261 // CHECK13-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3262 // CHECK13-NEXT: entry: 3263 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3264 // CHECK13-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3265 // CHECK13-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3266 // CHECK13-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3267 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3268 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3269 // CHECK13-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 3270 // CHECK13-NEXT: ret void 3271 // 3272 // 3273 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3274 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3275 // CHECK13-NEXT: entry: 3276 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3277 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3278 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3279 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3280 // CHECK13-NEXT: ret void 3281 // 3282 // 3283 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3284 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3285 // CHECK13-NEXT: entry: 3286 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3287 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3288 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3289 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3290 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3291 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3292 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3293 // CHECK13-NEXT: ret void 3294 // 3295 // 3296 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3297 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3298 // CHECK13-NEXT: entry: 3299 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3300 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3301 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3302 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3303 // CHECK13-NEXT: ret void 3304 // 3305 // 3306 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3307 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { 3308 // CHECK13-NEXT: entry: 3309 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3310 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3311 // CHECK13-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 3312 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 3313 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 3314 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 3315 // CHECK13-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 3316 // CHECK13-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 3317 // CHECK13-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 128 3318 // CHECK13-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 128 3319 // CHECK13-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 128 3320 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 3321 // CHECK13-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 3322 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 128 3323 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3324 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3325 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 3326 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 3327 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 3328 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 3329 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 signext 3) 3330 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 3331 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3332 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3333 // CHECK13: arrayctor.loop: 3334 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3335 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3336 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 3337 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3338 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3339 // CHECK13: arrayctor.cont: 3340 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 3341 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR1]], align 128 3342 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0 3343 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 128 3344 // CHECK13-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 0 3345 // CHECK13-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 3346 // CHECK13-NEXT: [[TMP3:%.*]] = bitcast %struct.S.0* [[VAR4]] to i8* 3347 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP2]], i8* align 128 [[TMP3]], i64 4, i1 false) 3348 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 3349 // CHECK13-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 3350 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i64 2 3351 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3352 // CHECK13: arraydestroy.body: 3353 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3354 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3355 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3356 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3357 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3358 // CHECK13: arraydestroy.done7: 3359 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3360 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3361 // CHECK13-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3362 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2 3363 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 3364 // CHECK13: arraydestroy.body9: 3365 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[TMP5]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 3366 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST10]], i64 -1 3367 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 3368 // CHECK13-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 3369 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 3370 // CHECK13: arraydestroy.done13: 3371 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3372 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 3373 // CHECK13-NEXT: ret i32 [[TMP6]] 3374 // 3375 // 3376 // CHECK13-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 3377 // CHECK13-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3378 // CHECK13-NEXT: entry: 3379 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3380 // CHECK13-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3381 // CHECK13-NEXT: [[A2:%.*]] = alloca i32, align 4 3382 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3383 // CHECK13-NEXT: [[B3:%.*]] = alloca i32, align 4 3384 // CHECK13-NEXT: [[C4:%.*]] = alloca i32, align 4 3385 // CHECK13-NEXT: [[_TMP5:%.*]] = alloca i32*, align 8 3386 // CHECK13-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3387 // CHECK13-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3388 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3389 // CHECK13-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3390 // CHECK13-NEXT: store i32 0, i32* [[A]], align 8 3391 // CHECK13-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 3392 // CHECK13-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 3393 // CHECK13-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 3394 // CHECK13-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 3395 // CHECK13-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 3396 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3397 // CHECK13-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 3398 // CHECK13-NEXT: store i32* [[A2]], i32** [[TMP]], align 8 3399 // CHECK13-NEXT: store i32* [[C4]], i32** [[_TMP5]], align 8 3400 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 3401 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3402 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 3403 // CHECK13-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 3404 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[B3]], align 4 3405 // CHECK13-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 3406 // CHECK13-NEXT: store i32 [[DEC]], i32* [[B3]], align 4 3407 // CHECK13-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP5]], align 8 3408 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 3409 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 3410 // CHECK13-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 3411 // CHECK13-NEXT: ret void 3412 // 3413 // 3414 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3415 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3416 // CHECK13-NEXT: entry: 3417 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3418 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3419 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3420 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3421 // CHECK13-NEXT: store float 0.000000e+00, float* [[F]], align 4 3422 // CHECK13-NEXT: ret void 3423 // 3424 // 3425 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3426 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3427 // CHECK13-NEXT: entry: 3428 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3429 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3430 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3431 // CHECK13-NEXT: ret void 3432 // 3433 // 3434 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3435 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3436 // CHECK13-NEXT: entry: 3437 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3438 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3439 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3440 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3441 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3442 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3443 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3444 // CHECK13-NEXT: store float [[TMP0]], float* [[F]], align 4 3445 // CHECK13-NEXT: ret void 3446 // 3447 // 3448 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3449 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3450 // CHECK13-NEXT: entry: 3451 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3452 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3453 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3454 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 3455 // CHECK13-NEXT: ret void 3456 // 3457 // 3458 // CHECK13-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 3459 // CHECK13-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3460 // CHECK13-NEXT: entry: 3461 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 3462 // CHECK13-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 3463 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 3464 // CHECK13-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 3465 // CHECK13-NEXT: ret void 3466 // 3467 // 3468 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3469 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3470 // CHECK13-NEXT: entry: 3471 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3472 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3473 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3474 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3475 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3476 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3477 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 3478 // CHECK13-NEXT: ret void 3479 // 3480 // 3481 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3482 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3483 // CHECK13-NEXT: entry: 3484 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3485 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3486 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3487 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3488 // CHECK13-NEXT: ret void 3489 // 3490 // 3491 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3492 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3493 // CHECK13-NEXT: entry: 3494 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3495 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3496 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3497 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3498 // CHECK13-NEXT: store i32 0, i32* [[F]], align 4 3499 // CHECK13-NEXT: ret void 3500 // 3501 // 3502 // CHECK13-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 3503 // CHECK13-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3504 // CHECK13-NEXT: entry: 3505 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 3506 // CHECK13-NEXT: [[A2:%.*]] = alloca i32, align 4 3507 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3508 // CHECK13-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 3509 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 3510 // CHECK13-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 3511 // CHECK13-NEXT: store i32 0, i32* [[A]], align 4 3512 // CHECK13-NEXT: store i32* [[A2]], i32** [[TMP]], align 8 3513 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[TMP]], align 8 3514 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3515 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 3516 // CHECK13-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 3517 // CHECK13-NEXT: ret void 3518 // 3519 // 3520 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3521 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3522 // CHECK13-NEXT: entry: 3523 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3524 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3525 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3526 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3527 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3528 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3529 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3530 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3531 // CHECK13-NEXT: ret void 3532 // 3533 // 3534 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3535 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3536 // CHECK13-NEXT: entry: 3537 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3538 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3539 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3540 // CHECK13-NEXT: ret void 3541 // 3542 // 3543 // CHECK14-LABEL: define {{[^@]+}}@main 3544 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 3545 // CHECK14-NEXT: entry: 3546 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3547 // CHECK14-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 3548 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3549 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3550 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3551 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3552 // CHECK14-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 3553 // CHECK14-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3554 // CHECK14-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3555 // CHECK14-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 3556 // CHECK14-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 3557 // CHECK14-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 3558 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 3559 // CHECK14-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 3560 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3561 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 3562 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3563 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3564 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3565 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3566 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3567 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3568 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 3569 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3570 // CHECK14-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3571 // CHECK14-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3572 // CHECK14: arrayctor.loop: 3573 // CHECK14-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3574 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3575 // CHECK14-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 3576 // CHECK14-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3577 // CHECK14-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3578 // CHECK14: arrayctor.cont: 3579 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 3580 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR1]], align 4 3581 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0 3582 // CHECK14-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 3583 // CHECK14-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 0 3584 // CHECK14-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 3585 // CHECK14-NEXT: [[TMP3:%.*]] = bitcast %struct.S* [[VAR4]] to i8* 3586 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i64 4, i1 false) 3587 // CHECK14-NEXT: store i32 3, i32* [[SIVAR]], align 4 3588 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 3589 // CHECK14-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3590 // CHECK14-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i64 2 3591 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3592 // CHECK14: arraydestroy.body: 3593 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3594 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3595 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3596 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3597 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3598 // CHECK14: arraydestroy.done7: 3599 // CHECK14-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 3600 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3601 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3602 // CHECK14-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3603 // CHECK14-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i64 2 3604 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 3605 // CHECK14: arraydestroy.body9: 3606 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S* [ [[TMP5]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 3607 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST10]], i64 -1 3608 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 3609 // CHECK14-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 3610 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 3611 // CHECK14: arraydestroy.done13: 3612 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3613 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 3614 // CHECK14-NEXT: ret i32 [[TMP6]] 3615 // 3616 // 3617 // CHECK14-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 3618 // CHECK14-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3619 // CHECK14-NEXT: entry: 3620 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3621 // CHECK14-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3622 // CHECK14-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3623 // CHECK14-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3624 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3625 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3626 // CHECK14-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 3627 // CHECK14-NEXT: ret void 3628 // 3629 // 3630 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3631 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3632 // CHECK14-NEXT: entry: 3633 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3634 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3635 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3636 // CHECK14-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3637 // CHECK14-NEXT: ret void 3638 // 3639 // 3640 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3641 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3642 // CHECK14-NEXT: entry: 3643 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3644 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3645 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3646 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3647 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3648 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3649 // CHECK14-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3650 // CHECK14-NEXT: ret void 3651 // 3652 // 3653 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3654 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3655 // CHECK14-NEXT: entry: 3656 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3657 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3658 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3659 // CHECK14-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3660 // CHECK14-NEXT: ret void 3661 // 3662 // 3663 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3664 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat { 3665 // CHECK14-NEXT: entry: 3666 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3667 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3668 // CHECK14-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 3669 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 3670 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 3671 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 3672 // CHECK14-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 3673 // CHECK14-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 3674 // CHECK14-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 128 3675 // CHECK14-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 128 3676 // CHECK14-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 128 3677 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 3678 // CHECK14-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 3679 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 128 3680 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3681 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3682 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 3683 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 3684 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 3685 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 3686 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 signext 3) 3687 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 3688 // CHECK14-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3689 // CHECK14-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3690 // CHECK14: arrayctor.loop: 3691 // CHECK14-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3692 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3693 // CHECK14-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 3694 // CHECK14-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3695 // CHECK14-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3696 // CHECK14: arrayctor.cont: 3697 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 3698 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR1]], align 128 3699 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0 3700 // CHECK14-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 128 3701 // CHECK14-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 0 3702 // CHECK14-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 3703 // CHECK14-NEXT: [[TMP3:%.*]] = bitcast %struct.S.0* [[VAR4]] to i8* 3704 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP2]], i8* align 128 [[TMP3]], i64 4, i1 false) 3705 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 3706 // CHECK14-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 3707 // CHECK14-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i64 2 3708 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3709 // CHECK14: arraydestroy.body: 3710 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3711 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3712 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3713 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3714 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3715 // CHECK14: arraydestroy.done7: 3716 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 3717 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3718 // CHECK14-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3719 // CHECK14-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2 3720 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 3721 // CHECK14: arraydestroy.body9: 3722 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[TMP5]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 3723 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST10]], i64 -1 3724 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 3725 // CHECK14-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 3726 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 3727 // CHECK14: arraydestroy.done13: 3728 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3729 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 3730 // CHECK14-NEXT: ret i32 [[TMP6]] 3731 // 3732 // 3733 // CHECK14-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 3734 // CHECK14-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3735 // CHECK14-NEXT: entry: 3736 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3737 // CHECK14-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3738 // CHECK14-NEXT: [[A2:%.*]] = alloca i32, align 4 3739 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3740 // CHECK14-NEXT: [[B3:%.*]] = alloca i32, align 4 3741 // CHECK14-NEXT: [[C4:%.*]] = alloca i32, align 4 3742 // CHECK14-NEXT: [[_TMP5:%.*]] = alloca i32*, align 8 3743 // CHECK14-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3744 // CHECK14-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3745 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3746 // CHECK14-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3747 // CHECK14-NEXT: store i32 0, i32* [[A]], align 8 3748 // CHECK14-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 3749 // CHECK14-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 3750 // CHECK14-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 3751 // CHECK14-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 3752 // CHECK14-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 3753 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3754 // CHECK14-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 3755 // CHECK14-NEXT: store i32* [[A2]], i32** [[TMP]], align 8 3756 // CHECK14-NEXT: store i32* [[C4]], i32** [[_TMP5]], align 8 3757 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 3758 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3759 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 3760 // CHECK14-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 3761 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[B3]], align 4 3762 // CHECK14-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 3763 // CHECK14-NEXT: store i32 [[DEC]], i32* [[B3]], align 4 3764 // CHECK14-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP5]], align 8 3765 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 3766 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 3767 // CHECK14-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 3768 // CHECK14-NEXT: ret void 3769 // 3770 // 3771 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3772 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3773 // CHECK14-NEXT: entry: 3774 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3775 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3776 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3777 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3778 // CHECK14-NEXT: store float 0.000000e+00, float* [[F]], align 4 3779 // CHECK14-NEXT: ret void 3780 // 3781 // 3782 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3783 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3784 // CHECK14-NEXT: entry: 3785 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3786 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3787 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3788 // CHECK14-NEXT: ret void 3789 // 3790 // 3791 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3792 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3793 // CHECK14-NEXT: entry: 3794 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3795 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3796 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3797 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3798 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3799 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3800 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3801 // CHECK14-NEXT: store float [[TMP0]], float* [[F]], align 4 3802 // CHECK14-NEXT: ret void 3803 // 3804 // 3805 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3806 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3807 // CHECK14-NEXT: entry: 3808 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3809 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3810 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3811 // CHECK14-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 3812 // CHECK14-NEXT: ret void 3813 // 3814 // 3815 // CHECK14-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 3816 // CHECK14-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3817 // CHECK14-NEXT: entry: 3818 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 3819 // CHECK14-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 3820 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 3821 // CHECK14-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 3822 // CHECK14-NEXT: ret void 3823 // 3824 // 3825 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3826 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3827 // CHECK14-NEXT: entry: 3828 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3829 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3830 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3831 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3832 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3833 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3834 // CHECK14-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 3835 // CHECK14-NEXT: ret void 3836 // 3837 // 3838 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3839 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3840 // CHECK14-NEXT: entry: 3841 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3842 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3843 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3844 // CHECK14-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3845 // CHECK14-NEXT: ret void 3846 // 3847 // 3848 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3849 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3850 // CHECK14-NEXT: entry: 3851 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3852 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3853 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3854 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3855 // CHECK14-NEXT: store i32 0, i32* [[F]], align 4 3856 // CHECK14-NEXT: ret void 3857 // 3858 // 3859 // CHECK14-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 3860 // CHECK14-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3861 // CHECK14-NEXT: entry: 3862 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 3863 // CHECK14-NEXT: [[A2:%.*]] = alloca i32, align 4 3864 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3865 // CHECK14-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 3866 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 3867 // CHECK14-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 3868 // CHECK14-NEXT: store i32 0, i32* [[A]], align 4 3869 // CHECK14-NEXT: store i32* [[A2]], i32** [[TMP]], align 8 3870 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[TMP]], align 8 3871 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3872 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 3873 // CHECK14-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 3874 // CHECK14-NEXT: ret void 3875 // 3876 // 3877 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3878 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3879 // CHECK14-NEXT: entry: 3880 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3881 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3882 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3883 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3884 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3885 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3886 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3887 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3888 // CHECK14-NEXT: ret void 3889 // 3890 // 3891 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3892 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3893 // CHECK14-NEXT: entry: 3894 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3895 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3896 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3897 // CHECK14-NEXT: ret void 3898 // 3899 // 3900 // CHECK15-LABEL: define {{[^@]+}}@main 3901 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 3902 // CHECK15-NEXT: entry: 3903 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3904 // CHECK15-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3905 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3906 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3907 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3908 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3909 // CHECK15-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 3910 // CHECK15-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3911 // CHECK15-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3912 // CHECK15-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 3913 // CHECK15-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 3914 // CHECK15-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 3915 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 3916 // CHECK15-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 3917 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3918 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 3919 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3920 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 3921 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3922 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3923 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 3924 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3925 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 3926 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3927 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3928 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3929 // CHECK15: arrayctor.loop: 3930 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3931 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3932 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3933 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3934 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3935 // CHECK15: arrayctor.cont: 3936 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 3937 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR1]], align 4 3938 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 0 3939 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 3940 // CHECK15-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3941 // CHECK15-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 3942 // CHECK15-NEXT: [[TMP3:%.*]] = bitcast %struct.S* [[VAR4]] to i8* 3943 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i32 4, i1 false) 3944 // CHECK15-NEXT: store i32 3, i32* [[SIVAR]], align 4 3945 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 3946 // CHECK15-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3947 // CHECK15-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 3948 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3949 // CHECK15: arraydestroy.body: 3950 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3951 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3952 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3953 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3954 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3955 // CHECK15: arraydestroy.done7: 3956 // CHECK15-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 3957 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3958 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3959 // CHECK15-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3960 // CHECK15-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i32 2 3961 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 3962 // CHECK15: arraydestroy.body9: 3963 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S* [ [[TMP5]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 3964 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST10]], i32 -1 3965 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 3966 // CHECK15-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 3967 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 3968 // CHECK15: arraydestroy.done13: 3969 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3970 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 3971 // CHECK15-NEXT: ret i32 [[TMP6]] 3972 // 3973 // 3974 // CHECK15-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 3975 // CHECK15-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3976 // CHECK15-NEXT: entry: 3977 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3978 // CHECK15-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 3979 // CHECK15-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3980 // CHECK15-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 3981 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3982 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 3983 // CHECK15-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 3984 // CHECK15-NEXT: ret void 3985 // 3986 // 3987 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3988 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3989 // CHECK15-NEXT: entry: 3990 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3991 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3992 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3993 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3994 // CHECK15-NEXT: ret void 3995 // 3996 // 3997 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3998 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3999 // CHECK15-NEXT: entry: 4000 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4001 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4002 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4003 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4004 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4005 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4006 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 4007 // CHECK15-NEXT: ret void 4008 // 4009 // 4010 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4011 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4012 // CHECK15-NEXT: entry: 4013 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4014 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4015 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4016 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4017 // CHECK15-NEXT: ret void 4018 // 4019 // 4020 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4021 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { 4022 // CHECK15-NEXT: entry: 4023 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4024 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4025 // CHECK15-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 4026 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 4027 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 4028 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 4029 // CHECK15-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 4030 // CHECK15-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 4031 // CHECK15-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 128 4032 // CHECK15-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 128 4033 // CHECK15-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 128 4034 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 4035 // CHECK15-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 4036 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 128 4037 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4038 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4039 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4040 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 4041 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4042 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 4043 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 4044 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4045 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4046 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4047 // CHECK15: arrayctor.loop: 4048 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4049 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4050 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 4051 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4052 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4053 // CHECK15: arrayctor.cont: 4054 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 4055 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR1]], align 128 4056 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 0 4057 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 128 4058 // CHECK15-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4059 // CHECK15-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 4060 // CHECK15-NEXT: [[TMP3:%.*]] = bitcast %struct.S.0* [[VAR4]] to i8* 4061 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP2]], i8* align 128 [[TMP3]], i32 4, i1 false) 4062 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 4063 // CHECK15-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4064 // CHECK15-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 4065 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4066 // CHECK15: arraydestroy.body: 4067 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4068 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4069 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4070 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 4071 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 4072 // CHECK15: arraydestroy.done7: 4073 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4074 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 4075 // CHECK15-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4076 // CHECK15-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i32 2 4077 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 4078 // CHECK15: arraydestroy.body9: 4079 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[TMP5]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 4080 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST10]], i32 -1 4081 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 4082 // CHECK15-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 4083 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 4084 // CHECK15: arraydestroy.done13: 4085 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4086 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 4087 // CHECK15-NEXT: ret i32 [[TMP6]] 4088 // 4089 // 4090 // CHECK15-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 4091 // CHECK15-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4092 // CHECK15-NEXT: entry: 4093 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 4094 // CHECK15-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 4095 // CHECK15-NEXT: [[A2:%.*]] = alloca i32, align 4 4096 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32*, align 4 4097 // CHECK15-NEXT: [[B3:%.*]] = alloca i32, align 4 4098 // CHECK15-NEXT: [[C4:%.*]] = alloca i32, align 4 4099 // CHECK15-NEXT: [[_TMP5:%.*]] = alloca i32*, align 4 4100 // CHECK15-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 4101 // CHECK15-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 4102 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 4103 // CHECK15-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4104 // CHECK15-NEXT: store i32 0, i32* [[A]], align 4 4105 // CHECK15-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 4106 // CHECK15-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 4107 // CHECK15-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 4108 // CHECK15-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 4109 // CHECK15-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 4110 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 4111 // CHECK15-NEXT: store i32* [[TMP0]], i32** [[C]], align 4 4112 // CHECK15-NEXT: store i32* [[A2]], i32** [[TMP]], align 4 4113 // CHECK15-NEXT: store i32* [[C4]], i32** [[_TMP5]], align 4 4114 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 4 4115 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4116 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 4117 // CHECK15-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 4118 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[B3]], align 4 4119 // CHECK15-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 4120 // CHECK15-NEXT: store i32 [[DEC]], i32* [[B3]], align 4 4121 // CHECK15-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP5]], align 4 4122 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 4123 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 4124 // CHECK15-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 4125 // CHECK15-NEXT: ret void 4126 // 4127 // 4128 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4129 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4130 // CHECK15-NEXT: entry: 4131 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4132 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4133 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4134 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4135 // CHECK15-NEXT: store float 0.000000e+00, float* [[F]], align 4 4136 // CHECK15-NEXT: ret void 4137 // 4138 // 4139 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4140 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4141 // CHECK15-NEXT: entry: 4142 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4143 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4144 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4145 // CHECK15-NEXT: ret void 4146 // 4147 // 4148 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4149 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4150 // CHECK15-NEXT: entry: 4151 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4152 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4153 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4154 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4155 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4156 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4157 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4158 // CHECK15-NEXT: store float [[TMP0]], float* [[F]], align 4 4159 // CHECK15-NEXT: ret void 4160 // 4161 // 4162 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4163 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4164 // CHECK15-NEXT: entry: 4165 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4166 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4167 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4168 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 4169 // CHECK15-NEXT: ret void 4170 // 4171 // 4172 // CHECK15-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 4173 // CHECK15-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4174 // CHECK15-NEXT: entry: 4175 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 4176 // CHECK15-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 4177 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 4178 // CHECK15-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 4179 // CHECK15-NEXT: ret void 4180 // 4181 // 4182 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4183 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4184 // CHECK15-NEXT: entry: 4185 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4186 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4187 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4188 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4189 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4190 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4191 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4192 // CHECK15-NEXT: ret void 4193 // 4194 // 4195 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4196 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4197 // CHECK15-NEXT: entry: 4198 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4199 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4200 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4201 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4202 // CHECK15-NEXT: ret void 4203 // 4204 // 4205 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4206 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4207 // CHECK15-NEXT: entry: 4208 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4209 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4210 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4211 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4212 // CHECK15-NEXT: store i32 0, i32* [[F]], align 4 4213 // CHECK15-NEXT: ret void 4214 // 4215 // 4216 // CHECK15-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 4217 // CHECK15-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4218 // CHECK15-NEXT: entry: 4219 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 4220 // CHECK15-NEXT: [[A2:%.*]] = alloca i32, align 4 4221 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32*, align 4 4222 // CHECK15-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 4223 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 4224 // CHECK15-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 4225 // CHECK15-NEXT: store i32 0, i32* [[A]], align 4 4226 // CHECK15-NEXT: store i32* [[A2]], i32** [[TMP]], align 4 4227 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[TMP]], align 4 4228 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4229 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 4230 // CHECK15-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 4231 // CHECK15-NEXT: ret void 4232 // 4233 // 4234 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4235 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4236 // CHECK15-NEXT: entry: 4237 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4238 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4239 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4240 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4241 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4242 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4243 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4244 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4245 // CHECK15-NEXT: ret void 4246 // 4247 // 4248 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4249 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4250 // CHECK15-NEXT: entry: 4251 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4252 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4253 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4254 // CHECK15-NEXT: ret void 4255 // 4256 // 4257 // CHECK16-LABEL: define {{[^@]+}}@main 4258 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] { 4259 // CHECK16-NEXT: entry: 4260 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4261 // CHECK16-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 4262 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4263 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4264 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4265 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4266 // CHECK16-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 4267 // CHECK16-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 4268 // CHECK16-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 4269 // CHECK16-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 4270 // CHECK16-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 4271 // CHECK16-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 4272 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4273 // CHECK16-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 4274 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 4275 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 4276 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4277 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4278 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4279 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 4280 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4281 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 4282 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 4283 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 4284 // CHECK16-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4285 // CHECK16-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4286 // CHECK16: arrayctor.loop: 4287 // CHECK16-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4288 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4289 // CHECK16-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 4290 // CHECK16-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4291 // CHECK16-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4292 // CHECK16: arrayctor.cont: 4293 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 4294 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR1]], align 4 4295 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 0 4296 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 4297 // CHECK16-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 4298 // CHECK16-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 4299 // CHECK16-NEXT: [[TMP3:%.*]] = bitcast %struct.S* [[VAR4]] to i8* 4300 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i32 4, i1 false) 4301 // CHECK16-NEXT: store i32 3, i32* [[SIVAR]], align 4 4302 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 4303 // CHECK16-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 4304 // CHECK16-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 4305 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4306 // CHECK16: arraydestroy.body: 4307 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4308 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4309 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4310 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 4311 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 4312 // CHECK16: arraydestroy.done7: 4313 // CHECK16-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 4314 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4315 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 4316 // CHECK16-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4317 // CHECK16-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i32 2 4318 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 4319 // CHECK16: arraydestroy.body9: 4320 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S* [ [[TMP5]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 4321 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST10]], i32 -1 4322 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 4323 // CHECK16-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 4324 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 4325 // CHECK16: arraydestroy.done13: 4326 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4327 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 4328 // CHECK16-NEXT: ret i32 [[TMP6]] 4329 // 4330 // 4331 // CHECK16-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 4332 // CHECK16-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4333 // CHECK16-NEXT: entry: 4334 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 4335 // CHECK16-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 4336 // CHECK16-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 4337 // CHECK16-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 4338 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 4339 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 4340 // CHECK16-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 4 dereferenceable(12) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 4341 // CHECK16-NEXT: ret void 4342 // 4343 // 4344 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4345 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4346 // CHECK16-NEXT: entry: 4347 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4348 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4349 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4350 // CHECK16-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 4351 // CHECK16-NEXT: ret void 4352 // 4353 // 4354 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4355 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4356 // CHECK16-NEXT: entry: 4357 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4358 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4359 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4360 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4361 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4362 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4363 // CHECK16-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 4364 // CHECK16-NEXT: ret void 4365 // 4366 // 4367 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4368 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4369 // CHECK16-NEXT: entry: 4370 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4371 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4372 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4373 // CHECK16-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4374 // CHECK16-NEXT: ret void 4375 // 4376 // 4377 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4378 // CHECK16-SAME: () #[[ATTR3:[0-9]+]] comdat { 4379 // CHECK16-NEXT: entry: 4380 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4381 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4382 // CHECK16-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 4383 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 4384 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 4385 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 4386 // CHECK16-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 4387 // CHECK16-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 4388 // CHECK16-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 128 4389 // CHECK16-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 128 4390 // CHECK16-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 128 4391 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 4392 // CHECK16-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 4393 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 128 4394 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4395 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4396 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4397 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 4398 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4399 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 4400 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 4401 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4402 // CHECK16-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4403 // CHECK16-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4404 // CHECK16: arrayctor.loop: 4405 // CHECK16-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4406 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4407 // CHECK16-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 4408 // CHECK16-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4409 // CHECK16-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4410 // CHECK16: arrayctor.cont: 4411 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 4412 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR1]], align 128 4413 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 0 4414 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 128 4415 // CHECK16-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4416 // CHECK16-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 4417 // CHECK16-NEXT: [[TMP3:%.*]] = bitcast %struct.S.0* [[VAR4]] to i8* 4418 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP2]], i8* align 128 [[TMP3]], i32 4, i1 false) 4419 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 4420 // CHECK16-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4421 // CHECK16-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 4422 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4423 // CHECK16: arraydestroy.body: 4424 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4425 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4426 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4427 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 4428 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 4429 // CHECK16: arraydestroy.done7: 4430 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4431 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 4432 // CHECK16-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4433 // CHECK16-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i32 2 4434 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 4435 // CHECK16: arraydestroy.body9: 4436 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[TMP5]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 4437 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST10]], i32 -1 4438 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 4439 // CHECK16-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 4440 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 4441 // CHECK16: arraydestroy.done13: 4442 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4443 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 4444 // CHECK16-NEXT: ret i32 [[TMP6]] 4445 // 4446 // 4447 // CHECK16-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 4448 // CHECK16-SAME: (%struct.SS* nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4449 // CHECK16-NEXT: entry: 4450 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 4451 // CHECK16-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 4452 // CHECK16-NEXT: [[A2:%.*]] = alloca i32, align 4 4453 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32*, align 4 4454 // CHECK16-NEXT: [[B3:%.*]] = alloca i32, align 4 4455 // CHECK16-NEXT: [[C4:%.*]] = alloca i32, align 4 4456 // CHECK16-NEXT: [[_TMP5:%.*]] = alloca i32*, align 4 4457 // CHECK16-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 4458 // CHECK16-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 4459 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 4460 // CHECK16-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4461 // CHECK16-NEXT: store i32 0, i32* [[A]], align 4 4462 // CHECK16-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 4463 // CHECK16-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 4464 // CHECK16-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 4465 // CHECK16-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 4466 // CHECK16-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 4467 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 4468 // CHECK16-NEXT: store i32* [[TMP0]], i32** [[C]], align 4 4469 // CHECK16-NEXT: store i32* [[A2]], i32** [[TMP]], align 4 4470 // CHECK16-NEXT: store i32* [[C4]], i32** [[_TMP5]], align 4 4471 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 4 4472 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4473 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 4474 // CHECK16-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 4475 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[B3]], align 4 4476 // CHECK16-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 4477 // CHECK16-NEXT: store i32 [[DEC]], i32* [[B3]], align 4 4478 // CHECK16-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP5]], align 4 4479 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 4480 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 4481 // CHECK16-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 4482 // CHECK16-NEXT: ret void 4483 // 4484 // 4485 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4486 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4487 // CHECK16-NEXT: entry: 4488 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4489 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4490 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4491 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4492 // CHECK16-NEXT: store float 0.000000e+00, float* [[F]], align 4 4493 // CHECK16-NEXT: ret void 4494 // 4495 // 4496 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4497 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4498 // CHECK16-NEXT: entry: 4499 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4500 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4501 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4502 // CHECK16-NEXT: ret void 4503 // 4504 // 4505 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4506 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4507 // CHECK16-NEXT: entry: 4508 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4509 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4510 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4511 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4512 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4513 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4514 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4515 // CHECK16-NEXT: store float [[TMP0]], float* [[F]], align 4 4516 // CHECK16-NEXT: ret void 4517 // 4518 // 4519 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4520 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4521 // CHECK16-NEXT: entry: 4522 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4523 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4524 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4525 // CHECK16-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 4526 // CHECK16-NEXT: ret void 4527 // 4528 // 4529 // CHECK16-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 4530 // CHECK16-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4531 // CHECK16-NEXT: entry: 4532 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 4533 // CHECK16-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 4534 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 4535 // CHECK16-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 4536 // CHECK16-NEXT: ret void 4537 // 4538 // 4539 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4540 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4541 // CHECK16-NEXT: entry: 4542 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4543 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4544 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4545 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4546 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4547 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4548 // CHECK16-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4549 // CHECK16-NEXT: ret void 4550 // 4551 // 4552 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4553 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4554 // CHECK16-NEXT: entry: 4555 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4556 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4557 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4558 // CHECK16-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4559 // CHECK16-NEXT: ret void 4560 // 4561 // 4562 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4563 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4564 // CHECK16-NEXT: entry: 4565 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4566 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4567 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4568 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4569 // CHECK16-NEXT: store i32 0, i32* [[F]], align 4 4570 // CHECK16-NEXT: ret void 4571 // 4572 // 4573 // CHECK16-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 4574 // CHECK16-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4575 // CHECK16-NEXT: entry: 4576 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 4577 // CHECK16-NEXT: [[A2:%.*]] = alloca i32, align 4 4578 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32*, align 4 4579 // CHECK16-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 4580 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 4581 // CHECK16-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 4582 // CHECK16-NEXT: store i32 0, i32* [[A]], align 4 4583 // CHECK16-NEXT: store i32* [[A2]], i32** [[TMP]], align 4 4584 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[TMP]], align 4 4585 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4586 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 4587 // CHECK16-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 4588 // CHECK16-NEXT: ret void 4589 // 4590 // 4591 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4592 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4593 // CHECK16-NEXT: entry: 4594 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4595 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4596 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4597 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4598 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4599 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4600 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4601 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4602 // CHECK16-NEXT: ret void 4603 // 4604 // 4605 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4606 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4607 // CHECK16-NEXT: entry: 4608 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4609 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4610 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4611 // CHECK16-NEXT: ret void 4612 // 4613