1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 // Test host codegen. 6 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 7 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 9 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 10 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 12 13 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 14 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 16 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 17 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 19 #ifdef CK1 20 21 int a[100]; 22 23 int teams_argument_global(int n) { 24 int te = n / 128; 25 int th = 128; 26 // discard n_addr 27 28 29 #pragma omp target 30 #pragma omp teams distribute num_teams(te), thread_limit(th) 31 for(int i = 0; i < n; i++) { 32 a[i] = 0; 33 } 34 35 #pragma omp target 36 {{{ 37 #pragma omp teams distribute 38 for(int i = 0; i < n; i++) { 39 a[i] = 0; 40 } 41 }}} 42 43 // outlined target regions 44 45 46 47 48 return a[0]; 49 } 50 51 #endif // CK1 52 53 // Test host codegen. 54 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 55 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 56 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 57 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 58 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 59 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 60 61 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 62 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 64 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 65 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 66 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 67 #ifdef CK2 68 69 int teams_local_arg(void) { 70 int n = 100; 71 int a[n]; 72 73 #pragma omp target 74 #pragma omp teams distribute 75 for(int i = 0; i < n; i++) { 76 a[i] = 0; 77 } 78 79 // outlined target region 80 81 82 return a[0]; 83 } 84 #endif // CK2 85 86 // Test host codegen. 87 // RUN: %clang_cc1 -DCK3 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 88 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 89 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18 90 // RUN: %clang_cc1 -DCK3 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19 91 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 92 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20 93 94 // RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK21 95 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 96 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK22 97 // RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK23 98 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 99 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK24 100 #ifdef CK3 101 102 103 template <typename T, int X, long long Y> 104 struct SS{ 105 T a[X]; 106 float b; 107 int foo(void) { 108 109 #pragma omp target 110 #pragma omp teams distribute 111 for(int i = 0; i < X; i++) { 112 a[i] = (T)0; 113 } 114 115 // outlined target region 116 117 118 return a[0]; 119 } 120 }; 121 122 int teams_template_struct(void) { 123 SS<int, 123, 456> V; 124 return V.foo(); 125 126 } 127 #endif // CK3 128 129 // Test host codegen. 130 // RUN: %clang_cc1 -DCK4 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK25 131 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 132 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK26 133 // RUN: %clang_cc1 -DCK4 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK27 134 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 135 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK28 136 137 // RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK29 138 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 139 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK30 140 // RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK31 141 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 142 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK32 143 144 #ifdef CK4 145 146 template <typename T, int n> 147 int tmain(T argc) { 148 T a[n]; 149 int te = n/128; 150 int th = 128; 151 #pragma omp target 152 #pragma omp teams distribute num_teams(te) thread_limit(th) 153 for(int i = 0; i < n; i++) { 154 a[i] = (T)0; 155 } 156 return 0; 157 } 158 159 int main (int argc, char **argv) { 160 int n = 100; 161 int a[n]; 162 #pragma omp target 163 #pragma omp teams distribute 164 for(int i = 0; i < n; i++) { 165 a[i] = 0; 166 } 167 return tmain<int, 10>(argc); 168 } 169 170 171 172 173 174 175 176 #endif // CK4 177 #endif 178 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 179 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 180 // CHECK1-NEXT: entry: 181 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 182 // CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4 183 // CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4 184 // CHECK1-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 185 // CHECK1-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 186 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 187 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 188 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 189 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 190 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 192 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 193 // CHECK1-NEXT: [[N_CASTED6:%.*]] = alloca i64, align 8 194 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 8 195 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 8 196 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 8 197 // CHECK1-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 198 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 199 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 200 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 201 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 202 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 203 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 204 // CHECK1-NEXT: store i32 128, i32* [[TH]], align 4 205 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 206 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 207 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 208 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[TE_CASTED]], align 8 209 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 210 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 211 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 212 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[TH_CASTED]], align 8 213 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 214 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 215 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4 216 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8 217 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 218 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 219 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 220 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 221 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 222 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP10]], align 8 223 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 224 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8 225 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 226 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 227 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP13]], align 8 228 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 229 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 230 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP15]], align 8 231 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 232 // CHECK1-NEXT: store i8* null, i8** [[TMP16]], align 8 233 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 234 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 235 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP18]], align 8 236 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 237 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 238 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP20]], align 8 239 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 240 // CHECK1-NEXT: store i8* null, i8** [[TMP21]], align 8 241 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 242 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 243 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 8 244 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 245 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 246 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 8 247 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 248 // CHECK1-NEXT: store i8* null, i8** [[TMP26]], align 8 249 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 250 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 251 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 252 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[TH]], align 4 253 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[N_ADDR]], align 4 254 // CHECK1-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR_]], align 4 255 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 256 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0 257 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1 258 // CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1 259 // CHECK1-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 260 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 261 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], 1 262 // CHECK1-NEXT: [[TMP34:%.*]] = zext i32 [[ADD]] to i64 263 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP34]]) 264 // CHECK1-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 [[TMP30]]) 265 // CHECK1-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 266 // CHECK1-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 267 // CHECK1: omp_offload.failed: 268 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 269 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 270 // CHECK1: omp_offload.cont: 271 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 272 // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[N_CASTED6]] to i32* 273 // CHECK1-NEXT: store i32 [[TMP37]], i32* [[CONV7]], align 4 274 // CHECK1-NEXT: [[TMP38:%.*]] = load i64, i64* [[N_CASTED6]], align 8 275 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 276 // CHECK1-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i64* 277 // CHECK1-NEXT: store i64 [[TMP38]], i64* [[TMP40]], align 8 278 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 279 // CHECK1-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 280 // CHECK1-NEXT: store i64 [[TMP38]], i64* [[TMP42]], align 8 281 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 282 // CHECK1-NEXT: store i8* null, i8** [[TMP43]], align 8 283 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 284 // CHECK1-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to [100 x i32]** 285 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP45]], align 8 286 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 287 // CHECK1-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to [100 x i32]** 288 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP47]], align 8 289 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1 290 // CHECK1-NEXT: store i8* null, i8** [[TMP48]], align 8 291 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 292 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 293 // CHECK1-NEXT: [[TMP51:%.*]] = load i32, i32* [[N_ADDR]], align 4 294 // CHECK1-NEXT: store i32 [[TMP51]], i32* [[DOTCAPTURE_EXPR_12]], align 4 295 // CHECK1-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 296 // CHECK1-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP52]], 0 297 // CHECK1-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 298 // CHECK1-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1 299 // CHECK1-NEXT: store i32 [[SUB16]], i32* [[DOTCAPTURE_EXPR_13]], align 4 300 // CHECK1-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 301 // CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP53]], 1 302 // CHECK1-NEXT: [[TMP54:%.*]] = zext i32 [[ADD17]] to i64 303 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP54]]) 304 // CHECK1-NEXT: [[TMP55:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, i32 2, i8** [[TMP49]], i8** [[TMP50]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 305 // CHECK1-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 306 // CHECK1-NEXT: br i1 [[TMP56]], label [[OMP_OFFLOAD_FAILED18:%.*]], label [[OMP_OFFLOAD_CONT19:%.*]] 307 // CHECK1: omp_offload.failed18: 308 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i64 [[TMP38]], [100 x i32]* @a) #[[ATTR2]] 309 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT19]] 310 // CHECK1: omp_offload.cont19: 311 // CHECK1-NEXT: [[TMP57:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 312 // CHECK1-NEXT: ret i32 [[TMP57]] 313 // 314 // 315 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 316 // CHECK1-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], i64 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 317 // CHECK1-NEXT: entry: 318 // CHECK1-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 319 // CHECK1-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 320 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 321 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 322 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 323 // CHECK1-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 324 // CHECK1-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 325 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 326 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 327 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 328 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 329 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_ADDR]] to i32* 330 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 331 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 332 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8 333 // CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 334 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]], [100 x i32]* [[TMP1]]) 335 // CHECK1-NEXT: ret void 336 // 337 // 338 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 339 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 340 // CHECK1-NEXT: entry: 341 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 342 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 343 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 344 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 345 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 346 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 347 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 348 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 349 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 350 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 351 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 352 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 353 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 354 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 355 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 356 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 357 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 358 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 359 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 360 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 361 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 362 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 363 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 364 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 365 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 366 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 367 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 368 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 369 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 370 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 371 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 372 // CHECK1: omp.precond.then: 373 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 374 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 375 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 376 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 377 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 378 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 379 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 380 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 381 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 382 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 383 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 384 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 385 // CHECK1: cond.true: 386 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 387 // CHECK1-NEXT: br label [[COND_END:%.*]] 388 // CHECK1: cond.false: 389 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 390 // CHECK1-NEXT: br label [[COND_END]] 391 // CHECK1: cond.end: 392 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 393 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 394 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 395 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 396 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 397 // CHECK1: omp.inner.for.cond: 398 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 399 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 400 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 401 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 402 // CHECK1: omp.inner.for.body: 403 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 404 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 405 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 406 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 407 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 408 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 409 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 410 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 411 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 412 // CHECK1: omp.body.continue: 413 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 414 // CHECK1: omp.inner.for.inc: 415 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 416 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 417 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 418 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 419 // CHECK1: omp.inner.for.end: 420 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 421 // CHECK1: omp.loop.exit: 422 // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 423 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 424 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 425 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 426 // CHECK1: omp.precond.end: 427 // CHECK1-NEXT: ret void 428 // 429 // 430 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35 431 // CHECK1-SAME: (i64 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 432 // CHECK1-NEXT: entry: 433 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 434 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 435 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 436 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 437 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 438 // CHECK1-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 439 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [100 x i32]* [[TMP0]]) 440 // CHECK1-NEXT: ret void 441 // 442 // 443 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 444 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 445 // CHECK1-NEXT: entry: 446 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 447 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 448 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 449 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 450 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 451 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 452 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 453 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 454 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 455 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 456 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 457 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 458 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 459 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 460 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 461 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 462 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 463 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 464 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 465 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 466 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 467 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 468 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 469 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 470 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 471 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 472 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 473 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 474 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 475 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 476 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 477 // CHECK1: omp.precond.then: 478 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 479 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 480 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 481 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 482 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 483 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 484 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 485 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 486 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 487 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 488 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 489 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 490 // CHECK1: cond.true: 491 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 492 // CHECK1-NEXT: br label [[COND_END:%.*]] 493 // CHECK1: cond.false: 494 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 495 // CHECK1-NEXT: br label [[COND_END]] 496 // CHECK1: cond.end: 497 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 498 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 499 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 500 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 501 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 502 // CHECK1: omp.inner.for.cond: 503 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 504 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 505 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 506 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 507 // CHECK1: omp.inner.for.body: 508 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 509 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 510 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 511 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 512 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 513 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 514 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 515 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 516 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 517 // CHECK1: omp.body.continue: 518 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 519 // CHECK1: omp.inner.for.inc: 520 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 521 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 522 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 523 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 524 // CHECK1: omp.inner.for.end: 525 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 526 // CHECK1: omp.loop.exit: 527 // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 528 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 529 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 530 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 531 // CHECK1: omp.precond.end: 532 // CHECK1-NEXT: ret void 533 // 534 // 535 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 536 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 537 // CHECK1-NEXT: entry: 538 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 539 // CHECK1-NEXT: ret void 540 // 541 // 542 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 543 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 544 // CHECK2-NEXT: entry: 545 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 546 // CHECK2-NEXT: [[TE:%.*]] = alloca i32, align 4 547 // CHECK2-NEXT: [[TH:%.*]] = alloca i32, align 4 548 // CHECK2-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 549 // CHECK2-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 550 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 551 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 552 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 553 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 554 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 555 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 556 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 557 // CHECK2-NEXT: [[N_CASTED6:%.*]] = alloca i64, align 8 558 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 8 559 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 8 560 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 8 561 // CHECK2-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 562 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 563 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 564 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 565 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 566 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 567 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 568 // CHECK2-NEXT: store i32 128, i32* [[TH]], align 4 569 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 570 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 571 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 572 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[TE_CASTED]], align 8 573 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 574 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 575 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 576 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[TH_CASTED]], align 8 577 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 578 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 579 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4 580 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8 581 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 582 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 583 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 584 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 585 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 586 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP10]], align 8 587 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 588 // CHECK2-NEXT: store i8* null, i8** [[TMP11]], align 8 589 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 590 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 591 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP13]], align 8 592 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 593 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 594 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP15]], align 8 595 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 596 // CHECK2-NEXT: store i8* null, i8** [[TMP16]], align 8 597 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 598 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 599 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP18]], align 8 600 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 601 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 602 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP20]], align 8 603 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 604 // CHECK2-NEXT: store i8* null, i8** [[TMP21]], align 8 605 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 606 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 607 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 8 608 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 609 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 610 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 8 611 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 612 // CHECK2-NEXT: store i8* null, i8** [[TMP26]], align 8 613 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 614 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 615 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 616 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[TH]], align 4 617 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[N_ADDR]], align 4 618 // CHECK2-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR_]], align 4 619 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 620 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0 621 // CHECK2-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1 622 // CHECK2-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1 623 // CHECK2-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 624 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 625 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], 1 626 // CHECK2-NEXT: [[TMP34:%.*]] = zext i32 [[ADD]] to i64 627 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP34]]) 628 // CHECK2-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 [[TMP30]]) 629 // CHECK2-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 630 // CHECK2-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 631 // CHECK2: omp_offload.failed: 632 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 633 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 634 // CHECK2: omp_offload.cont: 635 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 636 // CHECK2-NEXT: [[CONV7:%.*]] = bitcast i64* [[N_CASTED6]] to i32* 637 // CHECK2-NEXT: store i32 [[TMP37]], i32* [[CONV7]], align 4 638 // CHECK2-NEXT: [[TMP38:%.*]] = load i64, i64* [[N_CASTED6]], align 8 639 // CHECK2-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 640 // CHECK2-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i64* 641 // CHECK2-NEXT: store i64 [[TMP38]], i64* [[TMP40]], align 8 642 // CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 643 // CHECK2-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 644 // CHECK2-NEXT: store i64 [[TMP38]], i64* [[TMP42]], align 8 645 // CHECK2-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 646 // CHECK2-NEXT: store i8* null, i8** [[TMP43]], align 8 647 // CHECK2-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 648 // CHECK2-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to [100 x i32]** 649 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP45]], align 8 650 // CHECK2-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 651 // CHECK2-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to [100 x i32]** 652 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP47]], align 8 653 // CHECK2-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1 654 // CHECK2-NEXT: store i8* null, i8** [[TMP48]], align 8 655 // CHECK2-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 656 // CHECK2-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 657 // CHECK2-NEXT: [[TMP51:%.*]] = load i32, i32* [[N_ADDR]], align 4 658 // CHECK2-NEXT: store i32 [[TMP51]], i32* [[DOTCAPTURE_EXPR_12]], align 4 659 // CHECK2-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 660 // CHECK2-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP52]], 0 661 // CHECK2-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 662 // CHECK2-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1 663 // CHECK2-NEXT: store i32 [[SUB16]], i32* [[DOTCAPTURE_EXPR_13]], align 4 664 // CHECK2-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 665 // CHECK2-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP53]], 1 666 // CHECK2-NEXT: [[TMP54:%.*]] = zext i32 [[ADD17]] to i64 667 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP54]]) 668 // CHECK2-NEXT: [[TMP55:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, i32 2, i8** [[TMP49]], i8** [[TMP50]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 669 // CHECK2-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 670 // CHECK2-NEXT: br i1 [[TMP56]], label [[OMP_OFFLOAD_FAILED18:%.*]], label [[OMP_OFFLOAD_CONT19:%.*]] 671 // CHECK2: omp_offload.failed18: 672 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i64 [[TMP38]], [100 x i32]* @a) #[[ATTR2]] 673 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT19]] 674 // CHECK2: omp_offload.cont19: 675 // CHECK2-NEXT: [[TMP57:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 676 // CHECK2-NEXT: ret i32 [[TMP57]] 677 // 678 // 679 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 680 // CHECK2-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], i64 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 681 // CHECK2-NEXT: entry: 682 // CHECK2-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 683 // CHECK2-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 684 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 685 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 686 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 687 // CHECK2-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 688 // CHECK2-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 689 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 690 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 691 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 692 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 693 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_ADDR]] to i32* 694 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 695 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 696 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8 697 // CHECK2-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 698 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]], [100 x i32]* [[TMP1]]) 699 // CHECK2-NEXT: ret void 700 // 701 // 702 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 703 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 704 // CHECK2-NEXT: entry: 705 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 706 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 707 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 708 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 709 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 710 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 711 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 712 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 713 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 714 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 715 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 716 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 717 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 718 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 719 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 720 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 721 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 722 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 723 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 724 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 725 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 726 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 727 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 728 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 729 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 730 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 731 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 732 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 733 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 734 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 735 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 736 // CHECK2: omp.precond.then: 737 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 738 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 739 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 740 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 741 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 742 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 743 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 744 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 745 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 746 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 747 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 748 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 749 // CHECK2: cond.true: 750 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 751 // CHECK2-NEXT: br label [[COND_END:%.*]] 752 // CHECK2: cond.false: 753 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 754 // CHECK2-NEXT: br label [[COND_END]] 755 // CHECK2: cond.end: 756 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 757 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 758 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 759 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 760 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 761 // CHECK2: omp.inner.for.cond: 762 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 763 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 764 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 765 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 766 // CHECK2: omp.inner.for.body: 767 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 768 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 769 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 770 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 771 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 772 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 773 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 774 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 775 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 776 // CHECK2: omp.body.continue: 777 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 778 // CHECK2: omp.inner.for.inc: 779 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 780 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 781 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 782 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 783 // CHECK2: omp.inner.for.end: 784 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 785 // CHECK2: omp.loop.exit: 786 // CHECK2-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 787 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 788 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 789 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 790 // CHECK2: omp.precond.end: 791 // CHECK2-NEXT: ret void 792 // 793 // 794 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35 795 // CHECK2-SAME: (i64 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 796 // CHECK2-NEXT: entry: 797 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 798 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 799 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 800 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 801 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 802 // CHECK2-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 803 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [100 x i32]* [[TMP0]]) 804 // CHECK2-NEXT: ret void 805 // 806 // 807 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 808 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 809 // CHECK2-NEXT: entry: 810 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 811 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 812 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 813 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 814 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 815 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 816 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 817 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 818 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 819 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 820 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 821 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 822 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 823 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 824 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 825 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 826 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 827 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 828 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 829 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 830 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 831 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 832 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 833 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 834 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 835 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 836 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 837 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 838 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 839 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 840 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 841 // CHECK2: omp.precond.then: 842 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 843 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 844 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 845 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 846 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 847 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 848 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 849 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 850 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 851 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 852 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 853 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 854 // CHECK2: cond.true: 855 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 856 // CHECK2-NEXT: br label [[COND_END:%.*]] 857 // CHECK2: cond.false: 858 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 859 // CHECK2-NEXT: br label [[COND_END]] 860 // CHECK2: cond.end: 861 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 862 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 863 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 864 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 865 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 866 // CHECK2: omp.inner.for.cond: 867 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 868 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 869 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 870 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 871 // CHECK2: omp.inner.for.body: 872 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 873 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 874 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 875 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 876 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 877 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 878 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 879 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 880 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 881 // CHECK2: omp.body.continue: 882 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 883 // CHECK2: omp.inner.for.inc: 884 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 885 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 886 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 887 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 888 // CHECK2: omp.inner.for.end: 889 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 890 // CHECK2: omp.loop.exit: 891 // CHECK2-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 892 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 893 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 894 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 895 // CHECK2: omp.precond.end: 896 // CHECK2-NEXT: ret void 897 // 898 // 899 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 900 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 901 // CHECK2-NEXT: entry: 902 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 903 // CHECK2-NEXT: ret void 904 // 905 // 906 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 907 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { 908 // CHECK3-NEXT: entry: 909 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 910 // CHECK3-NEXT: [[TE:%.*]] = alloca i32, align 4 911 // CHECK3-NEXT: [[TH:%.*]] = alloca i32, align 4 912 // CHECK3-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 913 // CHECK3-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 914 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 915 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 916 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 917 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 918 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 919 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 920 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 921 // CHECK3-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4 922 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 4 923 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 4 924 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 4 925 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 926 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 927 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 928 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 929 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 930 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 931 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 932 // CHECK3-NEXT: store i32 128, i32* [[TH]], align 4 933 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 934 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TE_CASTED]], align 4 935 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_CASTED]], align 4 936 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 937 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TH_CASTED]], align 4 938 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TH_CASTED]], align 4 939 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 940 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4 941 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4 942 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 943 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 944 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 945 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 946 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 947 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP10]], align 4 948 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 949 // CHECK3-NEXT: store i8* null, i8** [[TMP11]], align 4 950 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 951 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 952 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP13]], align 4 953 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 954 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 955 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP15]], align 4 956 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 957 // CHECK3-NEXT: store i8* null, i8** [[TMP16]], align 4 958 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 959 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 960 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP18]], align 4 961 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 962 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 963 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP20]], align 4 964 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 965 // CHECK3-NEXT: store i8* null, i8** [[TMP21]], align 4 966 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 967 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 968 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 4 969 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 970 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 971 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 4 972 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 973 // CHECK3-NEXT: store i8* null, i8** [[TMP26]], align 4 974 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 975 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 976 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 977 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[TH]], align 4 978 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[N_ADDR]], align 4 979 // CHECK3-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR_]], align 4 980 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 981 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0 982 // CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 983 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 984 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 985 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 986 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], 1 987 // CHECK3-NEXT: [[TMP34:%.*]] = zext i32 [[ADD]] to i64 988 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP34]]) 989 // CHECK3-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 [[TMP30]]) 990 // CHECK3-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 991 // CHECK3-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 992 // CHECK3: omp_offload.failed: 993 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 994 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 995 // CHECK3: omp_offload.cont: 996 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 997 // CHECK3-NEXT: store i32 [[TMP37]], i32* [[N_CASTED4]], align 4 998 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[N_CASTED4]], align 4 999 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1000 // CHECK3-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 1001 // CHECK3-NEXT: store i32 [[TMP38]], i32* [[TMP40]], align 4 1002 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1003 // CHECK3-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i32* 1004 // CHECK3-NEXT: store i32 [[TMP38]], i32* [[TMP42]], align 4 1005 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0 1006 // CHECK3-NEXT: store i8* null, i8** [[TMP43]], align 4 1007 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 1008 // CHECK3-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to [100 x i32]** 1009 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP45]], align 4 1010 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 1011 // CHECK3-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to [100 x i32]** 1012 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP47]], align 4 1013 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1 1014 // CHECK3-NEXT: store i8* null, i8** [[TMP48]], align 4 1015 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1016 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1017 // CHECK3-NEXT: [[TMP51:%.*]] = load i32, i32* [[N_ADDR]], align 4 1018 // CHECK3-NEXT: store i32 [[TMP51]], i32* [[DOTCAPTURE_EXPR_9]], align 4 1019 // CHECK3-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 1020 // CHECK3-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP52]], 0 1021 // CHECK3-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1022 // CHECK3-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 1023 // CHECK3-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1024 // CHECK3-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 1025 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP53]], 1 1026 // CHECK3-NEXT: [[TMP54:%.*]] = zext i32 [[ADD14]] to i64 1027 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP54]]) 1028 // CHECK3-NEXT: [[TMP55:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, i32 2, i8** [[TMP49]], i8** [[TMP50]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1029 // CHECK3-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 1030 // CHECK3-NEXT: br i1 [[TMP56]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 1031 // CHECK3: omp_offload.failed15: 1032 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i32 [[TMP38]], [100 x i32]* @a) #[[ATTR2]] 1033 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT16]] 1034 // CHECK3: omp_offload.cont16: 1035 // CHECK3-NEXT: [[TMP57:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 1036 // CHECK3-NEXT: ret i32 [[TMP57]] 1037 // 1038 // 1039 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 1040 // CHECK3-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], i32 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 1041 // CHECK3-NEXT: entry: 1042 // CHECK3-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 1043 // CHECK3-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 1044 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1045 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1046 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 1047 // CHECK3-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 1048 // CHECK3-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 1049 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1050 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1051 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1052 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 1053 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 1054 // CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 1055 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP1]]) 1056 // CHECK3-NEXT: ret void 1057 // 1058 // 1059 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1060 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1061 // CHECK3-NEXT: entry: 1062 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1063 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1064 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1065 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1066 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1067 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1068 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1069 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1070 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1071 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1072 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1073 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1074 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1075 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1076 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1077 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1078 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1079 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1080 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1081 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1082 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1083 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1084 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1085 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1086 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1087 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1088 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1089 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 1090 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1091 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1092 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1093 // CHECK3: omp.precond.then: 1094 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1095 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1096 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1097 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1098 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1099 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1100 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1101 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1102 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1103 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1104 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1105 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1106 // CHECK3: cond.true: 1107 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1108 // CHECK3-NEXT: br label [[COND_END:%.*]] 1109 // CHECK3: cond.false: 1110 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1111 // CHECK3-NEXT: br label [[COND_END]] 1112 // CHECK3: cond.end: 1113 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1114 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1115 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1116 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1117 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1118 // CHECK3: omp.inner.for.cond: 1119 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1120 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1121 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1122 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1123 // CHECK3: omp.inner.for.body: 1124 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1125 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1126 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1127 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1128 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 1129 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP16]] 1130 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1131 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1132 // CHECK3: omp.body.continue: 1133 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1134 // CHECK3: omp.inner.for.inc: 1135 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1136 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1137 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1138 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1139 // CHECK3: omp.inner.for.end: 1140 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1141 // CHECK3: omp.loop.exit: 1142 // CHECK3-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1143 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1144 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1145 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1146 // CHECK3: omp.precond.end: 1147 // CHECK3-NEXT: ret void 1148 // 1149 // 1150 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35 1151 // CHECK3-SAME: (i32 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1152 // CHECK3-NEXT: entry: 1153 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1154 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1155 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1156 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1157 // CHECK3-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1158 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP0]]) 1159 // CHECK3-NEXT: ret void 1160 // 1161 // 1162 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1163 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1164 // CHECK3-NEXT: entry: 1165 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1166 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1167 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1168 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1169 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1170 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1171 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1172 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1173 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1174 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1175 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1176 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1177 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1178 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1179 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1180 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1181 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1182 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1183 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1184 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1185 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1186 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1187 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1188 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1189 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1190 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1191 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1192 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 1193 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1194 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1195 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1196 // CHECK3: omp.precond.then: 1197 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1198 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1199 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1200 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1201 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1202 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1203 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1204 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1205 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1206 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1207 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1208 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1209 // CHECK3: cond.true: 1210 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1211 // CHECK3-NEXT: br label [[COND_END:%.*]] 1212 // CHECK3: cond.false: 1213 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1214 // CHECK3-NEXT: br label [[COND_END]] 1215 // CHECK3: cond.end: 1216 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1217 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1218 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1219 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1220 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1221 // CHECK3: omp.inner.for.cond: 1222 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1223 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1224 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1225 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1226 // CHECK3: omp.inner.for.body: 1227 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1228 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1229 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1230 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1231 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 1232 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP16]] 1233 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1234 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1235 // CHECK3: omp.body.continue: 1236 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1237 // CHECK3: omp.inner.for.inc: 1238 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1239 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1240 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1241 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1242 // CHECK3: omp.inner.for.end: 1243 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1244 // CHECK3: omp.loop.exit: 1245 // CHECK3-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1246 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1247 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1248 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1249 // CHECK3: omp.precond.end: 1250 // CHECK3-NEXT: ret void 1251 // 1252 // 1253 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1254 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 1255 // CHECK3-NEXT: entry: 1256 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1257 // CHECK3-NEXT: ret void 1258 // 1259 // 1260 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1261 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1262 // CHECK4-NEXT: entry: 1263 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1264 // CHECK4-NEXT: [[TE:%.*]] = alloca i32, align 4 1265 // CHECK4-NEXT: [[TH:%.*]] = alloca i32, align 4 1266 // CHECK4-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 1267 // CHECK4-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 1268 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1269 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 1270 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 1271 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 1272 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1273 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1274 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1275 // CHECK4-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4 1276 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 4 1277 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 4 1278 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 4 1279 // CHECK4-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 1280 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 1281 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 1282 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1283 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1284 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1285 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1286 // CHECK4-NEXT: store i32 128, i32* [[TH]], align 4 1287 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 1288 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TE_CASTED]], align 4 1289 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_CASTED]], align 4 1290 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 1291 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TH_CASTED]], align 4 1292 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TH_CASTED]], align 4 1293 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 1294 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4 1295 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4 1296 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1297 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 1298 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 1299 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1300 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 1301 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP10]], align 4 1302 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1303 // CHECK4-NEXT: store i8* null, i8** [[TMP11]], align 4 1304 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1305 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 1306 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP13]], align 4 1307 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1308 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 1309 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP15]], align 4 1310 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1311 // CHECK4-NEXT: store i8* null, i8** [[TMP16]], align 4 1312 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1313 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 1314 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP18]], align 4 1315 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1316 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 1317 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP20]], align 4 1318 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1319 // CHECK4-NEXT: store i8* null, i8** [[TMP21]], align 4 1320 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1321 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 1322 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 4 1323 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1324 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 1325 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 4 1326 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1327 // CHECK4-NEXT: store i8* null, i8** [[TMP26]], align 4 1328 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1329 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1330 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 1331 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[TH]], align 4 1332 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[N_ADDR]], align 4 1333 // CHECK4-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR_]], align 4 1334 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1335 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0 1336 // CHECK4-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 1337 // CHECK4-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 1338 // CHECK4-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1339 // CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1340 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], 1 1341 // CHECK4-NEXT: [[TMP34:%.*]] = zext i32 [[ADD]] to i64 1342 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP34]]) 1343 // CHECK4-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 [[TMP30]]) 1344 // CHECK4-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 1345 // CHECK4-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1346 // CHECK4: omp_offload.failed: 1347 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 1348 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1349 // CHECK4: omp_offload.cont: 1350 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 1351 // CHECK4-NEXT: store i32 [[TMP37]], i32* [[N_CASTED4]], align 4 1352 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[N_CASTED4]], align 4 1353 // CHECK4-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1354 // CHECK4-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 1355 // CHECK4-NEXT: store i32 [[TMP38]], i32* [[TMP40]], align 4 1356 // CHECK4-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1357 // CHECK4-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i32* 1358 // CHECK4-NEXT: store i32 [[TMP38]], i32* [[TMP42]], align 4 1359 // CHECK4-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0 1360 // CHECK4-NEXT: store i8* null, i8** [[TMP43]], align 4 1361 // CHECK4-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 1362 // CHECK4-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to [100 x i32]** 1363 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP45]], align 4 1364 // CHECK4-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 1365 // CHECK4-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to [100 x i32]** 1366 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP47]], align 4 1367 // CHECK4-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1 1368 // CHECK4-NEXT: store i8* null, i8** [[TMP48]], align 4 1369 // CHECK4-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1370 // CHECK4-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1371 // CHECK4-NEXT: [[TMP51:%.*]] = load i32, i32* [[N_ADDR]], align 4 1372 // CHECK4-NEXT: store i32 [[TMP51]], i32* [[DOTCAPTURE_EXPR_9]], align 4 1373 // CHECK4-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 1374 // CHECK4-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP52]], 0 1375 // CHECK4-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1376 // CHECK4-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 1377 // CHECK4-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1378 // CHECK4-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 1379 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP53]], 1 1380 // CHECK4-NEXT: [[TMP54:%.*]] = zext i32 [[ADD14]] to i64 1381 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP54]]) 1382 // CHECK4-NEXT: [[TMP55:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, i32 2, i8** [[TMP49]], i8** [[TMP50]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1383 // CHECK4-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 1384 // CHECK4-NEXT: br i1 [[TMP56]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 1385 // CHECK4: omp_offload.failed15: 1386 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i32 [[TMP38]], [100 x i32]* @a) #[[ATTR2]] 1387 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT16]] 1388 // CHECK4: omp_offload.cont16: 1389 // CHECK4-NEXT: [[TMP57:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 1390 // CHECK4-NEXT: ret i32 [[TMP57]] 1391 // 1392 // 1393 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 1394 // CHECK4-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], i32 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 1395 // CHECK4-NEXT: entry: 1396 // CHECK4-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 1397 // CHECK4-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 1398 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1399 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1400 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 1401 // CHECK4-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 1402 // CHECK4-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 1403 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1404 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1405 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1406 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 1407 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 1408 // CHECK4-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 1409 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP1]]) 1410 // CHECK4-NEXT: ret void 1411 // 1412 // 1413 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1414 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1415 // CHECK4-NEXT: entry: 1416 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1417 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1418 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1419 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1420 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1421 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1422 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1423 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1424 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1425 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1426 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1427 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1428 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1429 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1430 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1431 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1432 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1433 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1434 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1435 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1436 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1437 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1438 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1439 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1440 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1441 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1442 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1443 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1444 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1445 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1446 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1447 // CHECK4: omp.precond.then: 1448 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1449 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1450 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1451 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1452 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1453 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1454 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1455 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1456 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1457 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1458 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1459 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1460 // CHECK4: cond.true: 1461 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1462 // CHECK4-NEXT: br label [[COND_END:%.*]] 1463 // CHECK4: cond.false: 1464 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1465 // CHECK4-NEXT: br label [[COND_END]] 1466 // CHECK4: cond.end: 1467 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1468 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1469 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1470 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1471 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1472 // CHECK4: omp.inner.for.cond: 1473 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1474 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1475 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1476 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1477 // CHECK4: omp.inner.for.body: 1478 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1479 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1480 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1481 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1482 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 1483 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP16]] 1484 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1485 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1486 // CHECK4: omp.body.continue: 1487 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1488 // CHECK4: omp.inner.for.inc: 1489 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1490 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1491 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1492 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1493 // CHECK4: omp.inner.for.end: 1494 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1495 // CHECK4: omp.loop.exit: 1496 // CHECK4-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1497 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1498 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1499 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1500 // CHECK4: omp.precond.end: 1501 // CHECK4-NEXT: ret void 1502 // 1503 // 1504 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35 1505 // CHECK4-SAME: (i32 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1506 // CHECK4-NEXT: entry: 1507 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1508 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1509 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1510 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1511 // CHECK4-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1512 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP0]]) 1513 // CHECK4-NEXT: ret void 1514 // 1515 // 1516 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 1517 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1518 // CHECK4-NEXT: entry: 1519 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1520 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1521 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1522 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1523 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1524 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1525 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1526 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1527 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1528 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1529 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1530 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1531 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1532 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1533 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1534 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1535 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1536 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1537 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1538 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1539 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1540 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1541 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1542 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1543 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1544 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1545 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1546 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1547 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1548 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1549 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1550 // CHECK4: omp.precond.then: 1551 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1552 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1553 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1554 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1555 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1556 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1557 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1558 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1559 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1560 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1561 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1562 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1563 // CHECK4: cond.true: 1564 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1565 // CHECK4-NEXT: br label [[COND_END:%.*]] 1566 // CHECK4: cond.false: 1567 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1568 // CHECK4-NEXT: br label [[COND_END]] 1569 // CHECK4: cond.end: 1570 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1571 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1572 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1573 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1574 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1575 // CHECK4: omp.inner.for.cond: 1576 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1577 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1578 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1579 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1580 // CHECK4: omp.inner.for.body: 1581 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1582 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1583 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1584 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1585 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 1586 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP16]] 1587 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1588 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1589 // CHECK4: omp.body.continue: 1590 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1591 // CHECK4: omp.inner.for.inc: 1592 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1593 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1594 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1595 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1596 // CHECK4: omp.inner.for.end: 1597 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1598 // CHECK4: omp.loop.exit: 1599 // CHECK4-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1600 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1601 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1602 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1603 // CHECK4: omp.precond.end: 1604 // CHECK4-NEXT: ret void 1605 // 1606 // 1607 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1608 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] { 1609 // CHECK4-NEXT: entry: 1610 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 1611 // CHECK4-NEXT: ret void 1612 // 1613 // 1614 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1615 // CHECK5-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1616 // CHECK5-NEXT: entry: 1617 // CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1618 // CHECK5-NEXT: [[TE:%.*]] = alloca i32, align 4 1619 // CHECK5-NEXT: [[TH:%.*]] = alloca i32, align 4 1620 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1621 // CHECK5-NEXT: [[I1:%.*]] = alloca i32, align 4 1622 // CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1623 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1624 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1625 // CHECK5-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1626 // CHECK5-NEXT: store i32 128, i32* [[TH]], align 4 1627 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 1628 // CHECK5-NEXT: br label [[FOR_COND:%.*]] 1629 // CHECK5: for.cond: 1630 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 1631 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 1632 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]] 1633 // CHECK5-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1634 // CHECK5: for.body: 1635 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1636 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 1637 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM]] 1638 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1639 // CHECK5-NEXT: br label [[FOR_INC:%.*]] 1640 // CHECK5: for.inc: 1641 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 1642 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1643 // CHECK5-NEXT: store i32 [[INC]], i32* [[I]], align 4 1644 // CHECK5-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 1645 // CHECK5: for.end: 1646 // CHECK5-NEXT: store i32 0, i32* [[I1]], align 4 1647 // CHECK5-NEXT: br label [[FOR_COND2:%.*]] 1648 // CHECK5: for.cond2: 1649 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[I1]], align 4 1650 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 1651 // CHECK5-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP5]], [[TMP6]] 1652 // CHECK5-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END9:%.*]] 1653 // CHECK5: for.body4: 1654 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[I1]], align 4 1655 // CHECK5-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP7]] to i64 1656 // CHECK5-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM5]] 1657 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX6]], align 4 1658 // CHECK5-NEXT: br label [[FOR_INC7:%.*]] 1659 // CHECK5: for.inc7: 1660 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[I1]], align 4 1661 // CHECK5-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP8]], 1 1662 // CHECK5-NEXT: store i32 [[INC8]], i32* [[I1]], align 4 1663 // CHECK5-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]] 1664 // CHECK5: for.end9: 1665 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 1666 // CHECK5-NEXT: ret i32 [[TMP9]] 1667 // 1668 // 1669 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1670 // CHECK6-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1671 // CHECK6-NEXT: entry: 1672 // CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1673 // CHECK6-NEXT: [[TE:%.*]] = alloca i32, align 4 1674 // CHECK6-NEXT: [[TH:%.*]] = alloca i32, align 4 1675 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 1676 // CHECK6-NEXT: [[I1:%.*]] = alloca i32, align 4 1677 // CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1678 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1679 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1680 // CHECK6-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1681 // CHECK6-NEXT: store i32 128, i32* [[TH]], align 4 1682 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4 1683 // CHECK6-NEXT: br label [[FOR_COND:%.*]] 1684 // CHECK6: for.cond: 1685 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 1686 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 1687 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]] 1688 // CHECK6-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1689 // CHECK6: for.body: 1690 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1691 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 1692 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM]] 1693 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1694 // CHECK6-NEXT: br label [[FOR_INC:%.*]] 1695 // CHECK6: for.inc: 1696 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 1697 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1698 // CHECK6-NEXT: store i32 [[INC]], i32* [[I]], align 4 1699 // CHECK6-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 1700 // CHECK6: for.end: 1701 // CHECK6-NEXT: store i32 0, i32* [[I1]], align 4 1702 // CHECK6-NEXT: br label [[FOR_COND2:%.*]] 1703 // CHECK6: for.cond2: 1704 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[I1]], align 4 1705 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 1706 // CHECK6-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP5]], [[TMP6]] 1707 // CHECK6-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END9:%.*]] 1708 // CHECK6: for.body4: 1709 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[I1]], align 4 1710 // CHECK6-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP7]] to i64 1711 // CHECK6-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM5]] 1712 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX6]], align 4 1713 // CHECK6-NEXT: br label [[FOR_INC7:%.*]] 1714 // CHECK6: for.inc7: 1715 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[I1]], align 4 1716 // CHECK6-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP8]], 1 1717 // CHECK6-NEXT: store i32 [[INC8]], i32* [[I1]], align 4 1718 // CHECK6-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]] 1719 // CHECK6: for.end9: 1720 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 1721 // CHECK6-NEXT: ret i32 [[TMP9]] 1722 // 1723 // 1724 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1725 // CHECK7-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1726 // CHECK7-NEXT: entry: 1727 // CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1728 // CHECK7-NEXT: [[TE:%.*]] = alloca i32, align 4 1729 // CHECK7-NEXT: [[TH:%.*]] = alloca i32, align 4 1730 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1731 // CHECK7-NEXT: [[I1:%.*]] = alloca i32, align 4 1732 // CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1733 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1734 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1735 // CHECK7-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1736 // CHECK7-NEXT: store i32 128, i32* [[TH]], align 4 1737 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 1738 // CHECK7-NEXT: br label [[FOR_COND:%.*]] 1739 // CHECK7: for.cond: 1740 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 1741 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 1742 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]] 1743 // CHECK7-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1744 // CHECK7: for.body: 1745 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1746 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP3]] 1747 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1748 // CHECK7-NEXT: br label [[FOR_INC:%.*]] 1749 // CHECK7: for.inc: 1750 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 1751 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1752 // CHECK7-NEXT: store i32 [[INC]], i32* [[I]], align 4 1753 // CHECK7-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1754 // CHECK7: for.end: 1755 // CHECK7-NEXT: store i32 0, i32* [[I1]], align 4 1756 // CHECK7-NEXT: br label [[FOR_COND2:%.*]] 1757 // CHECK7: for.cond2: 1758 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[I1]], align 4 1759 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 1760 // CHECK7-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP5]], [[TMP6]] 1761 // CHECK7-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 1762 // CHECK7: for.body4: 1763 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[I1]], align 4 1764 // CHECK7-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP7]] 1765 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX5]], align 4 1766 // CHECK7-NEXT: br label [[FOR_INC6:%.*]] 1767 // CHECK7: for.inc6: 1768 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[I1]], align 4 1769 // CHECK7-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP8]], 1 1770 // CHECK7-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 1771 // CHECK7-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP5:![0-9]+]] 1772 // CHECK7: for.end8: 1773 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 1774 // CHECK7-NEXT: ret i32 [[TMP9]] 1775 // 1776 // 1777 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1778 // CHECK8-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1779 // CHECK8-NEXT: entry: 1780 // CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1781 // CHECK8-NEXT: [[TE:%.*]] = alloca i32, align 4 1782 // CHECK8-NEXT: [[TH:%.*]] = alloca i32, align 4 1783 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 1784 // CHECK8-NEXT: [[I1:%.*]] = alloca i32, align 4 1785 // CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1786 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1787 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1788 // CHECK8-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1789 // CHECK8-NEXT: store i32 128, i32* [[TH]], align 4 1790 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 1791 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 1792 // CHECK8: for.cond: 1793 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 1794 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 1795 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]] 1796 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1797 // CHECK8: for.body: 1798 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1799 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP3]] 1800 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1801 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 1802 // CHECK8: for.inc: 1803 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 1804 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1805 // CHECK8-NEXT: store i32 [[INC]], i32* [[I]], align 4 1806 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1807 // CHECK8: for.end: 1808 // CHECK8-NEXT: store i32 0, i32* [[I1]], align 4 1809 // CHECK8-NEXT: br label [[FOR_COND2:%.*]] 1810 // CHECK8: for.cond2: 1811 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[I1]], align 4 1812 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 1813 // CHECK8-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP5]], [[TMP6]] 1814 // CHECK8-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 1815 // CHECK8: for.body4: 1816 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[I1]], align 4 1817 // CHECK8-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP7]] 1818 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX5]], align 4 1819 // CHECK8-NEXT: br label [[FOR_INC6:%.*]] 1820 // CHECK8: for.inc6: 1821 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[I1]], align 4 1822 // CHECK8-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP8]], 1 1823 // CHECK8-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 1824 // CHECK8-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP5:![0-9]+]] 1825 // CHECK8: for.end8: 1826 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 1827 // CHECK8-NEXT: ret i32 [[TMP9]] 1828 // 1829 // 1830 // CHECK9-LABEL: define {{[^@]+}}@_Z15teams_local_argv 1831 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 1832 // CHECK9-NEXT: entry: 1833 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 1834 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1835 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1836 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1837 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 1838 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 1839 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 1840 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 1841 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1842 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1843 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1844 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 1845 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1846 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1847 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 1848 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 1849 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 1850 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1851 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 1852 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1853 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 1854 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 1855 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 1856 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1857 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 1858 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 1859 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1860 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 1861 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 1862 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1863 // CHECK9-NEXT: store i64 4, i64* [[TMP10]], align 8 1864 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1865 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 1866 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1867 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1868 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 1869 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1870 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1871 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 1872 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 1873 // CHECK9-NEXT: store i64 8, i64* [[TMP16]], align 8 1874 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1875 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8 1876 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1877 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 1878 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 1879 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1880 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 1881 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 1882 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1883 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 1884 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1885 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8 1886 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1887 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1888 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1889 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 1890 // CHECK9-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 1891 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1892 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 1893 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1894 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1895 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1896 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1897 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 1898 // CHECK9-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 1899 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]]) 1900 // CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1901 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 1902 // CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1903 // CHECK9: omp_offload.failed: 1904 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1905 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1906 // CHECK9: omp_offload.cont: 1907 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 1908 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1909 // CHECK9-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1910 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 1911 // CHECK9-NEXT: ret i32 [[TMP33]] 1912 // 1913 // 1914 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73 1915 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1916 // CHECK9-NEXT: entry: 1917 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1918 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1919 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1920 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1921 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1922 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1923 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1924 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1925 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1926 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 1927 // CHECK9-NEXT: ret void 1928 // 1929 // 1930 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1931 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1932 // CHECK9-NEXT: entry: 1933 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1934 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1935 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1936 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1937 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1938 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1939 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1940 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1941 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1942 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1943 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1944 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1945 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1946 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1947 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1948 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1949 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1950 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1951 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1952 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1953 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1954 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1955 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1956 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1957 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1958 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1959 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1960 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1961 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1962 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1963 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1964 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1965 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1966 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1967 // CHECK9: omp.precond.then: 1968 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1969 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1970 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1971 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1972 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1973 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1974 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1975 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1976 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1977 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1978 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1979 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1980 // CHECK9: cond.true: 1981 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1982 // CHECK9-NEXT: br label [[COND_END:%.*]] 1983 // CHECK9: cond.false: 1984 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1985 // CHECK9-NEXT: br label [[COND_END]] 1986 // CHECK9: cond.end: 1987 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1988 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1989 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1990 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1991 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1992 // CHECK9: omp.inner.for.cond: 1993 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1994 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1995 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1996 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1997 // CHECK9: omp.inner.for.body: 1998 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1999 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2000 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2001 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2002 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 2003 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 2004 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 2005 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2006 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2007 // CHECK9: omp.body.continue: 2008 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2009 // CHECK9: omp.inner.for.inc: 2010 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2011 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2012 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2013 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2014 // CHECK9: omp.inner.for.end: 2015 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2016 // CHECK9: omp.loop.exit: 2017 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2018 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2019 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2020 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2021 // CHECK9: omp.precond.end: 2022 // CHECK9-NEXT: ret void 2023 // 2024 // 2025 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2026 // CHECK9-SAME: () #[[ATTR4:[0-9]+]] { 2027 // CHECK9-NEXT: entry: 2028 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 2029 // CHECK9-NEXT: ret void 2030 // 2031 // 2032 // CHECK10-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2033 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 2034 // CHECK10-NEXT: entry: 2035 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4 2036 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2037 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2038 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2039 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 2040 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 2041 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 2042 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 2043 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2044 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2045 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2046 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4 2047 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2048 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 2049 // CHECK10-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2050 // CHECK10-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 2051 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 2052 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 2053 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 2054 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2055 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 2056 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 2057 // CHECK10-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 2058 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2059 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 2060 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 2061 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2062 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 2063 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 2064 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2065 // CHECK10-NEXT: store i64 4, i64* [[TMP10]], align 8 2066 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2067 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 2068 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2069 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 2070 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 2071 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2072 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 2073 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 2074 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 2075 // CHECK10-NEXT: store i64 8, i64* [[TMP16]], align 8 2076 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2077 // CHECK10-NEXT: store i8* null, i8** [[TMP17]], align 8 2078 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2079 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 2080 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 2081 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2082 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 2083 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 2084 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2085 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 2086 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2087 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8 2088 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2089 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2090 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2091 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 2092 // CHECK10-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 2093 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2094 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 2095 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2096 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2097 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2098 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2099 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 2100 // CHECK10-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 2101 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]]) 2102 // CHECK10-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2103 // CHECK10-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 2104 // CHECK10-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2105 // CHECK10: omp_offload.failed: 2106 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2107 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 2108 // CHECK10: omp_offload.cont: 2109 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 2110 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2111 // CHECK10-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2112 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 2113 // CHECK10-NEXT: ret i32 [[TMP33]] 2114 // 2115 // 2116 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73 2117 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2118 // CHECK10-NEXT: entry: 2119 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2120 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2121 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2122 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2123 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2124 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2125 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2126 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2127 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2128 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 2129 // CHECK10-NEXT: ret void 2130 // 2131 // 2132 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 2133 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2134 // CHECK10-NEXT: entry: 2135 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2136 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2137 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2138 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2139 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2140 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2141 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2142 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2143 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2144 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2145 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2146 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2147 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2148 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2149 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 2150 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2151 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2152 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2153 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2154 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2155 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2156 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2157 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2158 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2159 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2160 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2161 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2162 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2163 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2164 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2165 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2166 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2167 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2168 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2169 // CHECK10: omp.precond.then: 2170 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2171 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2172 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2173 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2174 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2175 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2176 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2177 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2178 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2179 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2180 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2181 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2182 // CHECK10: cond.true: 2183 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2184 // CHECK10-NEXT: br label [[COND_END:%.*]] 2185 // CHECK10: cond.false: 2186 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2187 // CHECK10-NEXT: br label [[COND_END]] 2188 // CHECK10: cond.end: 2189 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2190 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2191 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2192 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2193 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2194 // CHECK10: omp.inner.for.cond: 2195 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2196 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2197 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2198 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2199 // CHECK10: omp.inner.for.body: 2200 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2201 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2202 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2203 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2204 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 2205 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 2206 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 2207 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2208 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2209 // CHECK10: omp.body.continue: 2210 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2211 // CHECK10: omp.inner.for.inc: 2212 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2213 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2214 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2215 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2216 // CHECK10: omp.inner.for.end: 2217 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2218 // CHECK10: omp.loop.exit: 2219 // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2220 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2221 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2222 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2223 // CHECK10: omp.precond.end: 2224 // CHECK10-NEXT: ret void 2225 // 2226 // 2227 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2228 // CHECK10-SAME: () #[[ATTR4:[0-9]+]] { 2229 // CHECK10-NEXT: entry: 2230 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2231 // CHECK10-NEXT: ret void 2232 // 2233 // 2234 // CHECK11-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2235 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2236 // CHECK11-NEXT: entry: 2237 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 2238 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2239 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2240 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2241 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 2242 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 2243 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 2244 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 2245 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2246 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2247 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2248 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 2249 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2250 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 2251 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 2252 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2253 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2254 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 2255 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 2256 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 2257 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 2258 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 2259 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2260 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 2261 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4 2262 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2263 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32* 2264 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4 2265 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2266 // CHECK11-NEXT: store i64 4, i64* [[TMP10]], align 4 2267 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2268 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 2269 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2270 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2271 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 2272 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2273 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 2274 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 2275 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 2276 // CHECK11-NEXT: store i64 4, i64* [[TMP16]], align 4 2277 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2278 // CHECK11-NEXT: store i8* null, i8** [[TMP17]], align 4 2279 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2280 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 2281 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4 2282 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2283 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 2284 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4 2285 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2286 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4 2287 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2288 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4 2289 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2290 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2291 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2292 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 2293 // CHECK11-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 2294 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2295 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 2296 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2297 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2298 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2299 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2300 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 2301 // CHECK11-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 2302 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]]) 2303 // CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2304 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 2305 // CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2306 // CHECK11: omp_offload.failed: 2307 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2308 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2309 // CHECK11: omp_offload.cont: 2310 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 2311 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2312 // CHECK11-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2313 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 2314 // CHECK11-NEXT: ret i32 [[TMP33]] 2315 // 2316 // 2317 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73 2318 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2319 // CHECK11-NEXT: entry: 2320 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2321 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2322 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2323 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2324 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2325 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2326 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2327 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2328 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 2329 // CHECK11-NEXT: ret void 2330 // 2331 // 2332 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2333 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2334 // CHECK11-NEXT: entry: 2335 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2336 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2337 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2338 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2339 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2340 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2341 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2342 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2343 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2344 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2345 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2346 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2347 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2348 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2349 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2350 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2351 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2352 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2353 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2354 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2355 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2356 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2357 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2358 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2359 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2360 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2361 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2362 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2363 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2364 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2365 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2366 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2367 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2368 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2369 // CHECK11: omp.precond.then: 2370 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2371 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2372 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2373 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2374 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2375 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2376 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2377 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2378 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2379 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2380 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2381 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2382 // CHECK11: cond.true: 2383 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2384 // CHECK11-NEXT: br label [[COND_END:%.*]] 2385 // CHECK11: cond.false: 2386 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2387 // CHECK11-NEXT: br label [[COND_END]] 2388 // CHECK11: cond.end: 2389 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2390 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2391 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2392 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2393 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2394 // CHECK11: omp.inner.for.cond: 2395 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2396 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2397 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2398 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2399 // CHECK11: omp.inner.for.body: 2400 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2401 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2402 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2403 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2404 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 2405 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 2406 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2407 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2408 // CHECK11: omp.body.continue: 2409 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2410 // CHECK11: omp.inner.for.inc: 2411 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2412 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2413 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2414 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2415 // CHECK11: omp.inner.for.end: 2416 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2417 // CHECK11: omp.loop.exit: 2418 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2419 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2420 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2421 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2422 // CHECK11: omp.precond.end: 2423 // CHECK11-NEXT: ret void 2424 // 2425 // 2426 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2427 // CHECK11-SAME: () #[[ATTR4:[0-9]+]] { 2428 // CHECK11-NEXT: entry: 2429 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2430 // CHECK11-NEXT: ret void 2431 // 2432 // 2433 // CHECK12-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2434 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 2435 // CHECK12-NEXT: entry: 2436 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4 2437 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2438 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2439 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2440 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 2441 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 2442 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 2443 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 2444 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2445 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2446 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2447 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4 2448 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2449 // CHECK12-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 2450 // CHECK12-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 2451 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2452 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2453 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 2454 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 2455 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 2456 // CHECK12-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 2457 // CHECK12-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 2458 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2459 // CHECK12-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 2460 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4 2461 // CHECK12-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2462 // CHECK12-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32* 2463 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4 2464 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2465 // CHECK12-NEXT: store i64 4, i64* [[TMP10]], align 4 2466 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2467 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4 2468 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2469 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2470 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 2471 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2472 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 2473 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 2474 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 2475 // CHECK12-NEXT: store i64 4, i64* [[TMP16]], align 4 2476 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2477 // CHECK12-NEXT: store i8* null, i8** [[TMP17]], align 4 2478 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2479 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 2480 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4 2481 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2482 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 2483 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4 2484 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2485 // CHECK12-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4 2486 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2487 // CHECK12-NEXT: store i8* null, i8** [[TMP23]], align 4 2488 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2489 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2490 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2491 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 2492 // CHECK12-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 2493 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2494 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 2495 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2496 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2497 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2498 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2499 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 2500 // CHECK12-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 2501 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]]) 2502 // CHECK12-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2503 // CHECK12-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 2504 // CHECK12-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2505 // CHECK12: omp_offload.failed: 2506 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2507 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2508 // CHECK12: omp_offload.cont: 2509 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 2510 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2511 // CHECK12-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2512 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 2513 // CHECK12-NEXT: ret i32 [[TMP33]] 2514 // 2515 // 2516 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73 2517 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2518 // CHECK12-NEXT: entry: 2519 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2520 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2521 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2522 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2523 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2524 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2525 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2526 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2527 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 2528 // CHECK12-NEXT: ret void 2529 // 2530 // 2531 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 2532 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2533 // CHECK12-NEXT: entry: 2534 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2535 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2536 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2537 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2538 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2539 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2540 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2541 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2542 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2543 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2544 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2545 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2546 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2547 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2548 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2549 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2550 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2551 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2552 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2553 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2554 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2555 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2556 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2557 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2558 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2559 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2560 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2561 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2562 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2563 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2564 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 2565 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2566 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2567 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2568 // CHECK12: omp.precond.then: 2569 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2570 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2571 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2572 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2573 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2574 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2575 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2576 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2577 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2578 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2579 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2580 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2581 // CHECK12: cond.true: 2582 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2583 // CHECK12-NEXT: br label [[COND_END:%.*]] 2584 // CHECK12: cond.false: 2585 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2586 // CHECK12-NEXT: br label [[COND_END]] 2587 // CHECK12: cond.end: 2588 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2589 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2590 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2591 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2592 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2593 // CHECK12: omp.inner.for.cond: 2594 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2595 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2596 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2597 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2598 // CHECK12: omp.inner.for.body: 2599 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2600 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2601 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2602 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2603 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 2604 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 2605 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2606 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2607 // CHECK12: omp.body.continue: 2608 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2609 // CHECK12: omp.inner.for.inc: 2610 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2611 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2612 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2613 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2614 // CHECK12: omp.inner.for.end: 2615 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2616 // CHECK12: omp.loop.exit: 2617 // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2618 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2619 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2620 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2621 // CHECK12: omp.precond.end: 2622 // CHECK12-NEXT: ret void 2623 // 2624 // 2625 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2626 // CHECK12-SAME: () #[[ATTR4:[0-9]+]] { 2627 // CHECK12-NEXT: entry: 2628 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 2629 // CHECK12-NEXT: ret void 2630 // 2631 // 2632 // CHECK13-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2633 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 2634 // CHECK13-NEXT: entry: 2635 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 2636 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2637 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2638 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2639 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4 2640 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2641 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 2642 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2643 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 2644 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 2645 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 2646 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 2647 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 2648 // CHECK13: for.cond: 2649 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 2650 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 2651 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[TMP4]] 2652 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2653 // CHECK13: for.body: 2654 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 2655 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 2656 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 2657 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2658 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 2659 // CHECK13: for.inc: 2660 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 2661 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 2662 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 2663 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2664 // CHECK13: for.end: 2665 // CHECK13-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 2666 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4 2667 // CHECK13-NEXT: [[TMP8:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2668 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP8]]) 2669 // CHECK13-NEXT: ret i32 [[TMP7]] 2670 // 2671 // 2672 // CHECK14-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2673 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 2674 // CHECK14-NEXT: entry: 2675 // CHECK14-NEXT: [[N:%.*]] = alloca i32, align 4 2676 // CHECK14-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2677 // CHECK14-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2678 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 2679 // CHECK14-NEXT: store i32 100, i32* [[N]], align 4 2680 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2681 // CHECK14-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 2682 // CHECK14-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2683 // CHECK14-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 2684 // CHECK14-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 2685 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 2686 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 2687 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 2688 // CHECK14: for.cond: 2689 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 2690 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 2691 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[TMP4]] 2692 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2693 // CHECK14: for.body: 2694 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 2695 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 2696 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 2697 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2698 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 2699 // CHECK14: for.inc: 2700 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 2701 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 2702 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 2703 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2704 // CHECK14: for.end: 2705 // CHECK14-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 2706 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4 2707 // CHECK14-NEXT: [[TMP8:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2708 // CHECK14-NEXT: call void @llvm.stackrestore(i8* [[TMP8]]) 2709 // CHECK14-NEXT: ret i32 [[TMP7]] 2710 // 2711 // 2712 // CHECK15-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2713 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 2714 // CHECK15-NEXT: entry: 2715 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 2716 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2717 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2718 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2719 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4 2720 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2721 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 2722 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 2723 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2724 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2725 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 2726 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 2727 // CHECK15: for.cond: 2728 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 2729 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 2730 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[TMP3]] 2731 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2732 // CHECK15: for.body: 2733 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 2734 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP4]] 2735 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2736 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 2737 // CHECK15: for.inc: 2738 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 2739 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1 2740 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 2741 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 2742 // CHECK15: for.end: 2743 // CHECK15-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 2744 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4 2745 // CHECK15-NEXT: [[TMP7:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2746 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP7]]) 2747 // CHECK15-NEXT: ret i32 [[TMP6]] 2748 // 2749 // 2750 // CHECK16-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2751 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] { 2752 // CHECK16-NEXT: entry: 2753 // CHECK16-NEXT: [[N:%.*]] = alloca i32, align 4 2754 // CHECK16-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2755 // CHECK16-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2756 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 2757 // CHECK16-NEXT: store i32 100, i32* [[N]], align 4 2758 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2759 // CHECK16-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 2760 // CHECK16-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 2761 // CHECK16-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2762 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2763 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 2764 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 2765 // CHECK16: for.cond: 2766 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 2767 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 2768 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[TMP3]] 2769 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2770 // CHECK16: for.body: 2771 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 2772 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP4]] 2773 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2774 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 2775 // CHECK16: for.inc: 2776 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 2777 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1 2778 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 2779 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 2780 // CHECK16: for.end: 2781 // CHECK16-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 2782 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4 2783 // CHECK16-NEXT: [[TMP7:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2784 // CHECK16-NEXT: call void @llvm.stackrestore(i8* [[TMP7]]) 2785 // CHECK16-NEXT: ret i32 [[TMP6]] 2786 // 2787 // 2788 // CHECK17-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2789 // CHECK17-SAME: () #[[ATTR0:[0-9]+]] { 2790 // CHECK17-NEXT: entry: 2791 // CHECK17-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2792 // CHECK17-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 2793 // CHECK17-NEXT: ret i32 [[CALL]] 2794 // 2795 // 2796 // CHECK17-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2797 // CHECK17-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2798 // CHECK17-NEXT: entry: 2799 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2800 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2801 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2802 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2803 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2804 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2805 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2806 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2807 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2808 // CHECK17-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 2809 // CHECK17-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 2810 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2811 // CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 2812 // CHECK17-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 2813 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2814 // CHECK17-NEXT: store i8* null, i8** [[TMP4]], align 8 2815 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2816 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2817 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 2818 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2819 // CHECK17-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2820 // CHECK17-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2821 // CHECK17: omp_offload.failed: 2822 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 2823 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 2824 // CHECK17: omp_offload.cont: 2825 // CHECK17-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2826 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0 2827 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2828 // CHECK17-NEXT: ret i32 [[TMP9]] 2829 // 2830 // 2831 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109 2832 // CHECK17-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 2833 // CHECK17-NEXT: entry: 2834 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2835 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2836 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2837 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2838 // CHECK17-NEXT: ret void 2839 // 2840 // 2841 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 2842 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2843 // CHECK17-NEXT: entry: 2844 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2845 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2846 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2847 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2848 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2849 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2850 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2851 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2852 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2853 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 2854 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2855 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2856 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2857 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2858 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2859 // CHECK17-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2860 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2861 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2862 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2863 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2864 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2865 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2866 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2867 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2868 // CHECK17: cond.true: 2869 // CHECK17-NEXT: br label [[COND_END:%.*]] 2870 // CHECK17: cond.false: 2871 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2872 // CHECK17-NEXT: br label [[COND_END]] 2873 // CHECK17: cond.end: 2874 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2875 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2876 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2877 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2878 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2879 // CHECK17: omp.inner.for.cond: 2880 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2881 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2882 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2883 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2884 // CHECK17: omp.inner.for.body: 2885 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2886 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2887 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2888 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2889 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2890 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2891 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2892 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 2893 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2894 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2895 // CHECK17: omp.body.continue: 2896 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2897 // CHECK17: omp.inner.for.inc: 2898 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2899 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2900 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2901 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 2902 // CHECK17: omp.inner.for.end: 2903 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2904 // CHECK17: omp.loop.exit: 2905 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2906 // CHECK17-NEXT: ret void 2907 // 2908 // 2909 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2910 // CHECK17-SAME: () #[[ATTR3:[0-9]+]] { 2911 // CHECK17-NEXT: entry: 2912 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1) 2913 // CHECK17-NEXT: ret void 2914 // 2915 // 2916 // CHECK18-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2917 // CHECK18-SAME: () #[[ATTR0:[0-9]+]] { 2918 // CHECK18-NEXT: entry: 2919 // CHECK18-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2920 // CHECK18-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 2921 // CHECK18-NEXT: ret i32 [[CALL]] 2922 // 2923 // 2924 // CHECK18-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2925 // CHECK18-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2926 // CHECK18-NEXT: entry: 2927 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2928 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2929 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2930 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2931 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 2932 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2933 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2934 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2935 // CHECK18-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2936 // CHECK18-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 2937 // CHECK18-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 2938 // CHECK18-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2939 // CHECK18-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 2940 // CHECK18-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 2941 // CHECK18-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2942 // CHECK18-NEXT: store i8* null, i8** [[TMP4]], align 8 2943 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2944 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2945 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 2946 // CHECK18-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2947 // CHECK18-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2948 // CHECK18-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2949 // CHECK18: omp_offload.failed: 2950 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 2951 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 2952 // CHECK18: omp_offload.cont: 2953 // CHECK18-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2954 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0 2955 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2956 // CHECK18-NEXT: ret i32 [[TMP9]] 2957 // 2958 // 2959 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109 2960 // CHECK18-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 2961 // CHECK18-NEXT: entry: 2962 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2963 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2964 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2965 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2966 // CHECK18-NEXT: ret void 2967 // 2968 // 2969 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined. 2970 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2971 // CHECK18-NEXT: entry: 2972 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2973 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2974 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2975 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2976 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 2977 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2978 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2979 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2980 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2981 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 2982 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2983 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2984 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2985 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2986 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2987 // CHECK18-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2988 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2989 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2990 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2991 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2992 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2993 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2994 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2995 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2996 // CHECK18: cond.true: 2997 // CHECK18-NEXT: br label [[COND_END:%.*]] 2998 // CHECK18: cond.false: 2999 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3000 // CHECK18-NEXT: br label [[COND_END]] 3001 // CHECK18: cond.end: 3002 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3003 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3004 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3005 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3006 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3007 // CHECK18: omp.inner.for.cond: 3008 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3009 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3010 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3011 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3012 // CHECK18: omp.inner.for.body: 3013 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3014 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3015 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3016 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3017 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3018 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3019 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 3020 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 3021 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3022 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3023 // CHECK18: omp.body.continue: 3024 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3025 // CHECK18: omp.inner.for.inc: 3026 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3027 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3028 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3029 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 3030 // CHECK18: omp.inner.for.end: 3031 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3032 // CHECK18: omp.loop.exit: 3033 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3034 // CHECK18-NEXT: ret void 3035 // 3036 // 3037 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3038 // CHECK18-SAME: () #[[ATTR3:[0-9]+]] { 3039 // CHECK18-NEXT: entry: 3040 // CHECK18-NEXT: call void @__tgt_register_requires(i64 1) 3041 // CHECK18-NEXT: ret void 3042 // 3043 // 3044 // CHECK19-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3045 // CHECK19-SAME: () #[[ATTR0:[0-9]+]] { 3046 // CHECK19-NEXT: entry: 3047 // CHECK19-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3048 // CHECK19-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 3049 // CHECK19-NEXT: ret i32 [[CALL]] 3050 // 3051 // 3052 // CHECK19-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3053 // CHECK19-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3054 // CHECK19-NEXT: entry: 3055 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3056 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 3057 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 3058 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 3059 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 3060 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3061 // CHECK19-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3062 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3063 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3064 // CHECK19-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 3065 // CHECK19-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 3066 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3067 // CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 3068 // CHECK19-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 3069 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3070 // CHECK19-NEXT: store i8* null, i8** [[TMP4]], align 4 3071 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3072 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3073 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 3074 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3075 // CHECK19-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 3076 // CHECK19-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3077 // CHECK19: omp_offload.failed: 3078 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 3079 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 3080 // CHECK19: omp_offload.cont: 3081 // CHECK19-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3082 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0 3083 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3084 // CHECK19-NEXT: ret i32 [[TMP9]] 3085 // 3086 // 3087 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109 3088 // CHECK19-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 3089 // CHECK19-NEXT: entry: 3090 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3091 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3092 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3093 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3094 // CHECK19-NEXT: ret void 3095 // 3096 // 3097 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined. 3098 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3099 // CHECK19-NEXT: entry: 3100 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3101 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3102 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3103 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3104 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 3105 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3106 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3107 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3108 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3109 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 3110 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3111 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3112 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3113 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3114 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3115 // CHECK19-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3116 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3117 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3118 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3119 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3120 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3121 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3122 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3123 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3124 // CHECK19: cond.true: 3125 // CHECK19-NEXT: br label [[COND_END:%.*]] 3126 // CHECK19: cond.false: 3127 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3128 // CHECK19-NEXT: br label [[COND_END]] 3129 // CHECK19: cond.end: 3130 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3131 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3132 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3133 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3134 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3135 // CHECK19: omp.inner.for.cond: 3136 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3137 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3138 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3139 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3140 // CHECK19: omp.inner.for.body: 3141 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3142 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3143 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3144 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3145 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3146 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3147 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 3148 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3149 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3150 // CHECK19: omp.body.continue: 3151 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3152 // CHECK19: omp.inner.for.inc: 3153 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3154 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3155 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3156 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 3157 // CHECK19: omp.inner.for.end: 3158 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3159 // CHECK19: omp.loop.exit: 3160 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3161 // CHECK19-NEXT: ret void 3162 // 3163 // 3164 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3165 // CHECK19-SAME: () #[[ATTR3:[0-9]+]] { 3166 // CHECK19-NEXT: entry: 3167 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1) 3168 // CHECK19-NEXT: ret void 3169 // 3170 // 3171 // CHECK20-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3172 // CHECK20-SAME: () #[[ATTR0:[0-9]+]] { 3173 // CHECK20-NEXT: entry: 3174 // CHECK20-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3175 // CHECK20-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 3176 // CHECK20-NEXT: ret i32 [[CALL]] 3177 // 3178 // 3179 // CHECK20-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3180 // CHECK20-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3181 // CHECK20-NEXT: entry: 3182 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3183 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 3184 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 3185 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 3186 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 3187 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3188 // CHECK20-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3189 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3190 // CHECK20-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3191 // CHECK20-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 3192 // CHECK20-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 3193 // CHECK20-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3194 // CHECK20-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 3195 // CHECK20-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 3196 // CHECK20-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3197 // CHECK20-NEXT: store i8* null, i8** [[TMP4]], align 4 3198 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3199 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3200 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 3201 // CHECK20-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3202 // CHECK20-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 3203 // CHECK20-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3204 // CHECK20: omp_offload.failed: 3205 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 3206 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 3207 // CHECK20: omp_offload.cont: 3208 // CHECK20-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3209 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0 3210 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3211 // CHECK20-NEXT: ret i32 [[TMP9]] 3212 // 3213 // 3214 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109 3215 // CHECK20-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 3216 // CHECK20-NEXT: entry: 3217 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3218 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3219 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3220 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3221 // CHECK20-NEXT: ret void 3222 // 3223 // 3224 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined. 3225 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3226 // CHECK20-NEXT: entry: 3227 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3228 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3229 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3230 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3231 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 3232 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3233 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3234 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3235 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3236 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 3237 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3238 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3239 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3240 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3241 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3242 // CHECK20-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3243 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3244 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3245 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3246 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3247 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3248 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3249 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3250 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3251 // CHECK20: cond.true: 3252 // CHECK20-NEXT: br label [[COND_END:%.*]] 3253 // CHECK20: cond.false: 3254 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3255 // CHECK20-NEXT: br label [[COND_END]] 3256 // CHECK20: cond.end: 3257 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3258 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3259 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3260 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3261 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3262 // CHECK20: omp.inner.for.cond: 3263 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3264 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3265 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3266 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3267 // CHECK20: omp.inner.for.body: 3268 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3269 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3270 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3271 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3272 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3273 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3274 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 3275 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3276 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3277 // CHECK20: omp.body.continue: 3278 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3279 // CHECK20: omp.inner.for.inc: 3280 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3281 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3282 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3283 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 3284 // CHECK20: omp.inner.for.end: 3285 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3286 // CHECK20: omp.loop.exit: 3287 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3288 // CHECK20-NEXT: ret void 3289 // 3290 // 3291 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3292 // CHECK20-SAME: () #[[ATTR3:[0-9]+]] { 3293 // CHECK20-NEXT: entry: 3294 // CHECK20-NEXT: call void @__tgt_register_requires(i64 1) 3295 // CHECK20-NEXT: ret void 3296 // 3297 // 3298 // CHECK21-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3299 // CHECK21-SAME: () #[[ATTR0:[0-9]+]] { 3300 // CHECK21-NEXT: entry: 3301 // CHECK21-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3302 // CHECK21-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 3303 // CHECK21-NEXT: ret i32 [[CALL]] 3304 // 3305 // 3306 // CHECK21-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3307 // CHECK21-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3308 // CHECK21-NEXT: entry: 3309 // CHECK21-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3310 // CHECK21-NEXT: [[I:%.*]] = alloca i32, align 4 3311 // CHECK21-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3312 // CHECK21-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3313 // CHECK21-NEXT: store i32 0, i32* [[I]], align 4 3314 // CHECK21-NEXT: br label [[FOR_COND:%.*]] 3315 // CHECK21: for.cond: 3316 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 3317 // CHECK21-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123 3318 // CHECK21-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3319 // CHECK21: for.body: 3320 // CHECK21-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3321 // CHECK21-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3322 // CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64 3323 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 3324 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3325 // CHECK21-NEXT: br label [[FOR_INC:%.*]] 3326 // CHECK21: for.inc: 3327 // CHECK21-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 3328 // CHECK21-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 3329 // CHECK21-NEXT: store i32 [[INC]], i32* [[I]], align 4 3330 // CHECK21-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3331 // CHECK21: for.end: 3332 // CHECK21-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3333 // CHECK21-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0 3334 // CHECK21-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4 3335 // CHECK21-NEXT: ret i32 [[TMP3]] 3336 // 3337 // 3338 // CHECK22-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3339 // CHECK22-SAME: () #[[ATTR0:[0-9]+]] { 3340 // CHECK22-NEXT: entry: 3341 // CHECK22-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3342 // CHECK22-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 3343 // CHECK22-NEXT: ret i32 [[CALL]] 3344 // 3345 // 3346 // CHECK22-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3347 // CHECK22-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3348 // CHECK22-NEXT: entry: 3349 // CHECK22-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3350 // CHECK22-NEXT: [[I:%.*]] = alloca i32, align 4 3351 // CHECK22-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3352 // CHECK22-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3353 // CHECK22-NEXT: store i32 0, i32* [[I]], align 4 3354 // CHECK22-NEXT: br label [[FOR_COND:%.*]] 3355 // CHECK22: for.cond: 3356 // CHECK22-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 3357 // CHECK22-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123 3358 // CHECK22-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3359 // CHECK22: for.body: 3360 // CHECK22-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3361 // CHECK22-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3362 // CHECK22-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64 3363 // CHECK22-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 3364 // CHECK22-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3365 // CHECK22-NEXT: br label [[FOR_INC:%.*]] 3366 // CHECK22: for.inc: 3367 // CHECK22-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 3368 // CHECK22-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 3369 // CHECK22-NEXT: store i32 [[INC]], i32* [[I]], align 4 3370 // CHECK22-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3371 // CHECK22: for.end: 3372 // CHECK22-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3373 // CHECK22-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0 3374 // CHECK22-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4 3375 // CHECK22-NEXT: ret i32 [[TMP3]] 3376 // 3377 // 3378 // CHECK23-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3379 // CHECK23-SAME: () #[[ATTR0:[0-9]+]] { 3380 // CHECK23-NEXT: entry: 3381 // CHECK23-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3382 // CHECK23-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 3383 // CHECK23-NEXT: ret i32 [[CALL]] 3384 // 3385 // 3386 // CHECK23-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3387 // CHECK23-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3388 // CHECK23-NEXT: entry: 3389 // CHECK23-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3390 // CHECK23-NEXT: [[I:%.*]] = alloca i32, align 4 3391 // CHECK23-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3392 // CHECK23-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3393 // CHECK23-NEXT: store i32 0, i32* [[I]], align 4 3394 // CHECK23-NEXT: br label [[FOR_COND:%.*]] 3395 // CHECK23: for.cond: 3396 // CHECK23-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 3397 // CHECK23-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123 3398 // CHECK23-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3399 // CHECK23: for.body: 3400 // CHECK23-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3401 // CHECK23-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3402 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP1]] 3403 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3404 // CHECK23-NEXT: br label [[FOR_INC:%.*]] 3405 // CHECK23: for.inc: 3406 // CHECK23-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 3407 // CHECK23-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 3408 // CHECK23-NEXT: store i32 [[INC]], i32* [[I]], align 4 3409 // CHECK23-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3410 // CHECK23: for.end: 3411 // CHECK23-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3412 // CHECK23-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0 3413 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4 3414 // CHECK23-NEXT: ret i32 [[TMP3]] 3415 // 3416 // 3417 // CHECK24-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3418 // CHECK24-SAME: () #[[ATTR0:[0-9]+]] { 3419 // CHECK24-NEXT: entry: 3420 // CHECK24-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3421 // CHECK24-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 3422 // CHECK24-NEXT: ret i32 [[CALL]] 3423 // 3424 // 3425 // CHECK24-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3426 // CHECK24-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3427 // CHECK24-NEXT: entry: 3428 // CHECK24-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3429 // CHECK24-NEXT: [[I:%.*]] = alloca i32, align 4 3430 // CHECK24-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3431 // CHECK24-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3432 // CHECK24-NEXT: store i32 0, i32* [[I]], align 4 3433 // CHECK24-NEXT: br label [[FOR_COND:%.*]] 3434 // CHECK24: for.cond: 3435 // CHECK24-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 3436 // CHECK24-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123 3437 // CHECK24-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3438 // CHECK24: for.body: 3439 // CHECK24-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3440 // CHECK24-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3441 // CHECK24-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP1]] 3442 // CHECK24-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3443 // CHECK24-NEXT: br label [[FOR_INC:%.*]] 3444 // CHECK24: for.inc: 3445 // CHECK24-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 3446 // CHECK24-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 3447 // CHECK24-NEXT: store i32 [[INC]], i32* [[I]], align 4 3448 // CHECK24-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3449 // CHECK24: for.end: 3450 // CHECK24-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3451 // CHECK24-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0 3452 // CHECK24-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4 3453 // CHECK24-NEXT: ret i32 [[TMP3]] 3454 // 3455 // 3456 // CHECK25-LABEL: define {{[^@]+}}@main 3457 // CHECK25-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3458 // CHECK25-NEXT: entry: 3459 // CHECK25-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3460 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3461 // CHECK25-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3462 // CHECK25-NEXT: [[N:%.*]] = alloca i32, align 4 3463 // CHECK25-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3464 // CHECK25-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3465 // CHECK25-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 3466 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 3467 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 3468 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 3469 // CHECK25-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 3470 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3471 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3472 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3473 // CHECK25-NEXT: store i32 0, i32* [[RETVAL]], align 4 3474 // CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3475 // CHECK25-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3476 // CHECK25-NEXT: store i32 100, i32* [[N]], align 4 3477 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3478 // CHECK25-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3479 // CHECK25-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3480 // CHECK25-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 3481 // CHECK25-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3482 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3483 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 3484 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 3485 // CHECK25-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 3486 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 3487 // CHECK25-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 3488 // CHECK25-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3489 // CHECK25-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 3490 // CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 3491 // CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3492 // CHECK25-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 3493 // CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 3494 // CHECK25-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3495 // CHECK25-NEXT: store i64 4, i64* [[TMP10]], align 8 3496 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3497 // CHECK25-NEXT: store i8* null, i8** [[TMP11]], align 8 3498 // CHECK25-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3499 // CHECK25-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 3500 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 3501 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3502 // CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 3503 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 3504 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 3505 // CHECK25-NEXT: store i64 8, i64* [[TMP16]], align 8 3506 // CHECK25-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3507 // CHECK25-NEXT: store i8* null, i8** [[TMP17]], align 8 3508 // CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3509 // CHECK25-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 3510 // CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 3511 // CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3512 // CHECK25-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 3513 // CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 3514 // CHECK25-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3515 // CHECK25-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 3516 // CHECK25-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3517 // CHECK25-NEXT: store i8* null, i8** [[TMP23]], align 8 3518 // CHECK25-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3519 // CHECK25-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3520 // CHECK25-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3521 // CHECK25-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 3522 // CHECK25-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 3523 // CHECK25-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3524 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 3525 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3526 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3527 // CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3528 // CHECK25-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3529 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 3530 // CHECK25-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 3531 // CHECK25-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]]) 3532 // CHECK25-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3533 // CHECK25-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 3534 // CHECK25-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3535 // CHECK25: omp_offload.failed: 3536 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 3537 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]] 3538 // CHECK25: omp_offload.cont: 3539 // CHECK25-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3540 // CHECK25-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP33]]) 3541 // CHECK25-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3542 // CHECK25-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3543 // CHECK25-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 3544 // CHECK25-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4 3545 // CHECK25-NEXT: ret i32 [[TMP35]] 3546 // 3547 // 3548 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162 3549 // CHECK25-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 3550 // CHECK25-NEXT: entry: 3551 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3552 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3553 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3554 // CHECK25-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3555 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3556 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3557 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3558 // CHECK25-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3559 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3560 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 3561 // CHECK25-NEXT: ret void 3562 // 3563 // 3564 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined. 3565 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3566 // CHECK25-NEXT: entry: 3567 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3568 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3569 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3570 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3571 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3572 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3573 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3574 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3575 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3576 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 3577 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3578 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3579 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3580 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3581 // CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 4 3582 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3583 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3584 // CHECK25-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3585 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3586 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3587 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3588 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3589 // CHECK25-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3590 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3591 // CHECK25-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3592 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3593 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3594 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3595 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3596 // CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3597 // CHECK25-NEXT: store i32 0, i32* [[I]], align 4 3598 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3599 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3600 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3601 // CHECK25: omp.precond.then: 3602 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3603 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3604 // CHECK25-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 3605 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3606 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3607 // CHECK25-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3608 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3609 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3610 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3611 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3612 // CHECK25-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 3613 // CHECK25-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3614 // CHECK25: cond.true: 3615 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3616 // CHECK25-NEXT: br label [[COND_END:%.*]] 3617 // CHECK25: cond.false: 3618 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3619 // CHECK25-NEXT: br label [[COND_END]] 3620 // CHECK25: cond.end: 3621 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 3622 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3623 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3624 // CHECK25-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 3625 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3626 // CHECK25: omp.inner.for.cond: 3627 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3628 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3629 // CHECK25-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3630 // CHECK25-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3631 // CHECK25: omp.inner.for.body: 3632 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3633 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 3634 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3635 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3636 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 3637 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 3638 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 3639 // CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3640 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3641 // CHECK25: omp.body.continue: 3642 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3643 // CHECK25: omp.inner.for.inc: 3644 // CHECK25-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3645 // CHECK25-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 3646 // CHECK25-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 3647 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 3648 // CHECK25: omp.inner.for.end: 3649 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3650 // CHECK25: omp.loop.exit: 3651 // CHECK25-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3652 // CHECK25-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3653 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 3654 // CHECK25-NEXT: br label [[OMP_PRECOND_END]] 3655 // CHECK25: omp.precond.end: 3656 // CHECK25-NEXT: ret void 3657 // 3658 // 3659 // CHECK25-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3660 // CHECK25-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 3661 // CHECK25-NEXT: entry: 3662 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3663 // CHECK25-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3664 // CHECK25-NEXT: [[TE:%.*]] = alloca i32, align 4 3665 // CHECK25-NEXT: [[TH:%.*]] = alloca i32, align 4 3666 // CHECK25-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 3667 // CHECK25-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 3668 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 3669 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 3670 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 3671 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3672 // CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3673 // CHECK25-NEXT: store i32 0, i32* [[TE]], align 4 3674 // CHECK25-NEXT: store i32 128, i32* [[TH]], align 4 3675 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 3676 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 3677 // CHECK25-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 3678 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8 3679 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 3680 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 3681 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 3682 // CHECK25-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8 3683 // CHECK25-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3684 // CHECK25-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 3685 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 3686 // CHECK25-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3687 // CHECK25-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 3688 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 3689 // CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3690 // CHECK25-NEXT: store i8* null, i8** [[TMP8]], align 8 3691 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3692 // CHECK25-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 3693 // CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 3694 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3695 // CHECK25-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 3696 // CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 3697 // CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3698 // CHECK25-NEXT: store i8* null, i8** [[TMP13]], align 8 3699 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3700 // CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 3701 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8 3702 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3703 // CHECK25-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 3704 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8 3705 // CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3706 // CHECK25-NEXT: store i8* null, i8** [[TMP18]], align 8 3707 // CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3708 // CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3709 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 3710 // CHECK25-NEXT: [[TMP22:%.*]] = load i32, i32* [[TH]], align 4 3711 // CHECK25-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3712 // CHECK25-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 [[TMP22]]) 3713 // CHECK25-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3714 // CHECK25-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3715 // CHECK25: omp_offload.failed: 3716 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]] 3717 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]] 3718 // CHECK25: omp_offload.cont: 3719 // CHECK25-NEXT: ret i32 0 3720 // 3721 // 3722 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151 3723 // CHECK25-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3724 // CHECK25-NEXT: entry: 3725 // CHECK25-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 3726 // CHECK25-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 3727 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3728 // CHECK25-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 3729 // CHECK25-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 3730 // CHECK25-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 3731 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3732 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 3733 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 3734 // CHECK25-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3735 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 3736 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8 3737 // CHECK25-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 3738 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 3739 // CHECK25-NEXT: ret void 3740 // 3741 // 3742 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..1 3743 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3744 // CHECK25-NEXT: entry: 3745 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3746 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3747 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3748 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3749 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3750 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3751 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3752 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3753 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3754 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 3755 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3756 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3757 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3758 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3759 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3760 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3761 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3762 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3763 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3764 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3765 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3766 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3767 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3768 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3769 // CHECK25: cond.true: 3770 // CHECK25-NEXT: br label [[COND_END:%.*]] 3771 // CHECK25: cond.false: 3772 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3773 // CHECK25-NEXT: br label [[COND_END]] 3774 // CHECK25: cond.end: 3775 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3776 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3777 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3778 // CHECK25-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3779 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3780 // CHECK25: omp.inner.for.cond: 3781 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3782 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3783 // CHECK25-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3784 // CHECK25-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3785 // CHECK25: omp.inner.for.body: 3786 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3787 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3788 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3789 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3790 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3791 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 3792 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3793 // CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3794 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3795 // CHECK25: omp.body.continue: 3796 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3797 // CHECK25: omp.inner.for.inc: 3798 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3799 // CHECK25-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3800 // CHECK25-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3801 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 3802 // CHECK25: omp.inner.for.end: 3803 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3804 // CHECK25: omp.loop.exit: 3805 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3806 // CHECK25-NEXT: ret void 3807 // 3808 // 3809 // CHECK25-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3810 // CHECK25-SAME: () #[[ATTR5:[0-9]+]] { 3811 // CHECK25-NEXT: entry: 3812 // CHECK25-NEXT: call void @__tgt_register_requires(i64 1) 3813 // CHECK25-NEXT: ret void 3814 // 3815 // 3816 // CHECK26-LABEL: define {{[^@]+}}@main 3817 // CHECK26-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3818 // CHECK26-NEXT: entry: 3819 // CHECK26-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3820 // CHECK26-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3821 // CHECK26-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3822 // CHECK26-NEXT: [[N:%.*]] = alloca i32, align 4 3823 // CHECK26-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3824 // CHECK26-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3825 // CHECK26-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 3826 // CHECK26-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 3827 // CHECK26-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 3828 // CHECK26-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 3829 // CHECK26-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 3830 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 3831 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3832 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3833 // CHECK26-NEXT: store i32 0, i32* [[RETVAL]], align 4 3834 // CHECK26-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3835 // CHECK26-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3836 // CHECK26-NEXT: store i32 100, i32* [[N]], align 4 3837 // CHECK26-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3838 // CHECK26-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3839 // CHECK26-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3840 // CHECK26-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 3841 // CHECK26-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3842 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3843 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 3844 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 3845 // CHECK26-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 3846 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 3847 // CHECK26-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 3848 // CHECK26-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3849 // CHECK26-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 3850 // CHECK26-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 3851 // CHECK26-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3852 // CHECK26-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 3853 // CHECK26-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 3854 // CHECK26-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3855 // CHECK26-NEXT: store i64 4, i64* [[TMP10]], align 8 3856 // CHECK26-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3857 // CHECK26-NEXT: store i8* null, i8** [[TMP11]], align 8 3858 // CHECK26-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3859 // CHECK26-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 3860 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 3861 // CHECK26-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3862 // CHECK26-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 3863 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 3864 // CHECK26-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 3865 // CHECK26-NEXT: store i64 8, i64* [[TMP16]], align 8 3866 // CHECK26-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3867 // CHECK26-NEXT: store i8* null, i8** [[TMP17]], align 8 3868 // CHECK26-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3869 // CHECK26-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 3870 // CHECK26-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 3871 // CHECK26-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3872 // CHECK26-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 3873 // CHECK26-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 3874 // CHECK26-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3875 // CHECK26-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 3876 // CHECK26-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3877 // CHECK26-NEXT: store i8* null, i8** [[TMP23]], align 8 3878 // CHECK26-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3879 // CHECK26-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3880 // CHECK26-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3881 // CHECK26-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 3882 // CHECK26-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 3883 // CHECK26-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3884 // CHECK26-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 3885 // CHECK26-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3886 // CHECK26-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3887 // CHECK26-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3888 // CHECK26-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3889 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 3890 // CHECK26-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 3891 // CHECK26-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]]) 3892 // CHECK26-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3893 // CHECK26-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 3894 // CHECK26-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3895 // CHECK26: omp_offload.failed: 3896 // CHECK26-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 3897 // CHECK26-NEXT: br label [[OMP_OFFLOAD_CONT]] 3898 // CHECK26: omp_offload.cont: 3899 // CHECK26-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3900 // CHECK26-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP33]]) 3901 // CHECK26-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3902 // CHECK26-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3903 // CHECK26-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 3904 // CHECK26-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4 3905 // CHECK26-NEXT: ret i32 [[TMP35]] 3906 // 3907 // 3908 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162 3909 // CHECK26-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 3910 // CHECK26-NEXT: entry: 3911 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3912 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3913 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3914 // CHECK26-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3915 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3916 // CHECK26-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3917 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3918 // CHECK26-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3919 // CHECK26-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3920 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 3921 // CHECK26-NEXT: ret void 3922 // 3923 // 3924 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined. 3925 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3926 // CHECK26-NEXT: entry: 3927 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3928 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3929 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3930 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3931 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3932 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3933 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 3934 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3935 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3936 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 3937 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3938 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3939 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3940 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3941 // CHECK26-NEXT: [[I3:%.*]] = alloca i32, align 4 3942 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3943 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3944 // CHECK26-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3945 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3946 // CHECK26-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3947 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3948 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3949 // CHECK26-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3950 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3951 // CHECK26-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3952 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3953 // CHECK26-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3954 // CHECK26-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3955 // CHECK26-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3956 // CHECK26-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3957 // CHECK26-NEXT: store i32 0, i32* [[I]], align 4 3958 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3959 // CHECK26-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3960 // CHECK26-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3961 // CHECK26: omp.precond.then: 3962 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3963 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3964 // CHECK26-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 3965 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3966 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3967 // CHECK26-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3968 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3969 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3970 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3971 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3972 // CHECK26-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 3973 // CHECK26-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3974 // CHECK26: cond.true: 3975 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3976 // CHECK26-NEXT: br label [[COND_END:%.*]] 3977 // CHECK26: cond.false: 3978 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3979 // CHECK26-NEXT: br label [[COND_END]] 3980 // CHECK26: cond.end: 3981 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 3982 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3983 // CHECK26-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3984 // CHECK26-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 3985 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3986 // CHECK26: omp.inner.for.cond: 3987 // CHECK26-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3988 // CHECK26-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3989 // CHECK26-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3990 // CHECK26-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3991 // CHECK26: omp.inner.for.body: 3992 // CHECK26-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3993 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 3994 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3995 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3996 // CHECK26-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 3997 // CHECK26-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 3998 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 3999 // CHECK26-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4000 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4001 // CHECK26: omp.body.continue: 4002 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4003 // CHECK26: omp.inner.for.inc: 4004 // CHECK26-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4005 // CHECK26-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 4006 // CHECK26-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 4007 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 4008 // CHECK26: omp.inner.for.end: 4009 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4010 // CHECK26: omp.loop.exit: 4011 // CHECK26-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4012 // CHECK26-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 4013 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 4014 // CHECK26-NEXT: br label [[OMP_PRECOND_END]] 4015 // CHECK26: omp.precond.end: 4016 // CHECK26-NEXT: ret void 4017 // 4018 // 4019 // CHECK26-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4020 // CHECK26-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 4021 // CHECK26-NEXT: entry: 4022 // CHECK26-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4023 // CHECK26-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4024 // CHECK26-NEXT: [[TE:%.*]] = alloca i32, align 4 4025 // CHECK26-NEXT: [[TH:%.*]] = alloca i32, align 4 4026 // CHECK26-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 4027 // CHECK26-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 4028 // CHECK26-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 4029 // CHECK26-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 4030 // CHECK26-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 4031 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 4032 // CHECK26-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4033 // CHECK26-NEXT: store i32 0, i32* [[TE]], align 4 4034 // CHECK26-NEXT: store i32 128, i32* [[TH]], align 4 4035 // CHECK26-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 4036 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 4037 // CHECK26-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 4038 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8 4039 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 4040 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 4041 // CHECK26-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 4042 // CHECK26-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8 4043 // CHECK26-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4044 // CHECK26-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 4045 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 4046 // CHECK26-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4047 // CHECK26-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 4048 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 4049 // CHECK26-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 4050 // CHECK26-NEXT: store i8* null, i8** [[TMP8]], align 8 4051 // CHECK26-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4052 // CHECK26-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 4053 // CHECK26-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 4054 // CHECK26-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4055 // CHECK26-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 4056 // CHECK26-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 4057 // CHECK26-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 4058 // CHECK26-NEXT: store i8* null, i8** [[TMP13]], align 8 4059 // CHECK26-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4060 // CHECK26-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 4061 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8 4062 // CHECK26-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4063 // CHECK26-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 4064 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8 4065 // CHECK26-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 4066 // CHECK26-NEXT: store i8* null, i8** [[TMP18]], align 8 4067 // CHECK26-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4068 // CHECK26-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4069 // CHECK26-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 4070 // CHECK26-NEXT: [[TMP22:%.*]] = load i32, i32* [[TH]], align 4 4071 // CHECK26-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4072 // CHECK26-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 [[TMP22]]) 4073 // CHECK26-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 4074 // CHECK26-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4075 // CHECK26: omp_offload.failed: 4076 // CHECK26-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]] 4077 // CHECK26-NEXT: br label [[OMP_OFFLOAD_CONT]] 4078 // CHECK26: omp_offload.cont: 4079 // CHECK26-NEXT: ret i32 0 4080 // 4081 // 4082 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151 4083 // CHECK26-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4084 // CHECK26-NEXT: entry: 4085 // CHECK26-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 4086 // CHECK26-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 4087 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 4088 // CHECK26-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 4089 // CHECK26-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 4090 // CHECK26-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 4091 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 4092 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 4093 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 4094 // CHECK26-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 4095 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 4096 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8 4097 // CHECK26-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 4098 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 4099 // CHECK26-NEXT: ret void 4100 // 4101 // 4102 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..1 4103 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4104 // CHECK26-NEXT: entry: 4105 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4106 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4107 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 4108 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4109 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 4110 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4111 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4112 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4113 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4114 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 4115 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4116 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4117 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 4118 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 4119 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4120 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4121 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4122 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4123 // CHECK26-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4124 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4125 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4126 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4127 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4128 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4129 // CHECK26: cond.true: 4130 // CHECK26-NEXT: br label [[COND_END:%.*]] 4131 // CHECK26: cond.false: 4132 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4133 // CHECK26-NEXT: br label [[COND_END]] 4134 // CHECK26: cond.end: 4135 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4136 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4137 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4138 // CHECK26-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4139 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4140 // CHECK26: omp.inner.for.cond: 4141 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4142 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4143 // CHECK26-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4144 // CHECK26-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4145 // CHECK26: omp.inner.for.body: 4146 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4147 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4148 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4149 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4150 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4151 // CHECK26-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 4152 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 4153 // CHECK26-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4154 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4155 // CHECK26: omp.body.continue: 4156 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4157 // CHECK26: omp.inner.for.inc: 4158 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4159 // CHECK26-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 4160 // CHECK26-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4161 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 4162 // CHECK26: omp.inner.for.end: 4163 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4164 // CHECK26: omp.loop.exit: 4165 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4166 // CHECK26-NEXT: ret void 4167 // 4168 // 4169 // CHECK26-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4170 // CHECK26-SAME: () #[[ATTR5:[0-9]+]] { 4171 // CHECK26-NEXT: entry: 4172 // CHECK26-NEXT: call void @__tgt_register_requires(i64 1) 4173 // CHECK26-NEXT: ret void 4174 // 4175 // 4176 // CHECK27-LABEL: define {{[^@]+}}@main 4177 // CHECK27-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4178 // CHECK27-NEXT: entry: 4179 // CHECK27-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4180 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4181 // CHECK27-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 4182 // CHECK27-NEXT: [[N:%.*]] = alloca i32, align 4 4183 // CHECK27-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 4184 // CHECK27-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 4185 // CHECK27-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 4186 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 4187 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 4188 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 4189 // CHECK27-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 4190 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4191 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4192 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4193 // CHECK27-NEXT: store i32 0, i32* [[RETVAL]], align 4 4194 // CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4195 // CHECK27-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 4196 // CHECK27-NEXT: store i32 100, i32* [[N]], align 4 4197 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4198 // CHECK27-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 4199 // CHECK27-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 4200 // CHECK27-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 4201 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 4202 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 4203 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 4204 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 4205 // CHECK27-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 4206 // CHECK27-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 4207 // CHECK27-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4208 // CHECK27-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 4209 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4 4210 // CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4211 // CHECK27-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32* 4212 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4 4213 // CHECK27-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4214 // CHECK27-NEXT: store i64 4, i64* [[TMP10]], align 4 4215 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4216 // CHECK27-NEXT: store i8* null, i8** [[TMP11]], align 4 4217 // CHECK27-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4218 // CHECK27-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 4219 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 4220 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4221 // CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 4222 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 4223 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 4224 // CHECK27-NEXT: store i64 4, i64* [[TMP16]], align 4 4225 // CHECK27-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4226 // CHECK27-NEXT: store i8* null, i8** [[TMP17]], align 4 4227 // CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4228 // CHECK27-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 4229 // CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4 4230 // CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4231 // CHECK27-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 4232 // CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4 4233 // CHECK27-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 4234 // CHECK27-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4 4235 // CHECK27-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4236 // CHECK27-NEXT: store i8* null, i8** [[TMP23]], align 4 4237 // CHECK27-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4238 // CHECK27-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4239 // CHECK27-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4240 // CHECK27-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 4241 // CHECK27-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 4242 // CHECK27-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4243 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 4244 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4245 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4246 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4247 // CHECK27-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4248 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 4249 // CHECK27-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 4250 // CHECK27-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]]) 4251 // CHECK27-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4252 // CHECK27-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 4253 // CHECK27-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4254 // CHECK27: omp_offload.failed: 4255 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 4256 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]] 4257 // CHECK27: omp_offload.cont: 4258 // CHECK27-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4259 // CHECK27-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP33]]) 4260 // CHECK27-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4261 // CHECK27-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4262 // CHECK27-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 4263 // CHECK27-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4 4264 // CHECK27-NEXT: ret i32 [[TMP35]] 4265 // 4266 // 4267 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162 4268 // CHECK27-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 4269 // CHECK27-NEXT: entry: 4270 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4271 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4272 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4273 // CHECK27-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4274 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4275 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4276 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4277 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4278 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 4279 // CHECK27-NEXT: ret void 4280 // 4281 // 4282 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined. 4283 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4284 // CHECK27-NEXT: entry: 4285 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4286 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4287 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4288 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4289 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4290 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4291 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4292 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4293 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4294 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 4295 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4296 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4297 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4298 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4299 // CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4 4300 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4301 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4302 // CHECK27-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4303 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4304 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4305 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4306 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4307 // CHECK27-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4308 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 4309 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 4310 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4311 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4312 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4313 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4314 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4315 // CHECK27-NEXT: store i32 0, i32* [[I]], align 4 4316 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4317 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4318 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4319 // CHECK27: omp.precond.then: 4320 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4321 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4322 // CHECK27-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 4323 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4324 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4325 // CHECK27-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4326 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 4327 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4328 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4329 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4330 // CHECK27-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 4331 // CHECK27-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4332 // CHECK27: cond.true: 4333 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4334 // CHECK27-NEXT: br label [[COND_END:%.*]] 4335 // CHECK27: cond.false: 4336 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4337 // CHECK27-NEXT: br label [[COND_END]] 4338 // CHECK27: cond.end: 4339 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 4340 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4341 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4342 // CHECK27-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 4343 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4344 // CHECK27: omp.inner.for.cond: 4345 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4346 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4347 // CHECK27-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 4348 // CHECK27-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4349 // CHECK27: omp.inner.for.body: 4350 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4351 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 4352 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4353 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 4354 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 4355 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 4356 // CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4357 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4358 // CHECK27: omp.body.continue: 4359 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4360 // CHECK27: omp.inner.for.inc: 4361 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4362 // CHECK27-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 4363 // CHECK27-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 4364 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 4365 // CHECK27: omp.inner.for.end: 4366 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4367 // CHECK27: omp.loop.exit: 4368 // CHECK27-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4369 // CHECK27-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 4370 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 4371 // CHECK27-NEXT: br label [[OMP_PRECOND_END]] 4372 // CHECK27: omp.precond.end: 4373 // CHECK27-NEXT: ret void 4374 // 4375 // 4376 // CHECK27-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4377 // CHECK27-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 4378 // CHECK27-NEXT: entry: 4379 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4380 // CHECK27-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4381 // CHECK27-NEXT: [[TE:%.*]] = alloca i32, align 4 4382 // CHECK27-NEXT: [[TH:%.*]] = alloca i32, align 4 4383 // CHECK27-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 4384 // CHECK27-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 4385 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 4386 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 4387 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 4388 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4389 // CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4390 // CHECK27-NEXT: store i32 0, i32* [[TE]], align 4 4391 // CHECK27-NEXT: store i32 128, i32* [[TH]], align 4 4392 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 4393 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4 4394 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4 4395 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 4396 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4 4397 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4 4398 // CHECK27-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4399 // CHECK27-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 4400 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 4401 // CHECK27-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4402 // CHECK27-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 4403 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 4404 // CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4405 // CHECK27-NEXT: store i8* null, i8** [[TMP8]], align 4 4406 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4407 // CHECK27-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4408 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4409 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4410 // CHECK27-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 4411 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 4412 // CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4413 // CHECK27-NEXT: store i8* null, i8** [[TMP13]], align 4 4414 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4415 // CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 4416 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4 4417 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4418 // CHECK27-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 4419 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4 4420 // CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4421 // CHECK27-NEXT: store i8* null, i8** [[TMP18]], align 4 4422 // CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4423 // CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4424 // CHECK27-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 4425 // CHECK27-NEXT: [[TMP22:%.*]] = load i32, i32* [[TH]], align 4 4426 // CHECK27-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4427 // CHECK27-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 [[TMP22]]) 4428 // CHECK27-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 4429 // CHECK27-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4430 // CHECK27: omp_offload.failed: 4431 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]] 4432 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]] 4433 // CHECK27: omp_offload.cont: 4434 // CHECK27-NEXT: ret i32 0 4435 // 4436 // 4437 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151 4438 // CHECK27-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4439 // CHECK27-NEXT: entry: 4440 // CHECK27-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 4441 // CHECK27-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 4442 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4443 // CHECK27-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 4444 // CHECK27-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 4445 // CHECK27-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 4446 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4447 // CHECK27-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4448 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 4449 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 4450 // CHECK27-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 4451 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 4452 // CHECK27-NEXT: ret void 4453 // 4454 // 4455 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..1 4456 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4457 // CHECK27-NEXT: entry: 4458 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4459 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4460 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4461 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4462 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4463 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4464 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4465 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4466 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4467 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 4468 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4469 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4470 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4471 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4472 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4473 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4474 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4475 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4476 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4477 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4478 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4479 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4480 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4481 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4482 // CHECK27: cond.true: 4483 // CHECK27-NEXT: br label [[COND_END:%.*]] 4484 // CHECK27: cond.false: 4485 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4486 // CHECK27-NEXT: br label [[COND_END]] 4487 // CHECK27: cond.end: 4488 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4489 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4490 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4491 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4492 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4493 // CHECK27: omp.inner.for.cond: 4494 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4495 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4496 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4497 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4498 // CHECK27: omp.inner.for.body: 4499 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4500 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4501 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4502 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4503 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4504 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 4505 // CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4506 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4507 // CHECK27: omp.body.continue: 4508 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4509 // CHECK27: omp.inner.for.inc: 4510 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4511 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 4512 // CHECK27-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4513 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 4514 // CHECK27: omp.inner.for.end: 4515 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4516 // CHECK27: omp.loop.exit: 4517 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4518 // CHECK27-NEXT: ret void 4519 // 4520 // 4521 // CHECK27-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4522 // CHECK27-SAME: () #[[ATTR5:[0-9]+]] { 4523 // CHECK27-NEXT: entry: 4524 // CHECK27-NEXT: call void @__tgt_register_requires(i64 1) 4525 // CHECK27-NEXT: ret void 4526 // 4527 // 4528 // CHECK28-LABEL: define {{[^@]+}}@main 4529 // CHECK28-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4530 // CHECK28-NEXT: entry: 4531 // CHECK28-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4532 // CHECK28-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4533 // CHECK28-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 4534 // CHECK28-NEXT: [[N:%.*]] = alloca i32, align 4 4535 // CHECK28-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 4536 // CHECK28-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 4537 // CHECK28-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 4538 // CHECK28-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 4539 // CHECK28-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 4540 // CHECK28-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 4541 // CHECK28-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 4542 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 4543 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4544 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4545 // CHECK28-NEXT: store i32 0, i32* [[RETVAL]], align 4 4546 // CHECK28-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4547 // CHECK28-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 4548 // CHECK28-NEXT: store i32 100, i32* [[N]], align 4 4549 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4550 // CHECK28-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 4551 // CHECK28-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 4552 // CHECK28-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 4553 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 4554 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 4555 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 4556 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 4557 // CHECK28-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 4558 // CHECK28-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 4559 // CHECK28-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4560 // CHECK28-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 4561 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4 4562 // CHECK28-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4563 // CHECK28-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32* 4564 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4 4565 // CHECK28-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4566 // CHECK28-NEXT: store i64 4, i64* [[TMP10]], align 4 4567 // CHECK28-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4568 // CHECK28-NEXT: store i8* null, i8** [[TMP11]], align 4 4569 // CHECK28-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4570 // CHECK28-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 4571 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 4572 // CHECK28-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4573 // CHECK28-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 4574 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 4575 // CHECK28-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 4576 // CHECK28-NEXT: store i64 4, i64* [[TMP16]], align 4 4577 // CHECK28-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4578 // CHECK28-NEXT: store i8* null, i8** [[TMP17]], align 4 4579 // CHECK28-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4580 // CHECK28-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 4581 // CHECK28-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4 4582 // CHECK28-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4583 // CHECK28-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 4584 // CHECK28-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4 4585 // CHECK28-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 4586 // CHECK28-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4 4587 // CHECK28-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4588 // CHECK28-NEXT: store i8* null, i8** [[TMP23]], align 4 4589 // CHECK28-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4590 // CHECK28-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4591 // CHECK28-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4592 // CHECK28-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 4593 // CHECK28-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 4594 // CHECK28-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4595 // CHECK28-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 4596 // CHECK28-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4597 // CHECK28-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4598 // CHECK28-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4599 // CHECK28-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4600 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 4601 // CHECK28-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 4602 // CHECK28-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]]) 4603 // CHECK28-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4604 // CHECK28-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 4605 // CHECK28-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4606 // CHECK28: omp_offload.failed: 4607 // CHECK28-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 4608 // CHECK28-NEXT: br label [[OMP_OFFLOAD_CONT]] 4609 // CHECK28: omp_offload.cont: 4610 // CHECK28-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4611 // CHECK28-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP33]]) 4612 // CHECK28-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4613 // CHECK28-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4614 // CHECK28-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 4615 // CHECK28-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4 4616 // CHECK28-NEXT: ret i32 [[TMP35]] 4617 // 4618 // 4619 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162 4620 // CHECK28-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 4621 // CHECK28-NEXT: entry: 4622 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4623 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4624 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4625 // CHECK28-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4626 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4627 // CHECK28-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4628 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4629 // CHECK28-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4630 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 4631 // CHECK28-NEXT: ret void 4632 // 4633 // 4634 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined. 4635 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4636 // CHECK28-NEXT: entry: 4637 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4638 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4639 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4640 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4641 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4642 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4643 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 4644 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4645 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4646 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 4647 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4648 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4649 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4650 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4651 // CHECK28-NEXT: [[I3:%.*]] = alloca i32, align 4 4652 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4653 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4654 // CHECK28-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4655 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4656 // CHECK28-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4657 // CHECK28-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4658 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4659 // CHECK28-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4660 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 4661 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 4662 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4663 // CHECK28-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4664 // CHECK28-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4665 // CHECK28-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4666 // CHECK28-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4667 // CHECK28-NEXT: store i32 0, i32* [[I]], align 4 4668 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4669 // CHECK28-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4670 // CHECK28-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4671 // CHECK28: omp.precond.then: 4672 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4673 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4674 // CHECK28-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 4675 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4676 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4677 // CHECK28-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4678 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 4679 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4680 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4681 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4682 // CHECK28-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 4683 // CHECK28-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4684 // CHECK28: cond.true: 4685 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4686 // CHECK28-NEXT: br label [[COND_END:%.*]] 4687 // CHECK28: cond.false: 4688 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4689 // CHECK28-NEXT: br label [[COND_END]] 4690 // CHECK28: cond.end: 4691 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 4692 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4693 // CHECK28-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4694 // CHECK28-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 4695 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4696 // CHECK28: omp.inner.for.cond: 4697 // CHECK28-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4698 // CHECK28-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4699 // CHECK28-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 4700 // CHECK28-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4701 // CHECK28: omp.inner.for.body: 4702 // CHECK28-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4703 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 4704 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4705 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 4706 // CHECK28-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 4707 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 4708 // CHECK28-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4709 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4710 // CHECK28: omp.body.continue: 4711 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4712 // CHECK28: omp.inner.for.inc: 4713 // CHECK28-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4714 // CHECK28-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 4715 // CHECK28-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 4716 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 4717 // CHECK28: omp.inner.for.end: 4718 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4719 // CHECK28: omp.loop.exit: 4720 // CHECK28-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4721 // CHECK28-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 4722 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 4723 // CHECK28-NEXT: br label [[OMP_PRECOND_END]] 4724 // CHECK28: omp.precond.end: 4725 // CHECK28-NEXT: ret void 4726 // 4727 // 4728 // CHECK28-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4729 // CHECK28-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 4730 // CHECK28-NEXT: entry: 4731 // CHECK28-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4732 // CHECK28-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4733 // CHECK28-NEXT: [[TE:%.*]] = alloca i32, align 4 4734 // CHECK28-NEXT: [[TH:%.*]] = alloca i32, align 4 4735 // CHECK28-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 4736 // CHECK28-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 4737 // CHECK28-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 4738 // CHECK28-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 4739 // CHECK28-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 4740 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 4741 // CHECK28-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4742 // CHECK28-NEXT: store i32 0, i32* [[TE]], align 4 4743 // CHECK28-NEXT: store i32 128, i32* [[TH]], align 4 4744 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 4745 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4 4746 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4 4747 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 4748 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4 4749 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4 4750 // CHECK28-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4751 // CHECK28-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 4752 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 4753 // CHECK28-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4754 // CHECK28-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 4755 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 4756 // CHECK28-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4757 // CHECK28-NEXT: store i8* null, i8** [[TMP8]], align 4 4758 // CHECK28-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4759 // CHECK28-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4760 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4761 // CHECK28-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4762 // CHECK28-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 4763 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 4764 // CHECK28-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4765 // CHECK28-NEXT: store i8* null, i8** [[TMP13]], align 4 4766 // CHECK28-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4767 // CHECK28-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 4768 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4 4769 // CHECK28-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4770 // CHECK28-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 4771 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4 4772 // CHECK28-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4773 // CHECK28-NEXT: store i8* null, i8** [[TMP18]], align 4 4774 // CHECK28-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4775 // CHECK28-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4776 // CHECK28-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 4777 // CHECK28-NEXT: [[TMP22:%.*]] = load i32, i32* [[TH]], align 4 4778 // CHECK28-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4779 // CHECK28-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 [[TMP22]]) 4780 // CHECK28-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 4781 // CHECK28-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4782 // CHECK28: omp_offload.failed: 4783 // CHECK28-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]] 4784 // CHECK28-NEXT: br label [[OMP_OFFLOAD_CONT]] 4785 // CHECK28: omp_offload.cont: 4786 // CHECK28-NEXT: ret i32 0 4787 // 4788 // 4789 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151 4790 // CHECK28-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4791 // CHECK28-NEXT: entry: 4792 // CHECK28-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 4793 // CHECK28-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 4794 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4795 // CHECK28-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 4796 // CHECK28-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 4797 // CHECK28-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 4798 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4799 // CHECK28-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4800 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 4801 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 4802 // CHECK28-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 4803 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 4804 // CHECK28-NEXT: ret void 4805 // 4806 // 4807 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..1 4808 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4809 // CHECK28-NEXT: entry: 4810 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4811 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4812 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4813 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4814 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 4815 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4816 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4817 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4818 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4819 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 4820 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4821 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4822 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4823 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4824 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4825 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4826 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4827 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4828 // CHECK28-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4829 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4830 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4831 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4832 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4833 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4834 // CHECK28: cond.true: 4835 // CHECK28-NEXT: br label [[COND_END:%.*]] 4836 // CHECK28: cond.false: 4837 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4838 // CHECK28-NEXT: br label [[COND_END]] 4839 // CHECK28: cond.end: 4840 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4841 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4842 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4843 // CHECK28-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4844 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4845 // CHECK28: omp.inner.for.cond: 4846 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4847 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4848 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4849 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4850 // CHECK28: omp.inner.for.body: 4851 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4852 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4853 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4854 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4855 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4856 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 4857 // CHECK28-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4858 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4859 // CHECK28: omp.body.continue: 4860 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4861 // CHECK28: omp.inner.for.inc: 4862 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4863 // CHECK28-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 4864 // CHECK28-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4865 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 4866 // CHECK28: omp.inner.for.end: 4867 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4868 // CHECK28: omp.loop.exit: 4869 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4870 // CHECK28-NEXT: ret void 4871 // 4872 // 4873 // CHECK28-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4874 // CHECK28-SAME: () #[[ATTR5:[0-9]+]] { 4875 // CHECK28-NEXT: entry: 4876 // CHECK28-NEXT: call void @__tgt_register_requires(i64 1) 4877 // CHECK28-NEXT: ret void 4878 // 4879 // 4880 // CHECK29-LABEL: define {{[^@]+}}@main 4881 // CHECK29-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4882 // CHECK29-NEXT: entry: 4883 // CHECK29-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4884 // CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4885 // CHECK29-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 4886 // CHECK29-NEXT: [[N:%.*]] = alloca i32, align 4 4887 // CHECK29-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 4888 // CHECK29-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 4889 // CHECK29-NEXT: [[I:%.*]] = alloca i32, align 4 4890 // CHECK29-NEXT: store i32 0, i32* [[RETVAL]], align 4 4891 // CHECK29-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4892 // CHECK29-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 4893 // CHECK29-NEXT: store i32 100, i32* [[N]], align 4 4894 // CHECK29-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4895 // CHECK29-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 4896 // CHECK29-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 4897 // CHECK29-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 4898 // CHECK29-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 4899 // CHECK29-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 4900 // CHECK29-NEXT: store i32 0, i32* [[I]], align 4 4901 // CHECK29-NEXT: br label [[FOR_COND:%.*]] 4902 // CHECK29: for.cond: 4903 // CHECK29-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 4904 // CHECK29-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 4905 // CHECK29-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[TMP4]] 4906 // CHECK29-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4907 // CHECK29: for.body: 4908 // CHECK29-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 4909 // CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 4910 // CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 4911 // CHECK29-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4912 // CHECK29-NEXT: br label [[FOR_INC:%.*]] 4913 // CHECK29: for.inc: 4914 // CHECK29-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 4915 // CHECK29-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 4916 // CHECK29-NEXT: store i32 [[INC]], i32* [[I]], align 4 4917 // CHECK29-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 4918 // CHECK29: for.end: 4919 // CHECK29-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4920 // CHECK29-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP7]]) 4921 // CHECK29-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4922 // CHECK29-NEXT: [[TMP8:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 4923 // CHECK29-NEXT: call void @llvm.stackrestore(i8* [[TMP8]]) 4924 // CHECK29-NEXT: [[TMP9:%.*]] = load i32, i32* [[RETVAL]], align 4 4925 // CHECK29-NEXT: ret i32 [[TMP9]] 4926 // 4927 // 4928 // CHECK29-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4929 // CHECK29-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 4930 // CHECK29-NEXT: entry: 4931 // CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4932 // CHECK29-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4933 // CHECK29-NEXT: [[TE:%.*]] = alloca i32, align 4 4934 // CHECK29-NEXT: [[TH:%.*]] = alloca i32, align 4 4935 // CHECK29-NEXT: [[I:%.*]] = alloca i32, align 4 4936 // CHECK29-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4937 // CHECK29-NEXT: store i32 0, i32* [[TE]], align 4 4938 // CHECK29-NEXT: store i32 128, i32* [[TH]], align 4 4939 // CHECK29-NEXT: store i32 0, i32* [[I]], align 4 4940 // CHECK29-NEXT: br label [[FOR_COND:%.*]] 4941 // CHECK29: for.cond: 4942 // CHECK29-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 4943 // CHECK29-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10 4944 // CHECK29-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4945 // CHECK29: for.body: 4946 // CHECK29-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 4947 // CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64 4948 // CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4949 // CHECK29-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4950 // CHECK29-NEXT: br label [[FOR_INC:%.*]] 4951 // CHECK29: for.inc: 4952 // CHECK29-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 4953 // CHECK29-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 4954 // CHECK29-NEXT: store i32 [[INC]], i32* [[I]], align 4 4955 // CHECK29-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 4956 // CHECK29: for.end: 4957 // CHECK29-NEXT: ret i32 0 4958 // 4959 // 4960 // CHECK30-LABEL: define {{[^@]+}}@main 4961 // CHECK30-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4962 // CHECK30-NEXT: entry: 4963 // CHECK30-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4964 // CHECK30-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4965 // CHECK30-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 4966 // CHECK30-NEXT: [[N:%.*]] = alloca i32, align 4 4967 // CHECK30-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 4968 // CHECK30-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 4969 // CHECK30-NEXT: [[I:%.*]] = alloca i32, align 4 4970 // CHECK30-NEXT: store i32 0, i32* [[RETVAL]], align 4 4971 // CHECK30-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4972 // CHECK30-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 4973 // CHECK30-NEXT: store i32 100, i32* [[N]], align 4 4974 // CHECK30-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4975 // CHECK30-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 4976 // CHECK30-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 4977 // CHECK30-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 4978 // CHECK30-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 4979 // CHECK30-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 4980 // CHECK30-NEXT: store i32 0, i32* [[I]], align 4 4981 // CHECK30-NEXT: br label [[FOR_COND:%.*]] 4982 // CHECK30: for.cond: 4983 // CHECK30-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 4984 // CHECK30-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 4985 // CHECK30-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[TMP4]] 4986 // CHECK30-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4987 // CHECK30: for.body: 4988 // CHECK30-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 4989 // CHECK30-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 4990 // CHECK30-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 4991 // CHECK30-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4992 // CHECK30-NEXT: br label [[FOR_INC:%.*]] 4993 // CHECK30: for.inc: 4994 // CHECK30-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 4995 // CHECK30-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 4996 // CHECK30-NEXT: store i32 [[INC]], i32* [[I]], align 4 4997 // CHECK30-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 4998 // CHECK30: for.end: 4999 // CHECK30-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 5000 // CHECK30-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP7]]) 5001 // CHECK30-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5002 // CHECK30-NEXT: [[TMP8:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 5003 // CHECK30-NEXT: call void @llvm.stackrestore(i8* [[TMP8]]) 5004 // CHECK30-NEXT: [[TMP9:%.*]] = load i32, i32* [[RETVAL]], align 4 5005 // CHECK30-NEXT: ret i32 [[TMP9]] 5006 // 5007 // 5008 // CHECK30-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 5009 // CHECK30-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 5010 // CHECK30-NEXT: entry: 5011 // CHECK30-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5012 // CHECK30-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 5013 // CHECK30-NEXT: [[TE:%.*]] = alloca i32, align 4 5014 // CHECK30-NEXT: [[TH:%.*]] = alloca i32, align 4 5015 // CHECK30-NEXT: [[I:%.*]] = alloca i32, align 4 5016 // CHECK30-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 5017 // CHECK30-NEXT: store i32 0, i32* [[TE]], align 4 5018 // CHECK30-NEXT: store i32 128, i32* [[TH]], align 4 5019 // CHECK30-NEXT: store i32 0, i32* [[I]], align 4 5020 // CHECK30-NEXT: br label [[FOR_COND:%.*]] 5021 // CHECK30: for.cond: 5022 // CHECK30-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5023 // CHECK30-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10 5024 // CHECK30-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5025 // CHECK30: for.body: 5026 // CHECK30-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5027 // CHECK30-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64 5028 // CHECK30-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 5029 // CHECK30-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5030 // CHECK30-NEXT: br label [[FOR_INC:%.*]] 5031 // CHECK30: for.inc: 5032 // CHECK30-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 5033 // CHECK30-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 5034 // CHECK30-NEXT: store i32 [[INC]], i32* [[I]], align 4 5035 // CHECK30-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 5036 // CHECK30: for.end: 5037 // CHECK30-NEXT: ret i32 0 5038 // 5039 // 5040 // CHECK31-LABEL: define {{[^@]+}}@main 5041 // CHECK31-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 5042 // CHECK31-NEXT: entry: 5043 // CHECK31-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5044 // CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5045 // CHECK31-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 5046 // CHECK31-NEXT: [[N:%.*]] = alloca i32, align 4 5047 // CHECK31-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 5048 // CHECK31-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 5049 // CHECK31-NEXT: [[I:%.*]] = alloca i32, align 4 5050 // CHECK31-NEXT: store i32 0, i32* [[RETVAL]], align 4 5051 // CHECK31-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 5052 // CHECK31-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 5053 // CHECK31-NEXT: store i32 100, i32* [[N]], align 4 5054 // CHECK31-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 5055 // CHECK31-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 5056 // CHECK31-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 5057 // CHECK31-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 5058 // CHECK31-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 5059 // CHECK31-NEXT: store i32 0, i32* [[I]], align 4 5060 // CHECK31-NEXT: br label [[FOR_COND:%.*]] 5061 // CHECK31: for.cond: 5062 // CHECK31-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 5063 // CHECK31-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 5064 // CHECK31-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[TMP3]] 5065 // CHECK31-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5066 // CHECK31: for.body: 5067 // CHECK31-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 5068 // CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP4]] 5069 // CHECK31-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5070 // CHECK31-NEXT: br label [[FOR_INC:%.*]] 5071 // CHECK31: for.inc: 5072 // CHECK31-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5073 // CHECK31-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1 5074 // CHECK31-NEXT: store i32 [[INC]], i32* [[I]], align 4 5075 // CHECK31-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 5076 // CHECK31: for.end: 5077 // CHECK31-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 5078 // CHECK31-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP6]]) 5079 // CHECK31-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5080 // CHECK31-NEXT: [[TMP7:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 5081 // CHECK31-NEXT: call void @llvm.stackrestore(i8* [[TMP7]]) 5082 // CHECK31-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 5083 // CHECK31-NEXT: ret i32 [[TMP8]] 5084 // 5085 // 5086 // CHECK31-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 5087 // CHECK31-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 5088 // CHECK31-NEXT: entry: 5089 // CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5090 // CHECK31-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 5091 // CHECK31-NEXT: [[TE:%.*]] = alloca i32, align 4 5092 // CHECK31-NEXT: [[TH:%.*]] = alloca i32, align 4 5093 // CHECK31-NEXT: [[I:%.*]] = alloca i32, align 4 5094 // CHECK31-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 5095 // CHECK31-NEXT: store i32 0, i32* [[TE]], align 4 5096 // CHECK31-NEXT: store i32 128, i32* [[TH]], align 4 5097 // CHECK31-NEXT: store i32 0, i32* [[I]], align 4 5098 // CHECK31-NEXT: br label [[FOR_COND:%.*]] 5099 // CHECK31: for.cond: 5100 // CHECK31-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5101 // CHECK31-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10 5102 // CHECK31-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5103 // CHECK31: for.body: 5104 // CHECK31-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5105 // CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP1]] 5106 // CHECK31-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5107 // CHECK31-NEXT: br label [[FOR_INC:%.*]] 5108 // CHECK31: for.inc: 5109 // CHECK31-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 5110 // CHECK31-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 5111 // CHECK31-NEXT: store i32 [[INC]], i32* [[I]], align 4 5112 // CHECK31-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 5113 // CHECK31: for.end: 5114 // CHECK31-NEXT: ret i32 0 5115 // 5116 // 5117 // CHECK32-LABEL: define {{[^@]+}}@main 5118 // CHECK32-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 5119 // CHECK32-NEXT: entry: 5120 // CHECK32-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5121 // CHECK32-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5122 // CHECK32-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 5123 // CHECK32-NEXT: [[N:%.*]] = alloca i32, align 4 5124 // CHECK32-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 5125 // CHECK32-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 5126 // CHECK32-NEXT: [[I:%.*]] = alloca i32, align 4 5127 // CHECK32-NEXT: store i32 0, i32* [[RETVAL]], align 4 5128 // CHECK32-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 5129 // CHECK32-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 5130 // CHECK32-NEXT: store i32 100, i32* [[N]], align 4 5131 // CHECK32-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 5132 // CHECK32-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 5133 // CHECK32-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 5134 // CHECK32-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 5135 // CHECK32-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 5136 // CHECK32-NEXT: store i32 0, i32* [[I]], align 4 5137 // CHECK32-NEXT: br label [[FOR_COND:%.*]] 5138 // CHECK32: for.cond: 5139 // CHECK32-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 5140 // CHECK32-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 5141 // CHECK32-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[TMP3]] 5142 // CHECK32-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5143 // CHECK32: for.body: 5144 // CHECK32-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 5145 // CHECK32-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP4]] 5146 // CHECK32-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5147 // CHECK32-NEXT: br label [[FOR_INC:%.*]] 5148 // CHECK32: for.inc: 5149 // CHECK32-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 5150 // CHECK32-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1 5151 // CHECK32-NEXT: store i32 [[INC]], i32* [[I]], align 4 5152 // CHECK32-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 5153 // CHECK32: for.end: 5154 // CHECK32-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 5155 // CHECK32-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP6]]) 5156 // CHECK32-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5157 // CHECK32-NEXT: [[TMP7:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 5158 // CHECK32-NEXT: call void @llvm.stackrestore(i8* [[TMP7]]) 5159 // CHECK32-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 5160 // CHECK32-NEXT: ret i32 [[TMP8]] 5161 // 5162 // 5163 // CHECK32-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 5164 // CHECK32-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 5165 // CHECK32-NEXT: entry: 5166 // CHECK32-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5167 // CHECK32-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 5168 // CHECK32-NEXT: [[TE:%.*]] = alloca i32, align 4 5169 // CHECK32-NEXT: [[TH:%.*]] = alloca i32, align 4 5170 // CHECK32-NEXT: [[I:%.*]] = alloca i32, align 4 5171 // CHECK32-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 5172 // CHECK32-NEXT: store i32 0, i32* [[TE]], align 4 5173 // CHECK32-NEXT: store i32 128, i32* [[TH]], align 4 5174 // CHECK32-NEXT: store i32 0, i32* [[I]], align 4 5175 // CHECK32-NEXT: br label [[FOR_COND:%.*]] 5176 // CHECK32: for.cond: 5177 // CHECK32-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5178 // CHECK32-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10 5179 // CHECK32-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5180 // CHECK32: for.body: 5181 // CHECK32-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5182 // CHECK32-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP1]] 5183 // CHECK32-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5184 // CHECK32-NEXT: br label [[FOR_INC:%.*]] 5185 // CHECK32: for.inc: 5186 // CHECK32-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 5187 // CHECK32-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 5188 // CHECK32-NEXT: store i32 [[INC]], i32* [[I]], align 4 5189 // CHECK32-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 5190 // CHECK32: for.end: 5191 // CHECK32-NEXT: ret i32 0 5192 // 5193