1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-pc-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 7 8 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-pc-linux-gnu -emit-pch -o %t %s 10 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 14 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 15 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-pc-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 17 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 18 // RUN: %clang_cc1 -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK12 19 20 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-pc-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 25 26 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -DARRAY -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 27 28 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -DARRAY -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 29 // expected-no-diagnostics 30 #ifndef ARRAY 31 #ifndef HEADER 32 #define HEADER 33 34 enum omp_allocator_handle_t { 35 omp_null_allocator = 0, 36 omp_default_mem_alloc = 1, 37 omp_large_cap_mem_alloc = 2, 38 omp_const_mem_alloc = 3, 39 omp_high_bw_mem_alloc = 4, 40 omp_low_lat_mem_alloc = 5, 41 omp_cgroup_mem_alloc = 6, 42 omp_pteam_mem_alloc = 7, 43 omp_thread_mem_alloc = 8, 44 KMP_ALLOCATOR_MAX_HANDLE = __UINTPTR_MAX__ 45 }; 46 47 struct St { 48 int a, b; 49 St() : a(0), b(0) {} 50 St(const St &st) : a(st.a + st.b), b(0) {} 51 ~St() {} 52 }; 53 54 volatile int g __attribute__((aligned(128))) = 1212; 55 56 struct SS { 57 int a; 58 int b : 4; 59 int &c; 60 int e[4]; 61 SS(int &d) : a(0), b(0), c(d) { 62 #pragma omp parallel firstprivate(a, b, c, e) 63 #ifdef LAMBDA 64 [&]() { 65 ++this->a, --b, (this)->c /= 1; 66 #pragma omp parallel firstprivate(a, b, c) 67 ++(this)->a, --b, this->c /= 1; 68 }(); 69 #elif defined(BLOCKS) 70 ^{ 71 ++a; 72 --this->b; 73 (this)->c /= 1; 74 #pragma omp parallel firstprivate(a, b, c) 75 ++(this)->a, --b, this->c /= 1; 76 }(); 77 #else 78 ++this->a, --b, c /= 1, e[2] = 1111; 79 #endif 80 } 81 }; 82 83 template<typename T> 84 struct SST { 85 T a; 86 SST() : a(T()) { 87 #pragma omp parallel firstprivate(a) 88 #ifdef LAMBDA 89 [&]() { 90 [&]() { 91 ++this->a; 92 #pragma omp parallel firstprivate(a) 93 ++(this)->a; 94 }(); 95 }(); 96 #elif defined(BLOCKS) 97 ^{ 98 ^{ 99 ++a; 100 #pragma omp parallel firstprivate(a) 101 ++(this)->a; 102 }(); 103 }(); 104 #else 105 ++(this)->a; 106 #endif 107 } 108 }; 109 110 template <class T> 111 struct S { 112 T f; 113 S(T a) : f(a + g) {} 114 S() : f(g) {} 115 S(const S &s, St t = St()) : f(s.f + t.a) {} 116 operator T() { return T(); } 117 ~S() {} 118 }; 119 120 121 template <typename T> 122 T tmain() { 123 S<T> test; 124 SST<T> sst; 125 T t_var __attribute__((aligned(128))) = T(); 126 T vec[] __attribute__((aligned(128))) = {1, 2}; 127 S<T> s_arr[] __attribute__((aligned(128))) = {1, 2}; 128 S<T> var __attribute__((aligned(128))) (3); 129 #pragma omp parallel firstprivate(t_var, vec, s_arr, var) 130 { 131 vec[0] = t_var; 132 s_arr[0] = var; 133 } 134 #pragma omp parallel firstprivate(t_var) 135 {} 136 return T(); 137 } 138 139 int main() { 140 static int sivar; 141 SS ss(sivar); 142 #ifdef LAMBDA 143 [&]() { 144 #pragma omp parallel firstprivate(g, sivar) 145 { 146 147 148 149 g = 1; 150 sivar = 2; 151 [&]() { 152 g = 2; 153 sivar = 4; 154 }(); 155 } 156 }(); 157 return 0; 158 #elif defined(BLOCKS) 159 ^{ 160 #pragma omp parallel firstprivate(g, sivar) 161 { 162 g = 1; 163 sivar = 2; 164 ^{ 165 g = 2; 166 sivar = 4; 167 }(); 168 } 169 }(); 170 return 0; 171 172 173 #else 174 S<float> test; 175 int t_var = 0; 176 int vec[] = {1, 2}; 177 S<float> s_arr[] = {1, 2}; 178 S<float> var(3); 179 #pragma omp parallel firstprivate(t_var, vec, s_arr, var, sivar) 180 { 181 vec[0] = t_var; 182 s_arr[0] = var; 183 sivar = 2; 184 } 185 const int a = 0; 186 #pragma omp parallel allocate(omp_default_mem_alloc: t_var) firstprivate(t_var, a) 187 { t_var = a; } 188 return tmain<int>(); 189 #endif 190 } 191 192 193 194 195 196 197 198 199 200 201 202 203 204 #endif 205 #else 206 207 enum omp_allocator_handle_t { 208 omp_null_allocator = 0, 209 omp_default_mem_alloc = 1, 210 omp_large_cap_mem_alloc = 2, 211 omp_const_mem_alloc = 3, 212 omp_high_bw_mem_alloc = 4, 213 omp_low_lat_mem_alloc = 5, 214 omp_cgroup_mem_alloc = 6, 215 omp_pteam_mem_alloc = 7, 216 omp_thread_mem_alloc = 8, 217 KMP_ALLOCATOR_MAX_HANDLE = __UINTPTR_MAX__ 218 }; 219 220 struct St { 221 int a, b; 222 St() : a(0), b(0) {} 223 St(const St &) { } 224 ~St() {} 225 void St_func(St s[2], int n, long double vla1[n]) { 226 double vla2[n][n] __attribute__((aligned(128))); 227 a = b; 228 #pragma omp parallel allocate(omp_thread_mem_alloc:vla2) firstprivate(s, vla1, vla2) 229 vla1[b] = vla2[1][n - 1] = a = b; 230 } 231 }; 232 233 void array_func(float a[3], St s[2], int n, long double vla1[n]) { 234 double vla2[n][n] __attribute__((aligned(128))); 235 #pragma omp parallel firstprivate(a, s, vla1, vla2) 236 s[0].St_func(s, n, vla1); 237 ; 238 } 239 240 #endif 241 242 243 // CHECK1-LABEL: define {{[^@]+}}@main 244 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 245 // CHECK1-NEXT: entry: 246 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 247 // CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 248 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 249 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 250 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 251 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 252 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 253 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 254 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 255 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_1:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 4 256 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 257 // CHECK1-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 4 dereferenceable(28) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 258 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 259 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4 260 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 261 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 262 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 263 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 264 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 265 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 266 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 267 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 268 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP1]], align 4 269 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 270 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR]], align 4 271 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[TMP2]], align 4 272 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 273 // CHECK1-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP4]], align 4 274 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 275 // CHECK1-NEXT: store %struct.S* [[VAR]], %struct.S** [[TMP5]], align 4 276 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 277 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 278 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[TMP6]], align 4 279 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 280 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 281 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 0 282 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4 283 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 4 284 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_1]]) 285 // CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 286 // CHECK1-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 287 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4:[0-9]+]] 288 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 289 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 290 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 291 // CHECK1: arraydestroy.body: 292 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP10]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 293 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 294 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 295 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 296 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 297 // CHECK1: arraydestroy.done2: 298 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 299 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 300 // CHECK1-NEXT: ret i32 [[TMP11]] 301 // 302 // 303 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 304 // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(28) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 305 // CHECK1-NEXT: entry: 306 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 307 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 308 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 309 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 310 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 311 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 312 // CHECK1-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 4 dereferenceable(28) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 313 // CHECK1-NEXT: ret void 314 // 315 // 316 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 317 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 318 // CHECK1-NEXT: entry: 319 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 320 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 321 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 322 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 323 // CHECK1-NEXT: ret void 324 // 325 // 326 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 327 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 328 // CHECK1-NEXT: entry: 329 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 330 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 331 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 332 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 333 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 334 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 335 // CHECK1-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 336 // CHECK1-NEXT: ret void 337 // 338 // 339 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 340 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { 341 // CHECK1-NEXT: entry: 342 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 343 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 344 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4 345 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 346 // CHECK1-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 347 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 348 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 349 // CHECK1-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 350 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 351 // CHECK1-NEXT: [[AGG_TMP2:%.*]] = alloca [[STRUCT_ST]], align 4 352 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 353 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 354 // CHECK1-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4 355 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4 356 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 357 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 4 358 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 1 359 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 360 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[T_VAR]], align 4 361 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 2 362 // CHECK1-NEXT: [[TMP6:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP5]], align 4 363 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 3 364 // CHECK1-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP7]], align 4 365 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 4 366 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 367 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[SIVAR]], align 4 368 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 369 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast [2 x i32]* [[TMP2]] to i8* 370 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 8, i1 false) 371 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 372 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast [2 x %struct.S]* [[TMP6]] to %struct.S* 373 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 374 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP14]] 375 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE1:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 376 // CHECK1: omp.arraycpy.body: 377 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 378 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 379 // CHECK1-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) 380 // CHECK1-NEXT: call void @_ZN1SIfEC1ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], %struct.St* [[AGG_TMP]]) 381 // CHECK1-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]] 382 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 383 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 384 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]] 385 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE1]], label [[OMP_ARRAYCPY_BODY]] 386 // CHECK1: omp.arraycpy.done1: 387 // CHECK1-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) 388 // CHECK1-NEXT: call void @_ZN1SIfEC1ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.St* [[AGG_TMP2]]) 389 // CHECK1-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) #[[ATTR4]] 390 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR]], align 4 391 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 0 392 // CHECK1-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4 393 // CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 394 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX3]] to i8* 395 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[VAR]] to i8* 396 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false) 397 // CHECK1-NEXT: store i32 2, i32* [[SIVAR]], align 4 398 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 399 // CHECK1-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 400 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i32 2 401 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 402 // CHECK1: arraydestroy.body: 403 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP18]], [[OMP_ARRAYCPY_DONE1]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 404 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 405 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 406 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 407 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 408 // CHECK1: arraydestroy.done5: 409 // CHECK1-NEXT: ret void 410 // 411 // 412 // CHECK1-LABEL: define {{[^@]+}}@_ZN2StC1Ev 413 // CHECK1-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 414 // CHECK1-NEXT: entry: 415 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 416 // CHECK1-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 417 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 418 // CHECK1-NEXT: call void @_ZN2StC2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) 419 // CHECK1-NEXT: ret void 420 // 421 // 422 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1ERKS0_2St 423 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 424 // CHECK1-NEXT: entry: 425 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 426 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca %struct.S*, align 4 427 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 428 // CHECK1-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 4 429 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 430 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 4 431 // CHECK1-NEXT: call void @_ZN1SIfEC2ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP0]], %struct.St* [[T]]) 432 // CHECK1-NEXT: ret void 433 // 434 // 435 // CHECK1-LABEL: define {{[^@]+}}@_ZN2StD1Ev 436 // CHECK1-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 437 // CHECK1-NEXT: entry: 438 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 439 // CHECK1-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 440 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 441 // CHECK1-NEXT: call void @_ZN2StD2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR4]] 442 // CHECK1-NEXT: ret void 443 // 444 // 445 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 446 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 447 // CHECK1-NEXT: entry: 448 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 449 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 450 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 451 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 452 // CHECK1-NEXT: ret void 453 // 454 // 455 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 456 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 457 // CHECK1-NEXT: entry: 458 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 459 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 460 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 4 461 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 462 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 463 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 464 // CHECK1-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 4 465 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 4 466 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 467 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 468 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[T_VAR]], align 4 469 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 470 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 471 // CHECK1-NEXT: [[DOTT_VAR__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP4]], i32 4, i8* inttoptr (i32 1 to i8*)) 472 // CHECK1-NEXT: [[DOTT_VAR__ADDR:%.*]] = bitcast i8* [[DOTT_VAR__VOID_ADDR]] to i32* 473 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR]], align 4 474 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTT_VAR__ADDR]], align 4 475 // CHECK1-NEXT: store i32 0, i32* [[DOTT_VAR__ADDR]], align 4 476 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTT_VAR__ADDR]] to i8* 477 // CHECK1-NEXT: call void @__kmpc_free(i32 [[TMP4]], i8* [[TMP6]], i8* inttoptr (i32 1 to i8*)) 478 // CHECK1-NEXT: ret void 479 // 480 // 481 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 482 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat { 483 // CHECK1-NEXT: entry: 484 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 485 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_2:%.*]], align 4 486 // CHECK1-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 487 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 488 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 489 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.2], align 128 490 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_2]], align 128 491 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 492 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_1:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 4 493 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[TEST]]) 494 // CHECK1-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 495 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 128 496 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 497 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 498 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 499 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 500 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAYINIT_BEGIN]], i32 1 501 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 502 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 503 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 504 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP1]], align 4 505 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 506 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 4 507 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 508 // CHECK1-NEXT: store [2 x %struct.S.2]* [[S_ARR]], [2 x %struct.S.2]** [[TMP3]], align 4 509 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 510 // CHECK1-NEXT: store %struct.S.2* [[VAR]], %struct.S.2** [[TMP4]], align 4 511 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 512 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 0 513 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[TMP5]], align 4 514 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_1]]) 515 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 516 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 517 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 518 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAY_BEGIN]], i32 2 519 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 520 // CHECK1: arraydestroy.body: 521 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.2* [ [[TMP6]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 522 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 523 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 524 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.2* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 525 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 526 // CHECK1: arraydestroy.done2: 527 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 528 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[RETVAL]], align 4 529 // CHECK1-NEXT: ret i32 [[TMP7]] 530 // 531 // 532 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 533 // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(28) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 534 // CHECK1-NEXT: entry: 535 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 536 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 537 // CHECK1-NEXT: [[A2:%.*]] = alloca i32*, align 4 538 // CHECK1-NEXT: [[B4:%.*]] = alloca i32, align 4 539 // CHECK1-NEXT: [[C7:%.*]] = alloca i32*, align 4 540 // CHECK1-NEXT: [[E:%.*]] = alloca [4 x i32]*, align 4 541 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 542 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 543 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 544 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 545 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 546 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 547 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 548 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 549 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 550 // CHECK1-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 551 // CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 552 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 553 // CHECK1-NEXT: store i32* [[TMP0]], i32** [[C]], align 4 554 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 555 // CHECK1-NEXT: store i32* [[A3]], i32** [[A2]], align 4 556 // CHECK1-NEXT: [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 557 // CHECK1-NEXT: [[BF_LOAD6:%.*]] = load i8, i8* [[B5]], align 4 558 // CHECK1-NEXT: [[BF_SHL:%.*]] = shl i8 [[BF_LOAD6]], 4 559 // CHECK1-NEXT: [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4 560 // CHECK1-NEXT: [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32 561 // CHECK1-NEXT: store i32 [[BF_CAST]], i32* [[B4]], align 4 562 // CHECK1-NEXT: [[C8:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 563 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C8]], align 4 564 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[C7]], align 4 565 // CHECK1-NEXT: [[E9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 566 // CHECK1-NEXT: store [4 x i32]* [[E9]], [4 x i32]** [[E]], align 4 567 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 568 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4 569 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 570 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A2]], align 4 571 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 572 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[TMP3]], align 4 573 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 574 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[B4]], align 4 575 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[TMP6]], align 4 576 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 577 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[C7]], align 4 578 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 579 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[TMP8]], align 4 580 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 581 // CHECK1-NEXT: [[TMP12:%.*]] = load [4 x i32]*, [4 x i32]** [[E]], align 4 582 // CHECK1-NEXT: store [4 x i32]* [[TMP12]], [4 x i32]** [[TMP11]], align 4 583 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 584 // CHECK1-NEXT: ret void 585 // 586 // 587 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 588 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 589 // CHECK1-NEXT: entry: 590 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 591 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 592 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 4 593 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 594 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 595 // CHECK1-NEXT: [[C:%.*]] = alloca i32, align 4 596 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 4 597 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32*, align 4 598 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca [4 x i32]*, align 4 599 // CHECK1-NEXT: [[E:%.*]] = alloca [4 x i32], align 4 600 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca [4 x i32]*, align 4 601 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 602 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 603 // CHECK1-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 4 604 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 4 605 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 606 // CHECK1-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 4 607 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 608 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 609 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 610 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 2 611 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 612 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[B]], align 4 613 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 3 614 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 615 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[C]], align 4 616 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 4 617 // CHECK1-NEXT: [[TMP10:%.*]] = load [4 x i32]*, [4 x i32]** [[TMP9]], align 4 618 // CHECK1-NEXT: store i32* [[A]], i32** [[TMP]], align 4 619 // CHECK1-NEXT: store i32* [[C]], i32** [[_TMP1]], align 4 620 // CHECK1-NEXT: store [4 x i32]* [[TMP10]], [4 x i32]** [[_TMP2]], align 4 621 // CHECK1-NEXT: [[TMP11:%.*]] = load [4 x i32]*, [4 x i32]** [[_TMP2]], align 4 622 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast [4 x i32]* [[E]] to i8* 623 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast [4 x i32]* [[TMP11]] to i8* 624 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 16, i1 false) 625 // CHECK1-NEXT: store [4 x i32]* [[E]], [4 x i32]** [[_TMP3]], align 4 626 // CHECK1-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP]], align 4 627 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 628 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1 629 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP14]], align 4 630 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[B]], align 4 631 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP16]], -1 632 // CHECK1-NEXT: store i32 [[DEC]], i32* [[B]], align 4 633 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[_TMP1]], align 4 634 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 635 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP18]], 1 636 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TMP17]], align 4 637 // CHECK1-NEXT: [[TMP19:%.*]] = load [4 x i32]*, [4 x i32]** [[_TMP3]], align 4 638 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[TMP19]], i32 0, i32 2 639 // CHECK1-NEXT: store i32 1111, i32* [[ARRAYIDX]], align 4 640 // CHECK1-NEXT: ret void 641 // 642 // 643 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 644 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 645 // CHECK1-NEXT: entry: 646 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 647 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 648 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 649 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 650 // CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 651 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 652 // CHECK1-NEXT: store float [[CONV]], float* [[F]], align 4 653 // CHECK1-NEXT: ret void 654 // 655 // 656 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 657 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 658 // CHECK1-NEXT: entry: 659 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 660 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 661 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 662 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 663 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 664 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 665 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 666 // CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 667 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 668 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 669 // CHECK1-NEXT: store float [[ADD]], float* [[F]], align 4 670 // CHECK1-NEXT: ret void 671 // 672 // 673 // CHECK1-LABEL: define {{[^@]+}}@_ZN2StC2Ev 674 // CHECK1-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 675 // CHECK1-NEXT: entry: 676 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 677 // CHECK1-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 678 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 679 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[THIS1]], i32 0, i32 0 680 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 681 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 1 682 // CHECK1-NEXT: store i32 0, i32* [[B]], align 4 683 // CHECK1-NEXT: ret void 684 // 685 // 686 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2ERKS0_2St 687 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 688 // CHECK1-NEXT: entry: 689 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 690 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca %struct.S*, align 4 691 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 692 // CHECK1-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 4 693 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 694 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 695 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 4 696 // CHECK1-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP0]], i32 0, i32 0 697 // CHECK1-NEXT: [[TMP1:%.*]] = load float, float* [[F2]], align 4 698 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[T]], i32 0, i32 0 699 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 700 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP2]] to float 701 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP1]], [[CONV]] 702 // CHECK1-NEXT: store float [[ADD]], float* [[F]], align 4 703 // CHECK1-NEXT: ret void 704 // 705 // 706 // CHECK1-LABEL: define {{[^@]+}}@_ZN2StD2Ev 707 // CHECK1-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 708 // CHECK1-NEXT: entry: 709 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 710 // CHECK1-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 711 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 712 // CHECK1-NEXT: ret void 713 // 714 // 715 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 716 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 717 // CHECK1-NEXT: entry: 718 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 719 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 720 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 721 // CHECK1-NEXT: ret void 722 // 723 // 724 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 725 // CHECK1-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 726 // CHECK1-NEXT: entry: 727 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 728 // CHECK1-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 729 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 730 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]]) 731 // CHECK1-NEXT: ret void 732 // 733 // 734 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 735 // CHECK1-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 736 // CHECK1-NEXT: entry: 737 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 738 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 739 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 740 // CHECK1-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 741 // CHECK1-NEXT: ret void 742 // 743 // 744 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 745 // CHECK1-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 746 // CHECK1-NEXT: entry: 747 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 748 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 749 // CHECK1-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 750 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 751 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 752 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 753 // CHECK1-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 754 // CHECK1-NEXT: ret void 755 // 756 // 757 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 758 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 759 // CHECK1-NEXT: entry: 760 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 761 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 762 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 4 763 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 764 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 765 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.2], align 128 766 // CHECK1-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 767 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_2:%.*]], align 128 768 // CHECK1-NEXT: [[AGG_TMP2:%.*]] = alloca [[STRUCT_ST]], align 4 769 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 770 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 771 // CHECK1-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 4 772 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 4 773 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 774 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 4 775 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 776 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 4 777 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 778 // CHECK1-NEXT: [[TMP6:%.*]] = load [2 x %struct.S.2]*, [2 x %struct.S.2]** [[TMP5]], align 4 779 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 780 // CHECK1-NEXT: [[TMP8:%.*]] = load %struct.S.2*, %struct.S.2** [[TMP7]], align 4 781 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP4]], align 128 782 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[T_VAR]], align 128 783 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 784 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast [2 x i32]* [[TMP2]] to i8* 785 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP10]], i8* align 128 [[TMP11]], i32 8, i1 false) 786 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 787 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast [2 x %struct.S.2]* [[TMP6]] to %struct.S.2* 788 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr [[STRUCT_S_2]], %struct.S.2* [[ARRAY_BEGIN]], i32 2 789 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.2* [[ARRAY_BEGIN]], [[TMP13]] 790 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE1:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 791 // CHECK1: omp.arraycpy.body: 792 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.2* [ [[TMP12]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 793 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.2* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 794 // CHECK1-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) 795 // CHECK1-NEXT: call void @_ZN1SIiEC1ERKS0_2St(%struct.S.2* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.2* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], %struct.St* [[AGG_TMP]]) 796 // CHECK1-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]] 797 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_2]], %struct.S.2* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 798 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_2]], %struct.S.2* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 799 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.2* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP13]] 800 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE1]], label [[OMP_ARRAYCPY_BODY]] 801 // CHECK1: omp.arraycpy.done1: 802 // CHECK1-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) 803 // CHECK1-NEXT: call void @_ZN1SIiEC1ERKS0_2St(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]], %struct.S.2* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.St* [[AGG_TMP2]]) 804 // CHECK1-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) #[[ATTR4]] 805 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR]], align 128 806 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 0 807 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 128 808 // CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 809 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast %struct.S.2* [[ARRAYIDX3]] to i8* 810 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast %struct.S.2* [[VAR]] to i8* 811 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP15]], i8* align 128 [[TMP16]], i32 4, i1 false) 812 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 813 // CHECK1-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 814 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAY_BEGIN4]], i32 2 815 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 816 // CHECK1: arraydestroy.body: 817 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.2* [ [[TMP17]], [[OMP_ARRAYCPY_DONE1]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 818 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 819 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 820 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.2* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 821 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 822 // CHECK1: arraydestroy.done5: 823 // CHECK1-NEXT: ret void 824 // 825 // 826 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_2St 827 // CHECK1-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.2* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 828 // CHECK1-NEXT: entry: 829 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 830 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca %struct.S.2*, align 4 831 // CHECK1-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 832 // CHECK1-NEXT: store %struct.S.2* [[S]], %struct.S.2** [[S_ADDR]], align 4 833 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 834 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.S.2*, %struct.S.2** [[S_ADDR]], align 4 835 // CHECK1-NEXT: call void @_ZN1SIiEC2ERKS0_2St(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]], %struct.S.2* nonnull align 4 dereferenceable(4) [[TMP0]], %struct.St* [[T]]) 836 // CHECK1-NEXT: ret void 837 // 838 // 839 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 840 // CHECK1-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 841 // CHECK1-NEXT: entry: 842 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 843 // CHECK1-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 844 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 845 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 846 // CHECK1-NEXT: ret void 847 // 848 // 849 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 850 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 851 // CHECK1-NEXT: entry: 852 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 853 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 854 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 4 855 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 856 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 857 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 858 // CHECK1-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 4 859 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 4 860 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 861 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 4 862 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 128 863 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[T_VAR]], align 128 864 // CHECK1-NEXT: ret void 865 // 866 // 867 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 868 // CHECK1-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 869 // CHECK1-NEXT: entry: 870 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 871 // CHECK1-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 872 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 873 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_2:%.*]], %struct.S.2* [[THIS1]], i32 0, i32 0 874 // CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 875 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 876 // CHECK1-NEXT: ret void 877 // 878 // 879 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 880 // CHECK1-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 881 // CHECK1-NEXT: entry: 882 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 883 // CHECK1-NEXT: [[A2:%.*]] = alloca i32*, align 4 884 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 4 885 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 886 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 887 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 888 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 889 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SST]], %struct.SST* [[THIS1]], i32 0, i32 0 890 // CHECK1-NEXT: store i32* [[A3]], i32** [[A2]], align 4 891 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 892 // CHECK1-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP0]], align 4 893 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 894 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A2]], align 4 895 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 896 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[TMP1]], align 4 897 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 898 // CHECK1-NEXT: ret void 899 // 900 // 901 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 902 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 903 // CHECK1-NEXT: entry: 904 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 905 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 906 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 4 907 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 908 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 4 909 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 910 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 911 // CHECK1-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 4 912 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 4 913 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 914 // CHECK1-NEXT: [[TMP2:%.*]] = load %struct.SST*, %struct.SST** [[TMP1]], align 4 915 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 916 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 917 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 918 // CHECK1-NEXT: store i32* [[A]], i32** [[TMP]], align 4 919 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP]], align 4 920 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 921 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 922 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP5]], align 4 923 // CHECK1-NEXT: ret void 924 // 925 // 926 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 927 // CHECK1-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 928 // CHECK1-NEXT: entry: 929 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 930 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 931 // CHECK1-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 932 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 933 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 934 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_2:%.*]], %struct.S.2* [[THIS1]], i32 0, i32 0 935 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 936 // CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 937 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 938 // CHECK1-NEXT: store i32 [[ADD]], i32* [[F]], align 4 939 // CHECK1-NEXT: ret void 940 // 941 // 942 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_2St 943 // CHECK1-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.2* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 944 // CHECK1-NEXT: entry: 945 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 946 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca %struct.S.2*, align 4 947 // CHECK1-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 948 // CHECK1-NEXT: store %struct.S.2* [[S]], %struct.S.2** [[S_ADDR]], align 4 949 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 950 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_2:%.*]], %struct.S.2* [[THIS1]], i32 0, i32 0 951 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.S.2*, %struct.S.2** [[S_ADDR]], align 4 952 // CHECK1-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[TMP0]], i32 0, i32 0 953 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[F2]], align 4 954 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[T]], i32 0, i32 0 955 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 956 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]] 957 // CHECK1-NEXT: store i32 [[ADD]], i32* [[F]], align 4 958 // CHECK1-NEXT: ret void 959 // 960 // 961 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 962 // CHECK1-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 963 // CHECK1-NEXT: entry: 964 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 965 // CHECK1-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 966 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 967 // CHECK1-NEXT: ret void 968 // 969 // 970 // CHECK2-LABEL: define {{[^@]+}}@main 971 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 972 // CHECK2-NEXT: entry: 973 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 974 // CHECK2-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 975 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 976 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 977 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 978 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 979 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 980 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 981 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 982 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_1:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 4 983 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 984 // CHECK2-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 4 dereferenceable(28) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 985 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 986 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 4 987 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 988 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 989 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 990 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 991 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 992 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 993 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 994 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 995 // CHECK2-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP1]], align 4 996 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 997 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR]], align 4 998 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[TMP2]], align 4 999 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 1000 // CHECK2-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP4]], align 4 1001 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 1002 // CHECK2-NEXT: store %struct.S* [[VAR]], %struct.S** [[TMP5]], align 4 1003 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 1004 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 1005 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[TMP6]], align 4 1006 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 1007 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 1008 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 0 1009 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4 1010 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 4 1011 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_1]]) 1012 // CHECK2-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 1013 // CHECK2-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1014 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4:[0-9]+]] 1015 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1016 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 1017 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1018 // CHECK2: arraydestroy.body: 1019 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP10]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1020 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1021 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1022 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1023 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1024 // CHECK2: arraydestroy.done2: 1025 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1026 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 1027 // CHECK2-NEXT: ret i32 [[TMP11]] 1028 // 1029 // 1030 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1031 // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(28) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1032 // CHECK2-NEXT: entry: 1033 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1034 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 1035 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1036 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 1037 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1038 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 1039 // CHECK2-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 4 dereferenceable(28) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1040 // CHECK2-NEXT: ret void 1041 // 1042 // 1043 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1044 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1045 // CHECK2-NEXT: entry: 1046 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1047 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1048 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1049 // CHECK2-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 1050 // CHECK2-NEXT: ret void 1051 // 1052 // 1053 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1054 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1055 // CHECK2-NEXT: entry: 1056 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1057 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1058 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1059 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1060 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1061 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1062 // CHECK2-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1063 // CHECK2-NEXT: ret void 1064 // 1065 // 1066 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 1067 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { 1068 // CHECK2-NEXT: entry: 1069 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1070 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1071 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4 1072 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1073 // CHECK2-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1074 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1075 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1076 // CHECK2-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 1077 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1078 // CHECK2-NEXT: [[AGG_TMP2:%.*]] = alloca [[STRUCT_ST]], align 4 1079 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1080 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1081 // CHECK2-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4 1082 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4 1083 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 1084 // CHECK2-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 4 1085 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 1 1086 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1087 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[T_VAR]], align 4 1088 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 2 1089 // CHECK2-NEXT: [[TMP6:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP5]], align 4 1090 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 3 1091 // CHECK2-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP7]], align 4 1092 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 4 1093 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1094 // CHECK2-NEXT: store i32 [[TMP10]], i32* [[SIVAR]], align 4 1095 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1096 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast [2 x i32]* [[TMP2]] to i8* 1097 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 8, i1 false) 1098 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1099 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast [2 x %struct.S]* [[TMP6]] to %struct.S* 1100 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 1101 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP14]] 1102 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE1:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1103 // CHECK2: omp.arraycpy.body: 1104 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1105 // CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1106 // CHECK2-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) 1107 // CHECK2-NEXT: call void @_ZN1SIfEC1ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], %struct.St* [[AGG_TMP]]) 1108 // CHECK2-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]] 1109 // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1110 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1111 // CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]] 1112 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE1]], label [[OMP_ARRAYCPY_BODY]] 1113 // CHECK2: omp.arraycpy.done1: 1114 // CHECK2-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) 1115 // CHECK2-NEXT: call void @_ZN1SIfEC1ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.St* [[AGG_TMP2]]) 1116 // CHECK2-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) #[[ATTR4]] 1117 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR]], align 4 1118 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 0 1119 // CHECK2-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4 1120 // CHECK2-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1121 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX3]] to i8* 1122 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[VAR]] to i8* 1123 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false) 1124 // CHECK2-NEXT: store i32 2, i32* [[SIVAR]], align 4 1125 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1126 // CHECK2-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1127 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i32 2 1128 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1129 // CHECK2: arraydestroy.body: 1130 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP18]], [[OMP_ARRAYCPY_DONE1]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1131 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1132 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1133 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 1134 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1135 // CHECK2: arraydestroy.done5: 1136 // CHECK2-NEXT: ret void 1137 // 1138 // 1139 // CHECK2-LABEL: define {{[^@]+}}@_ZN2StC1Ev 1140 // CHECK2-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1141 // CHECK2-NEXT: entry: 1142 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 1143 // CHECK2-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 1144 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 1145 // CHECK2-NEXT: call void @_ZN2StC2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) 1146 // CHECK2-NEXT: ret void 1147 // 1148 // 1149 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1ERKS0_2St 1150 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1151 // CHECK2-NEXT: entry: 1152 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1153 // CHECK2-NEXT: [[S_ADDR:%.*]] = alloca %struct.S*, align 4 1154 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1155 // CHECK2-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 4 1156 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1157 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 4 1158 // CHECK2-NEXT: call void @_ZN1SIfEC2ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP0]], %struct.St* [[T]]) 1159 // CHECK2-NEXT: ret void 1160 // 1161 // 1162 // CHECK2-LABEL: define {{[^@]+}}@_ZN2StD1Ev 1163 // CHECK2-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1164 // CHECK2-NEXT: entry: 1165 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 1166 // CHECK2-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 1167 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 1168 // CHECK2-NEXT: call void @_ZN2StD2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR4]] 1169 // CHECK2-NEXT: ret void 1170 // 1171 // 1172 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1173 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1174 // CHECK2-NEXT: entry: 1175 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1176 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1177 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1178 // CHECK2-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1179 // CHECK2-NEXT: ret void 1180 // 1181 // 1182 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 1183 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 1184 // CHECK2-NEXT: entry: 1185 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1186 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1187 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 4 1188 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1189 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1190 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1191 // CHECK2-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 4 1192 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 4 1193 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 1194 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1195 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[T_VAR]], align 4 1196 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1197 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1198 // CHECK2-NEXT: [[DOTT_VAR__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP4]], i32 4, i8* inttoptr (i32 1 to i8*)) 1199 // CHECK2-NEXT: [[DOTT_VAR__ADDR:%.*]] = bitcast i8* [[DOTT_VAR__VOID_ADDR]] to i32* 1200 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR]], align 4 1201 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTT_VAR__ADDR]], align 4 1202 // CHECK2-NEXT: store i32 0, i32* [[DOTT_VAR__ADDR]], align 4 1203 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTT_VAR__ADDR]] to i8* 1204 // CHECK2-NEXT: call void @__kmpc_free(i32 [[TMP4]], i8* [[TMP6]], i8* inttoptr (i32 1 to i8*)) 1205 // CHECK2-NEXT: ret void 1206 // 1207 // 1208 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1209 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] comdat { 1210 // CHECK2-NEXT: entry: 1211 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1212 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_2:%.*]], align 4 1213 // CHECK2-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 1214 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1215 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 1216 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.2], align 128 1217 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_2]], align 128 1218 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 1219 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_1:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 4 1220 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[TEST]]) 1221 // CHECK2-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 1222 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 128 1223 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1224 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 1225 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 1226 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 1227 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAYINIT_BEGIN]], i32 1 1228 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 1229 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 1230 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1231 // CHECK2-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP1]], align 4 1232 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1233 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 4 1234 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 1235 // CHECK2-NEXT: store [2 x %struct.S.2]* [[S_ARR]], [2 x %struct.S.2]** [[TMP3]], align 4 1236 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 1237 // CHECK2-NEXT: store %struct.S.2* [[VAR]], %struct.S.2** [[TMP4]], align 4 1238 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 1239 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 0 1240 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[TMP5]], align 4 1241 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_1]]) 1242 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 1243 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1244 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 1245 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAY_BEGIN]], i32 2 1246 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1247 // CHECK2: arraydestroy.body: 1248 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.2* [ [[TMP6]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1249 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1250 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1251 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.2* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1252 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1253 // CHECK2: arraydestroy.done2: 1254 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1255 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[RETVAL]], align 4 1256 // CHECK2-NEXT: ret i32 [[TMP7]] 1257 // 1258 // 1259 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1260 // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(28) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1261 // CHECK2-NEXT: entry: 1262 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1263 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 1264 // CHECK2-NEXT: [[A2:%.*]] = alloca i32*, align 4 1265 // CHECK2-NEXT: [[B4:%.*]] = alloca i32, align 4 1266 // CHECK2-NEXT: [[C7:%.*]] = alloca i32*, align 4 1267 // CHECK2-NEXT: [[E:%.*]] = alloca [4 x i32]*, align 4 1268 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 1269 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1270 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 1271 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1272 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1273 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 1274 // CHECK2-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1275 // CHECK2-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1276 // CHECK2-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1277 // CHECK2-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1278 // CHECK2-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1279 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 1280 // CHECK2-NEXT: store i32* [[TMP0]], i32** [[C]], align 4 1281 // CHECK2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1282 // CHECK2-NEXT: store i32* [[A3]], i32** [[A2]], align 4 1283 // CHECK2-NEXT: [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1284 // CHECK2-NEXT: [[BF_LOAD6:%.*]] = load i8, i8* [[B5]], align 4 1285 // CHECK2-NEXT: [[BF_SHL:%.*]] = shl i8 [[BF_LOAD6]], 4 1286 // CHECK2-NEXT: [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4 1287 // CHECK2-NEXT: [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32 1288 // CHECK2-NEXT: store i32 [[BF_CAST]], i32* [[B4]], align 4 1289 // CHECK2-NEXT: [[C8:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1290 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C8]], align 4 1291 // CHECK2-NEXT: store i32* [[TMP1]], i32** [[C7]], align 4 1292 // CHECK2-NEXT: [[E9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 1293 // CHECK2-NEXT: store [4 x i32]* [[E9]], [4 x i32]** [[E]], align 4 1294 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1295 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4 1296 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1297 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A2]], align 4 1298 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1299 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[TMP3]], align 4 1300 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 1301 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[B4]], align 4 1302 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[TMP6]], align 4 1303 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 1304 // CHECK2-NEXT: [[TMP9:%.*]] = load i32*, i32** [[C7]], align 4 1305 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1306 // CHECK2-NEXT: store i32 [[TMP10]], i32* [[TMP8]], align 4 1307 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 1308 // CHECK2-NEXT: [[TMP12:%.*]] = load [4 x i32]*, [4 x i32]** [[E]], align 4 1309 // CHECK2-NEXT: store [4 x i32]* [[TMP12]], [4 x i32]** [[TMP11]], align 4 1310 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 1311 // CHECK2-NEXT: ret void 1312 // 1313 // 1314 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 1315 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 1316 // CHECK2-NEXT: entry: 1317 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1318 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1319 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 4 1320 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 1321 // CHECK2-NEXT: [[B:%.*]] = alloca i32, align 4 1322 // CHECK2-NEXT: [[C:%.*]] = alloca i32, align 4 1323 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 4 1324 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32*, align 4 1325 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca [4 x i32]*, align 4 1326 // CHECK2-NEXT: [[E:%.*]] = alloca [4 x i32], align 4 1327 // CHECK2-NEXT: [[_TMP3:%.*]] = alloca [4 x i32]*, align 4 1328 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1329 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1330 // CHECK2-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 4 1331 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 4 1332 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 1333 // CHECK2-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 4 1334 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 1335 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1336 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 1337 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 2 1338 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1339 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[B]], align 4 1340 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 3 1341 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1342 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[C]], align 4 1343 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 4 1344 // CHECK2-NEXT: [[TMP10:%.*]] = load [4 x i32]*, [4 x i32]** [[TMP9]], align 4 1345 // CHECK2-NEXT: store i32* [[A]], i32** [[TMP]], align 4 1346 // CHECK2-NEXT: store i32* [[C]], i32** [[_TMP1]], align 4 1347 // CHECK2-NEXT: store [4 x i32]* [[TMP10]], [4 x i32]** [[_TMP2]], align 4 1348 // CHECK2-NEXT: [[TMP11:%.*]] = load [4 x i32]*, [4 x i32]** [[_TMP2]], align 4 1349 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast [4 x i32]* [[E]] to i8* 1350 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast [4 x i32]* [[TMP11]] to i8* 1351 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 16, i1 false) 1352 // CHECK2-NEXT: store [4 x i32]* [[E]], [4 x i32]** [[_TMP3]], align 4 1353 // CHECK2-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP]], align 4 1354 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 1355 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1 1356 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP14]], align 4 1357 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[B]], align 4 1358 // CHECK2-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP16]], -1 1359 // CHECK2-NEXT: store i32 [[DEC]], i32* [[B]], align 4 1360 // CHECK2-NEXT: [[TMP17:%.*]] = load i32*, i32** [[_TMP1]], align 4 1361 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1362 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP18]], 1 1363 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TMP17]], align 4 1364 // CHECK2-NEXT: [[TMP19:%.*]] = load [4 x i32]*, [4 x i32]** [[_TMP3]], align 4 1365 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[TMP19]], i32 0, i32 2 1366 // CHECK2-NEXT: store i32 1111, i32* [[ARRAYIDX]], align 4 1367 // CHECK2-NEXT: ret void 1368 // 1369 // 1370 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1371 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1372 // CHECK2-NEXT: entry: 1373 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1374 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1375 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1376 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1377 // CHECK2-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 1378 // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 1379 // CHECK2-NEXT: store float [[CONV]], float* [[F]], align 4 1380 // CHECK2-NEXT: ret void 1381 // 1382 // 1383 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1384 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1385 // CHECK2-NEXT: entry: 1386 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1387 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1388 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1389 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1390 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1391 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1392 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1393 // CHECK2-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 1394 // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 1395 // CHECK2-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 1396 // CHECK2-NEXT: store float [[ADD]], float* [[F]], align 4 1397 // CHECK2-NEXT: ret void 1398 // 1399 // 1400 // CHECK2-LABEL: define {{[^@]+}}@_ZN2StC2Ev 1401 // CHECK2-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1402 // CHECK2-NEXT: entry: 1403 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 1404 // CHECK2-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 1405 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 1406 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[THIS1]], i32 0, i32 0 1407 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 1408 // CHECK2-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 1 1409 // CHECK2-NEXT: store i32 0, i32* [[B]], align 4 1410 // CHECK2-NEXT: ret void 1411 // 1412 // 1413 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2ERKS0_2St 1414 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1415 // CHECK2-NEXT: entry: 1416 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1417 // CHECK2-NEXT: [[S_ADDR:%.*]] = alloca %struct.S*, align 4 1418 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1419 // CHECK2-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 4 1420 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1421 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1422 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 4 1423 // CHECK2-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP0]], i32 0, i32 0 1424 // CHECK2-NEXT: [[TMP1:%.*]] = load float, float* [[F2]], align 4 1425 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[T]], i32 0, i32 0 1426 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 1427 // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP2]] to float 1428 // CHECK2-NEXT: [[ADD:%.*]] = fadd float [[TMP1]], [[CONV]] 1429 // CHECK2-NEXT: store float [[ADD]], float* [[F]], align 4 1430 // CHECK2-NEXT: ret void 1431 // 1432 // 1433 // CHECK2-LABEL: define {{[^@]+}}@_ZN2StD2Ev 1434 // CHECK2-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1435 // CHECK2-NEXT: entry: 1436 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 4 1437 // CHECK2-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 4 1438 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 4 1439 // CHECK2-NEXT: ret void 1440 // 1441 // 1442 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1443 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1444 // CHECK2-NEXT: entry: 1445 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1446 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1447 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1448 // CHECK2-NEXT: ret void 1449 // 1450 // 1451 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1452 // CHECK2-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1453 // CHECK2-NEXT: entry: 1454 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 1455 // CHECK2-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 1456 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 1457 // CHECK2-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]]) 1458 // CHECK2-NEXT: ret void 1459 // 1460 // 1461 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 1462 // CHECK2-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1463 // CHECK2-NEXT: entry: 1464 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 1465 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 1466 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 1467 // CHECK2-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 1468 // CHECK2-NEXT: ret void 1469 // 1470 // 1471 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1472 // CHECK2-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1473 // CHECK2-NEXT: entry: 1474 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 1475 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1476 // CHECK2-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 1477 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1478 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 1479 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1480 // CHECK2-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 1481 // CHECK2-NEXT: ret void 1482 // 1483 // 1484 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 1485 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 1486 // CHECK2-NEXT: entry: 1487 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1488 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1489 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 4 1490 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1491 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 1492 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.2], align 128 1493 // CHECK2-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 1494 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_2:%.*]], align 128 1495 // CHECK2-NEXT: [[AGG_TMP2:%.*]] = alloca [[STRUCT_ST]], align 4 1496 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1497 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1498 // CHECK2-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 4 1499 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 4 1500 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 1501 // CHECK2-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 4 1502 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 1503 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 4 1504 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 1505 // CHECK2-NEXT: [[TMP6:%.*]] = load [2 x %struct.S.2]*, [2 x %struct.S.2]** [[TMP5]], align 4 1506 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 1507 // CHECK2-NEXT: [[TMP8:%.*]] = load %struct.S.2*, %struct.S.2** [[TMP7]], align 4 1508 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP4]], align 128 1509 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[T_VAR]], align 128 1510 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1511 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast [2 x i32]* [[TMP2]] to i8* 1512 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP10]], i8* align 128 [[TMP11]], i32 8, i1 false) 1513 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 1514 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast [2 x %struct.S.2]* [[TMP6]] to %struct.S.2* 1515 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr [[STRUCT_S_2]], %struct.S.2* [[ARRAY_BEGIN]], i32 2 1516 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.2* [[ARRAY_BEGIN]], [[TMP13]] 1517 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE1:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1518 // CHECK2: omp.arraycpy.body: 1519 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.2* [ [[TMP12]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1520 // CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.2* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1521 // CHECK2-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) 1522 // CHECK2-NEXT: call void @_ZN1SIiEC1ERKS0_2St(%struct.S.2* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.2* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], %struct.St* [[AGG_TMP]]) 1523 // CHECK2-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]] 1524 // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_2]], %struct.S.2* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1525 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_2]], %struct.S.2* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1526 // CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.2* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP13]] 1527 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE1]], label [[OMP_ARRAYCPY_BODY]] 1528 // CHECK2: omp.arraycpy.done1: 1529 // CHECK2-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) 1530 // CHECK2-NEXT: call void @_ZN1SIiEC1ERKS0_2St(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]], %struct.S.2* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.St* [[AGG_TMP2]]) 1531 // CHECK2-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) #[[ATTR4]] 1532 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR]], align 128 1533 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 0 1534 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 128 1535 // CHECK2-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 1536 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast %struct.S.2* [[ARRAYIDX3]] to i8* 1537 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast %struct.S.2* [[VAR]] to i8* 1538 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP15]], i8* align 128 [[TMP16]], i32 4, i1 false) 1539 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1540 // CHECK2-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 1541 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAY_BEGIN4]], i32 2 1542 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1543 // CHECK2: arraydestroy.body: 1544 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.2* [ [[TMP17]], [[OMP_ARRAYCPY_DONE1]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1545 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1546 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1547 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.2* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 1548 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1549 // CHECK2: arraydestroy.done5: 1550 // CHECK2-NEXT: ret void 1551 // 1552 // 1553 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_2St 1554 // CHECK2-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.2* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1555 // CHECK2-NEXT: entry: 1556 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 1557 // CHECK2-NEXT: [[S_ADDR:%.*]] = alloca %struct.S.2*, align 4 1558 // CHECK2-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 1559 // CHECK2-NEXT: store %struct.S.2* [[S]], %struct.S.2** [[S_ADDR]], align 4 1560 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 1561 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.S.2*, %struct.S.2** [[S_ADDR]], align 4 1562 // CHECK2-NEXT: call void @_ZN1SIiEC2ERKS0_2St(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]], %struct.S.2* nonnull align 4 dereferenceable(4) [[TMP0]], %struct.St* [[T]]) 1563 // CHECK2-NEXT: ret void 1564 // 1565 // 1566 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1567 // CHECK2-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1568 // CHECK2-NEXT: entry: 1569 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 1570 // CHECK2-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 1571 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 1572 // CHECK2-NEXT: call void @_ZN1SIiED2Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1573 // CHECK2-NEXT: ret void 1574 // 1575 // 1576 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4 1577 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 1578 // CHECK2-NEXT: entry: 1579 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1580 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1581 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 4 1582 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1583 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1584 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1585 // CHECK2-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 4 1586 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 4 1587 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 1588 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 4 1589 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 128 1590 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[T_VAR]], align 128 1591 // CHECK2-NEXT: ret void 1592 // 1593 // 1594 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1595 // CHECK2-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1596 // CHECK2-NEXT: entry: 1597 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 1598 // CHECK2-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 1599 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 1600 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_2:%.*]], %struct.S.2* [[THIS1]], i32 0, i32 0 1601 // CHECK2-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 1602 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1603 // CHECK2-NEXT: ret void 1604 // 1605 // 1606 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 1607 // CHECK2-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1608 // CHECK2-NEXT: entry: 1609 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4 1610 // CHECK2-NEXT: [[A2:%.*]] = alloca i32*, align 4 1611 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 4 1612 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4 1613 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4 1614 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 1615 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 1616 // CHECK2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SST]], %struct.SST* [[THIS1]], i32 0, i32 0 1617 // CHECK2-NEXT: store i32* [[A3]], i32** [[A2]], align 4 1618 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1619 // CHECK2-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP0]], align 4 1620 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1621 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A2]], align 4 1622 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1623 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[TMP1]], align 4 1624 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 1625 // CHECK2-NEXT: ret void 1626 // 1627 // 1628 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..5 1629 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 1630 // CHECK2-NEXT: entry: 1631 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1632 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1633 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 4 1634 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 1635 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 4 1636 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1637 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1638 // CHECK2-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 4 1639 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 4 1640 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 1641 // CHECK2-NEXT: [[TMP2:%.*]] = load %struct.SST*, %struct.SST** [[TMP1]], align 4 1642 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 1643 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1644 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 1645 // CHECK2-NEXT: store i32* [[A]], i32** [[TMP]], align 4 1646 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP]], align 4 1647 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1648 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 1649 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP5]], align 4 1650 // CHECK2-NEXT: ret void 1651 // 1652 // 1653 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1654 // CHECK2-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1655 // CHECK2-NEXT: entry: 1656 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 1657 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1658 // CHECK2-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 1659 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1660 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 1661 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_2:%.*]], %struct.S.2* [[THIS1]], i32 0, i32 0 1662 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1663 // CHECK2-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 1664 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 1665 // CHECK2-NEXT: store i32 [[ADD]], i32* [[F]], align 4 1666 // CHECK2-NEXT: ret void 1667 // 1668 // 1669 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_2St 1670 // CHECK2-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.2* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1671 // CHECK2-NEXT: entry: 1672 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 1673 // CHECK2-NEXT: [[S_ADDR:%.*]] = alloca %struct.S.2*, align 4 1674 // CHECK2-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 1675 // CHECK2-NEXT: store %struct.S.2* [[S]], %struct.S.2** [[S_ADDR]], align 4 1676 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 1677 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_2:%.*]], %struct.S.2* [[THIS1]], i32 0, i32 0 1678 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.S.2*, %struct.S.2** [[S_ADDR]], align 4 1679 // CHECK2-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[TMP0]], i32 0, i32 0 1680 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[F2]], align 4 1681 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[T]], i32 0, i32 0 1682 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 1683 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]] 1684 // CHECK2-NEXT: store i32 [[ADD]], i32* [[F]], align 4 1685 // CHECK2-NEXT: ret void 1686 // 1687 // 1688 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1689 // CHECK2-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1690 // CHECK2-NEXT: entry: 1691 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 4 1692 // CHECK2-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 4 1693 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 4 1694 // CHECK2-NEXT: ret void 1695 // 1696 // 1697 // CHECK3-LABEL: define {{[^@]+}}@main 1698 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 1699 // CHECK3-NEXT: entry: 1700 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1701 // CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1702 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 1703 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 1704 // CHECK3-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 4 dereferenceable(28) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1705 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1706 // CHECK3-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP0]], align 4 1707 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(4) [[REF_TMP]]) 1708 // CHECK3-NEXT: ret i32 0 1709 // 1710 // 1711 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1712 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(28) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1713 // CHECK3-NEXT: entry: 1714 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1715 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 1716 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1717 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 1718 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1719 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 1720 // CHECK3-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 4 dereferenceable(28) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1721 // CHECK3-NEXT: ret void 1722 // 1723 // 1724 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1725 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(28) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1726 // CHECK3-NEXT: entry: 1727 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1728 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 1729 // CHECK3-NEXT: [[A2:%.*]] = alloca i32*, align 4 1730 // CHECK3-NEXT: [[B4:%.*]] = alloca i32, align 4 1731 // CHECK3-NEXT: [[C7:%.*]] = alloca i32*, align 4 1732 // CHECK3-NEXT: [[E:%.*]] = alloca [4 x i32]*, align 4 1733 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 1734 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1735 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 1736 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1737 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1738 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4 1739 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1740 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1741 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1742 // CHECK3-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1743 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1744 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 1745 // CHECK3-NEXT: store i32* [[TMP0]], i32** [[C]], align 4 1746 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1747 // CHECK3-NEXT: store i32* [[A3]], i32** [[A2]], align 4 1748 // CHECK3-NEXT: [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1749 // CHECK3-NEXT: [[BF_LOAD6:%.*]] = load i8, i8* [[B5]], align 4 1750 // CHECK3-NEXT: [[BF_SHL:%.*]] = shl i8 [[BF_LOAD6]], 4 1751 // CHECK3-NEXT: [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4 1752 // CHECK3-NEXT: [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32 1753 // CHECK3-NEXT: store i32 [[BF_CAST]], i32* [[B4]], align 4 1754 // CHECK3-NEXT: [[C8:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1755 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C8]], align 4 1756 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[C7]], align 4 1757 // CHECK3-NEXT: [[E9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 1758 // CHECK3-NEXT: store [4 x i32]* [[E9]], [4 x i32]** [[E]], align 4 1759 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1760 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4 1761 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1762 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A2]], align 4 1763 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1764 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP3]], align 4 1765 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 1766 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[B4]], align 4 1767 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[TMP6]], align 4 1768 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 1769 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[C7]], align 4 1770 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1771 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[TMP8]], align 4 1772 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 1773 // CHECK3-NEXT: [[TMP12:%.*]] = load [4 x i32]*, [4 x i32]** [[E]], align 4 1774 // CHECK3-NEXT: store [4 x i32]* [[TMP12]], [4 x i32]** [[TMP11]], align 4 1775 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 1776 // CHECK3-NEXT: ret void 1777 // 1778 // 1779 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1780 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { 1781 // CHECK3-NEXT: entry: 1782 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1783 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1784 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4 1785 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 1786 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 1787 // CHECK3-NEXT: [[C:%.*]] = alloca i32, align 4 1788 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 4 1789 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 4 1790 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca [4 x i32]*, align 4 1791 // CHECK3-NEXT: [[E:%.*]] = alloca [4 x i32], align 4 1792 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca [4 x i32]*, align 4 1793 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 1794 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1795 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1796 // CHECK3-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4 1797 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4 1798 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 1799 // CHECK3-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 4 1800 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 1 1801 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1802 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 1803 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 2 1804 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1805 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[B]], align 4 1806 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 3 1807 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1808 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[C]], align 4 1809 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 4 1810 // CHECK3-NEXT: [[TMP10:%.*]] = load [4 x i32]*, [4 x i32]** [[TMP9]], align 4 1811 // CHECK3-NEXT: store i32* [[A]], i32** [[TMP]], align 4 1812 // CHECK3-NEXT: store i32* [[C]], i32** [[_TMP1]], align 4 1813 // CHECK3-NEXT: store [4 x i32]* [[TMP10]], [4 x i32]** [[_TMP2]], align 4 1814 // CHECK3-NEXT: [[TMP11:%.*]] = load [4 x i32]*, [4 x i32]** [[_TMP2]], align 4 1815 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast [4 x i32]* [[E]] to i8* 1816 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast [4 x i32]* [[TMP11]] to i8* 1817 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 16, i1 false) 1818 // CHECK3-NEXT: store [4 x i32]* [[E]], [4 x i32]** [[_TMP3]], align 4 1819 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1820 // CHECK3-NEXT: store %struct.SS* [[TMP2]], %struct.SS** [[TMP14]], align 4 1821 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1822 // CHECK3-NEXT: [[TMP16:%.*]] = load i32*, i32** [[TMP]], align 4 1823 // CHECK3-NEXT: store i32* [[TMP16]], i32** [[TMP15]], align 4 1824 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1825 // CHECK3-NEXT: store i32* [[B]], i32** [[TMP17]], align 4 1826 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1827 // CHECK3-NEXT: [[TMP19:%.*]] = load i32*, i32** [[_TMP1]], align 4 1828 // CHECK3-NEXT: store i32* [[TMP19]], i32** [[TMP18]], align 4 1829 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 1830 // CHECK3-NEXT: ret void 1831 // 1832 // 1833 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 1834 // CHECK3-SAME: (%class.anon.0* nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 1835 // CHECK3-NEXT: entry: 1836 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 4 1837 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 1838 // CHECK3-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 4 1839 // CHECK3-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 4 1840 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 1841 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 4 1842 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 1843 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 4 1844 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1845 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1846 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 1847 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 1848 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 4 1849 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1850 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 1851 // CHECK3-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 1852 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 1853 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 4 1854 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1855 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 1856 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 1857 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1858 // CHECK3-NEXT: store %struct.SS* [[TMP1]], %struct.SS** [[TMP11]], align 4 1859 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1860 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 1861 // CHECK3-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP13]], align 4 1862 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 1863 // CHECK3-NEXT: store i32 [[TMP15]], i32* [[TMP12]], align 4 1864 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 1865 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 1866 // CHECK3-NEXT: [[TMP18:%.*]] = load i32*, i32** [[TMP17]], align 4 1867 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1868 // CHECK3-NEXT: store i32 [[TMP19]], i32* [[TMP16]], align 4 1869 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 1870 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 1871 // CHECK3-NEXT: [[TMP22:%.*]] = load i32*, i32** [[TMP21]], align 4 1872 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 1873 // CHECK3-NEXT: store i32 [[TMP23]], i32* [[TMP20]], align 4 1874 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 1875 // CHECK3-NEXT: ret void 1876 // 1877 // 1878 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1879 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 1880 // CHECK3-NEXT: entry: 1881 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1882 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1883 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 4 1884 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 1885 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 1886 // CHECK3-NEXT: [[C:%.*]] = alloca i32, align 4 1887 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 4 1888 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 4 1889 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1890 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1891 // CHECK3-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 4 1892 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 4 1893 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 1894 // CHECK3-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 4 1895 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 1896 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1897 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 1898 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 2 1899 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1900 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[B]], align 4 1901 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 3 1902 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1903 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[C]], align 4 1904 // CHECK3-NEXT: store i32* [[A]], i32** [[TMP]], align 4 1905 // CHECK3-NEXT: store i32* [[C]], i32** [[_TMP1]], align 4 1906 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP]], align 4 1907 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1908 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1 1909 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP9]], align 4 1910 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 1911 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP11]], -1 1912 // CHECK3-NEXT: store i32 [[DEC]], i32* [[B]], align 4 1913 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[_TMP1]], align 4 1914 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 1915 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP13]], 1 1916 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP12]], align 4 1917 // CHECK3-NEXT: ret void 1918 // 1919 // 1920 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 1921 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 1922 // CHECK3-NEXT: entry: 1923 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1924 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1925 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 4 1926 // CHECK3-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1927 // CHECK3-NEXT: [[G:%.*]] = alloca i32, align 128 1928 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_3:%.*]], align 4 1929 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1930 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1931 // CHECK3-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 4 1932 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 4 1933 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 1934 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 4 1935 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 1 1936 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1937 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[SIVAR]], align 4 1938 // CHECK3-NEXT: [[TMP5:%.*]] = load volatile i32, i32* [[TMP2]], align 128 1939 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[G]], align 128 1940 // CHECK3-NEXT: store i32 1, i32* [[G]], align 128 1941 // CHECK3-NEXT: store i32 2, i32* [[SIVAR]], align 4 1942 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 0 1943 // CHECK3-NEXT: store i32* [[G]], i32** [[TMP6]], align 4 1944 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 1 1945 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[TMP7]], align 4 1946 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.3* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 1947 // CHECK3-NEXT: ret void 1948 // 1949 // 1950 // CHECK4-LABEL: define {{[^@]+}}@main 1951 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 1952 // CHECK4-NEXT: entry: 1953 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1954 // CHECK4-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1955 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, align 4 1956 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 1957 // CHECK4-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 4 dereferenceable(28) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1958 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 0 1959 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 4 1960 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 1 1961 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 4 1962 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 2 1963 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 1964 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 3 1965 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @__main_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 4 1966 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 4 1967 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i32, i32, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 4 1968 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 5 1969 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 1970 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[BLOCK_CAPTURED]], align 4 1971 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]] to void ()* 1972 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP1]] to %struct.__block_literal_generic* 1973 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 1974 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 1975 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[TMP2]], align 4 1976 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to void (i8*)* 1977 // CHECK4-NEXT: call void [[TMP5]](i8* [[TMP3]]) 1978 // CHECK4-NEXT: ret i32 0 1979 // 1980 // 1981 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1982 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(28) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1983 // CHECK4-NEXT: entry: 1984 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1985 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 1986 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1987 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 1988 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1989 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 1990 // CHECK4-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 4 dereferenceable(28) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1991 // CHECK4-NEXT: ret void 1992 // 1993 // 1994 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke 1995 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] { 1996 // CHECK4-NEXT: entry: 1997 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 4 1998 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>*, align 4 1999 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 2000 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 4 2001 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* 2002 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>** [[BLOCK_ADDR]], align 4 2003 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2004 // CHECK4-NEXT: store i32* @g, i32** [[TMP0]], align 4 2005 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2006 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 2007 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 2008 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 2009 // CHECK4-NEXT: ret void 2010 // 2011 // 2012 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 2013 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] { 2014 // CHECK4-NEXT: entry: 2015 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2016 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2017 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4 2018 // CHECK4-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 2019 // CHECK4-NEXT: [[G:%.*]] = alloca i32, align 128 2020 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>, align 128 2021 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2022 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2023 // CHECK4-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4 2024 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4 2025 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 2026 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 4 2027 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 1 2028 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2029 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[SIVAR]], align 4 2030 // CHECK4-NEXT: [[TMP5:%.*]] = load volatile i32, i32* [[TMP2]], align 128 2031 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[G]], align 128 2032 // CHECK4-NEXT: store i32 1, i32* [[G]], align 128 2033 // CHECK4-NEXT: store i32 2, i32* [[SIVAR]], align 4 2034 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>* [[BLOCK]], i32 0, i32 0 2035 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 128 2036 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>* [[BLOCK]], i32 0, i32 1 2037 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 4 2038 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>* [[BLOCK]], i32 0, i32 2 2039 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 8 2040 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>* [[BLOCK]], i32 0, i32 3 2041 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 4 2042 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>* [[BLOCK]], i32 0, i32 4 2043 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i32, i32, i8*, i8* }* @__block_descriptor_tmp to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 16 2044 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>* [[BLOCK]], i32 0, i32 7 2045 // CHECK4-NEXT: [[TMP6:%.*]] = load volatile i32, i32* [[G]], align 128 2046 // CHECK4-NEXT: store volatile i32 [[TMP6]], i32* [[BLOCK_CAPTURED]], align 128 2047 // CHECK4-NEXT: [[BLOCK_CAPTURED1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>* [[BLOCK]], i32 0, i32 5 2048 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[SIVAR]], align 4 2049 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[BLOCK_CAPTURED1]], align 4 2050 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>* [[BLOCK]] to void ()* 2051 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP8]] to %struct.__block_literal_generic* 2052 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 2053 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 2054 // CHECK4-NEXT: [[TMP11:%.*]] = load i8*, i8** [[TMP9]], align 4 2055 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to void (i8*)* 2056 // CHECK4-NEXT: call void [[TMP12]](i8* [[TMP10]]) 2057 // CHECK4-NEXT: ret void 2058 // 2059 // 2060 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke 2061 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] { 2062 // CHECK4-NEXT: entry: 2063 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 4 2064 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>*, align 4 2065 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 4 2066 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>* 2067 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>** [[BLOCK_ADDR]], align 4 2068 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>* [[BLOCK]], i32 0, i32 7 2069 // CHECK4-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 128 2070 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [104 x i8], i32 }>* [[BLOCK]], i32 0, i32 5 2071 // CHECK4-NEXT: store i32 4, i32* [[BLOCK_CAPTURE_ADDR1]], align 4 2072 // CHECK4-NEXT: ret void 2073 // 2074 // 2075 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 2076 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(28) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2077 // CHECK4-NEXT: entry: 2078 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2079 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4 2080 // CHECK4-NEXT: [[A2:%.*]] = alloca i32*, align 4 2081 // CHECK4-NEXT: [[B4:%.*]] = alloca i32, align 4 2082 // CHECK4-NEXT: [[C7:%.*]] = alloca i32*, align 4 2083 // CHECK4-NEXT: [[E:%.*]] = alloca [4 x i32]*, align 4 2084 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 4 2085 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2086 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4 2087 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2088 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2089 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4 2090 // CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 2091 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 2092 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 2093 // CHECK4-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 2094 // CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2095 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4 2096 // CHECK4-NEXT: store i32* [[TMP0]], i32** [[C]], align 4 2097 // CHECK4-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2098 // CHECK4-NEXT: store i32* [[A3]], i32** [[A2]], align 4 2099 // CHECK4-NEXT: [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 2100 // CHECK4-NEXT: [[BF_LOAD6:%.*]] = load i8, i8* [[B5]], align 4 2101 // CHECK4-NEXT: [[BF_SHL:%.*]] = shl i8 [[BF_LOAD6]], 4 2102 // CHECK4-NEXT: [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4 2103 // CHECK4-NEXT: [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32 2104 // CHECK4-NEXT: store i32 [[BF_CAST]], i32* [[B4]], align 4 2105 // CHECK4-NEXT: [[C8:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2106 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C8]], align 4 2107 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[C7]], align 4 2108 // CHECK4-NEXT: [[E9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 2109 // CHECK4-NEXT: store [4 x i32]* [[E9]], [4 x i32]** [[E]], align 4 2110 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2111 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4 2112 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2113 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A2]], align 4 2114 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2115 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP3]], align 4 2116 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 2117 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[B4]], align 4 2118 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[TMP6]], align 4 2119 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 2120 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[C7]], align 4 2121 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 2122 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[TMP8]], align 4 2123 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 2124 // CHECK4-NEXT: [[TMP12:%.*]] = load [4 x i32]*, [4 x i32]** [[E]], align 4 2125 // CHECK4-NEXT: store [4 x i32]* [[TMP12]], [4 x i32]** [[TMP11]], align 4 2126 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 2127 // CHECK4-NEXT: ret void 2128 // 2129 // 2130 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 2131 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 2132 // CHECK4-NEXT: entry: 2133 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2134 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2135 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 4 2136 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 2137 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 2138 // CHECK4-NEXT: [[C:%.*]] = alloca i32, align 4 2139 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 4 2140 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 4 2141 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca [4 x i32]*, align 4 2142 // CHECK4-NEXT: [[E:%.*]] = alloca [4 x i32], align 4 2143 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca [4 x i32]*, align 4 2144 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, align 4 2145 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2146 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2147 // CHECK4-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 4 2148 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 4 2149 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 2150 // CHECK4-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 4 2151 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 1 2152 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2153 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 2154 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 2 2155 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2156 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[B]], align 4 2157 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 3 2158 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2159 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[C]], align 4 2160 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 4 2161 // CHECK4-NEXT: [[TMP10:%.*]] = load [4 x i32]*, [4 x i32]** [[TMP9]], align 4 2162 // CHECK4-NEXT: store i32* [[A]], i32** [[TMP]], align 4 2163 // CHECK4-NEXT: store i32* [[C]], i32** [[_TMP1]], align 4 2164 // CHECK4-NEXT: store [4 x i32]* [[TMP10]], [4 x i32]** [[_TMP2]], align 4 2165 // CHECK4-NEXT: [[TMP11:%.*]] = load [4 x i32]*, [4 x i32]** [[_TMP2]], align 4 2166 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast [4 x i32]* [[E]] to i8* 2167 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast [4 x i32]* [[TMP11]] to i8* 2168 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 16, i1 false) 2169 // CHECK4-NEXT: store [4 x i32]* [[E]], [4 x i32]** [[_TMP3]], align 4 2170 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 0 2171 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 4 2172 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 1 2173 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 4 2174 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 2 2175 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 2176 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 3 2177 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 4 2178 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 4 2179 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i32, i32, i8*, i8* }* @__block_descriptor_tmp.4 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 4 2180 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 5 2181 // CHECK4-NEXT: store %struct.SS* [[TMP2]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 4 2182 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 6 2183 // CHECK4-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP]], align 4 2184 // CHECK4-NEXT: store i32* [[TMP14]], i32** [[BLOCK_CAPTURED]], align 4 2185 // CHECK4-NEXT: [[BLOCK_CAPTURED4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 7 2186 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[B]], align 4 2187 // CHECK4-NEXT: store i32 [[TMP15]], i32* [[BLOCK_CAPTURED4]], align 4 2188 // CHECK4-NEXT: [[BLOCK_CAPTURED5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 8 2189 // CHECK4-NEXT: [[TMP16:%.*]] = load i32*, i32** [[_TMP1]], align 4 2190 // CHECK4-NEXT: store i32* [[TMP16]], i32** [[BLOCK_CAPTURED5]], align 4 2191 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]] to void ()* 2192 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP17]] to %struct.__block_literal_generic* 2193 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 2194 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 2195 // CHECK4-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP18]], align 4 2196 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to void (i8*)* 2197 // CHECK4-NEXT: call void [[TMP21]](i8* [[TMP19]]) 2198 // CHECK4-NEXT: ret void 2199 // 2200 // 2201 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke_2 2202 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] { 2203 // CHECK4-NEXT: entry: 2204 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 4 2205 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>*, align 4 2206 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 2207 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 4 2208 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* 2209 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>** [[BLOCK_ADDR]], align 4 2210 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 5 2211 // CHECK4-NEXT: [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 4 2212 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 6 2213 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 4 2214 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2215 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2216 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 2217 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 7 2218 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR1]], align 4 2219 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -1 2220 // CHECK4-NEXT: store i32 [[DEC]], i32* [[BLOCK_CAPTURE_ADDR1]], align 4 2221 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 8 2222 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 4 2223 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2224 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1 2225 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP3]], align 4 2226 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2227 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[TMP5]], align 4 2228 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2229 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 6 2230 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR3]], align 4 2231 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2232 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[TMP6]], align 4 2233 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 2234 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 7 2235 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR4]], align 4 2236 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[TMP9]], align 4 2237 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 2238 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32, i32* }>* [[BLOCK]], i32 0, i32 8 2239 // CHECK4-NEXT: [[TMP12:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR5]], align 4 2240 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 2241 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[TMP11]], align 4 2242 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 2243 // CHECK4-NEXT: ret void 2244 // 2245 // 2246 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 2247 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 2248 // CHECK4-NEXT: entry: 2249 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2250 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2251 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 4 2252 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 2253 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 2254 // CHECK4-NEXT: [[C:%.*]] = alloca i32, align 4 2255 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 4 2256 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 4 2257 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2258 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2259 // CHECK4-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 4 2260 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 4 2261 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 2262 // CHECK4-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 4 2263 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 2264 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2265 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 2266 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 2 2267 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2268 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[B]], align 4 2269 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 3 2270 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2271 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[C]], align 4 2272 // CHECK4-NEXT: store i32* [[A]], i32** [[TMP]], align 4 2273 // CHECK4-NEXT: store i32* [[C]], i32** [[_TMP1]], align 4 2274 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP]], align 4 2275 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 2276 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1 2277 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP9]], align 4 2278 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 2279 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP11]], -1 2280 // CHECK4-NEXT: store i32 [[DEC]], i32* [[B]], align 4 2281 // CHECK4-NEXT: [[TMP12:%.*]] = load i32*, i32** [[_TMP1]], align 4 2282 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 2283 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP13]], 1 2284 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP12]], align 4 2285 // CHECK4-NEXT: ret void 2286 // 2287 // 2288 // CHECK9-LABEL: define {{[^@]+}}@main 2289 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 2290 // CHECK9-NEXT: entry: 2291 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2292 // CHECK9-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 2293 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2294 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2295 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2296 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2297 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 2298 // CHECK9-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 2299 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4 2300 // CHECK9-NEXT: [[OMP_OUTLINED_ARG_AGG_1:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 4 2301 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 2302 // CHECK9-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(32) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 2303 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 2304 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 2305 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2306 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 2307 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 2308 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 2309 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 2310 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 2311 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 2312 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2313 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP1]], align 8 2314 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2315 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR]], align 4 2316 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[TMP2]], align 8 2317 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 2318 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP4]], align 8 2319 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 2320 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[TMP5]], align 8 2321 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 2322 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 2323 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[TMP6]], align 8 2324 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 2325 // CHECK9-NEXT: store i32 0, i32* [[A]], align 4 2326 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 0 2327 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4 2328 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 4 2329 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_1]]) 2330 // CHECK9-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 2331 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2332 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4:[0-9]+]] 2333 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2334 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2335 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2336 // CHECK9: arraydestroy.body: 2337 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP10]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2338 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2339 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2340 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2341 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2342 // CHECK9: arraydestroy.done2: 2343 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2344 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 2345 // CHECK9-NEXT: ret i32 [[TMP11]] 2346 // 2347 // 2348 // CHECK9-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 2349 // CHECK9-SAME: (%struct.SS* nonnull align 8 dereferenceable(32) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2350 // CHECK9-NEXT: entry: 2351 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2352 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2353 // CHECK9-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2354 // CHECK9-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2355 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2356 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2357 // CHECK9-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(32) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 2358 // CHECK9-NEXT: ret void 2359 // 2360 // 2361 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2362 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2363 // CHECK9-NEXT: entry: 2364 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2365 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2366 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2367 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 2368 // CHECK9-NEXT: ret void 2369 // 2370 // 2371 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2372 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2373 // CHECK9-NEXT: entry: 2374 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2375 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2376 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2377 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2378 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2379 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2380 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 2381 // CHECK9-NEXT: ret void 2382 // 2383 // 2384 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 2385 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { 2386 // CHECK9-NEXT: entry: 2387 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2388 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2389 // CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 2390 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2391 // CHECK9-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 2392 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2393 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2394 // CHECK9-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 2395 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2396 // CHECK9-NEXT: [[AGG_TMP2:%.*]] = alloca [[STRUCT_ST]], align 4 2397 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2398 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2399 // CHECK9-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 2400 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 2401 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 2402 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 8 2403 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 1 2404 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 2405 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[T_VAR]], align 4 2406 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 3 2407 // CHECK9-NEXT: [[TMP6:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP5]], align 8 2408 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 4 2409 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP7]], align 8 2410 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 5 2411 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 8 2412 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[SIVAR]], align 4 2413 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2414 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [2 x i32]* [[TMP2]] to i8* 2415 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 8, i1 false) 2416 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2417 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast [2 x %struct.S]* [[TMP6]] to %struct.S* 2418 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2419 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP14]] 2420 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE1:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2421 // CHECK9: omp.arraycpy.body: 2422 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2423 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2424 // CHECK9-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) 2425 // CHECK9-NEXT: call void @_ZN1SIfEC1ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], %struct.St* [[AGG_TMP]]) 2426 // CHECK9-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]] 2427 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2428 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2429 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]] 2430 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE1]], label [[OMP_ARRAYCPY_BODY]] 2431 // CHECK9: omp.arraycpy.done1: 2432 // CHECK9-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) 2433 // CHECK9-NEXT: call void @_ZN1SIfEC1ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.St* [[AGG_TMP2]]) 2434 // CHECK9-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) #[[ATTR4]] 2435 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR]], align 4 2436 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 2437 // CHECK9-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4 2438 // CHECK9-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 2439 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX3]] to i8* 2440 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[VAR]] to i8* 2441 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false) 2442 // CHECK9-NEXT: store i32 2, i32* [[SIVAR]], align 4 2443 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2444 // CHECK9-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2445 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i64 2 2446 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2447 // CHECK9: arraydestroy.body: 2448 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP18]], [[OMP_ARRAYCPY_DONE1]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2449 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2450 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2451 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 2452 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 2453 // CHECK9: arraydestroy.done5: 2454 // CHECK9-NEXT: ret void 2455 // 2456 // 2457 // CHECK9-LABEL: define {{[^@]+}}@_ZN2StC1Ev 2458 // CHECK9-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2459 // CHECK9-NEXT: entry: 2460 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 2461 // CHECK9-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 2462 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 2463 // CHECK9-NEXT: call void @_ZN2StC2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) 2464 // CHECK9-NEXT: ret void 2465 // 2466 // 2467 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1ERKS0_2St 2468 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2469 // CHECK9-NEXT: entry: 2470 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2471 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca %struct.S*, align 8 2472 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2473 // CHECK9-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 8 2474 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2475 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 8 2476 // CHECK9-NEXT: call void @_ZN1SIfEC2ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP0]], %struct.St* [[T]]) 2477 // CHECK9-NEXT: ret void 2478 // 2479 // 2480 // CHECK9-LABEL: define {{[^@]+}}@_ZN2StD1Ev 2481 // CHECK9-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2482 // CHECK9-NEXT: entry: 2483 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 2484 // CHECK9-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 2485 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 2486 // CHECK9-NEXT: call void @_ZN2StD2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR4]] 2487 // CHECK9-NEXT: ret void 2488 // 2489 // 2490 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2491 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2492 // CHECK9-NEXT: entry: 2493 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2494 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2495 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2496 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2497 // CHECK9-NEXT: ret void 2498 // 2499 // 2500 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 2501 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 2502 // CHECK9-NEXT: entry: 2503 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2504 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2505 // CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 2506 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2507 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2508 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2509 // CHECK9-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 2510 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 2511 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 2512 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2513 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[T_VAR]], align 4 2514 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2515 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2516 // CHECK9-NEXT: [[DOTT_VAR__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP4]], i64 4, i8* inttoptr (i64 1 to i8*)) 2517 // CHECK9-NEXT: [[DOTT_VAR__ADDR:%.*]] = bitcast i8* [[DOTT_VAR__VOID_ADDR]] to i32* 2518 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR]], align 4 2519 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTT_VAR__ADDR]], align 4 2520 // CHECK9-NEXT: store i32 0, i32* [[DOTT_VAR__ADDR]], align 4 2521 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTT_VAR__ADDR]] to i8* 2522 // CHECK9-NEXT: call void @__kmpc_free(i32 [[TMP4]], i8* [[TMP6]], i8* inttoptr (i64 1 to i8*)) 2523 // CHECK9-NEXT: ret void 2524 // 2525 // 2526 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2527 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 2528 // CHECK9-NEXT: entry: 2529 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2530 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_2:%.*]], align 4 2531 // CHECK9-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 2532 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 2533 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 2534 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.2], align 128 2535 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_2]], align 128 2536 // CHECK9-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 8 2537 // CHECK9-NEXT: [[OMP_OUTLINED_ARG_AGG_1:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 2538 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[TEST]]) 2539 // CHECK9-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 2540 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 128 2541 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2542 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 2543 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i64 0, i64 0 2544 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 2545 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAYINIT_BEGIN]], i64 1 2546 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 2547 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 2548 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2549 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP1]], align 8 2550 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2551 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 8 2552 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 2553 // CHECK9-NEXT: store [2 x %struct.S.2]* [[S_ARR]], [2 x %struct.S.2]** [[TMP3]], align 8 2554 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 2555 // CHECK9-NEXT: store %struct.S.2* [[VAR]], %struct.S.2** [[TMP4]], align 8 2556 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 2557 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 0 2558 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[TMP5]], align 8 2559 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_1]]) 2560 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 2561 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2562 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 2563 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAY_BEGIN]], i64 2 2564 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2565 // CHECK9: arraydestroy.body: 2566 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.2* [ [[TMP6]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2567 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2568 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2569 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.2* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2570 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2571 // CHECK9: arraydestroy.done2: 2572 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2573 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[RETVAL]], align 4 2574 // CHECK9-NEXT: ret i32 [[TMP7]] 2575 // 2576 // 2577 // CHECK9-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 2578 // CHECK9-SAME: (%struct.SS* nonnull align 8 dereferenceable(32) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2579 // CHECK9-NEXT: entry: 2580 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2581 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2582 // CHECK9-NEXT: [[A2:%.*]] = alloca i32*, align 8 2583 // CHECK9-NEXT: [[B4:%.*]] = alloca i32, align 4 2584 // CHECK9-NEXT: [[C7:%.*]] = alloca i32*, align 8 2585 // CHECK9-NEXT: [[E:%.*]] = alloca [4 x i32]*, align 8 2586 // CHECK9-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 2587 // CHECK9-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2588 // CHECK9-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2589 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2590 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2591 // CHECK9-NEXT: store i32 0, i32* [[A]], align 8 2592 // CHECK9-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 2593 // CHECK9-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 2594 // CHECK9-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 2595 // CHECK9-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 2596 // CHECK9-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2597 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2598 // CHECK9-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 2599 // CHECK9-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2600 // CHECK9-NEXT: store i32* [[A3]], i32** [[A2]], align 8 2601 // CHECK9-NEXT: [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 2602 // CHECK9-NEXT: [[BF_LOAD6:%.*]] = load i8, i8* [[B5]], align 4 2603 // CHECK9-NEXT: [[BF_SHL:%.*]] = shl i8 [[BF_LOAD6]], 4 2604 // CHECK9-NEXT: [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4 2605 // CHECK9-NEXT: [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32 2606 // CHECK9-NEXT: store i32 [[BF_CAST]], i32* [[B4]], align 4 2607 // CHECK9-NEXT: [[C8:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2608 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C8]], align 8 2609 // CHECK9-NEXT: store i32* [[TMP1]], i32** [[C7]], align 8 2610 // CHECK9-NEXT: [[E9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 2611 // CHECK9-NEXT: store [4 x i32]* [[E9]], [4 x i32]** [[E]], align 8 2612 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2613 // CHECK9-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8 2614 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2615 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A2]], align 8 2616 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2617 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[TMP3]], align 8 2618 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 2619 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[B4]], align 4 2620 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[TMP6]], align 4 2621 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 2622 // CHECK9-NEXT: [[TMP9:%.*]] = load i32*, i32** [[C7]], align 8 2623 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 2624 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[TMP8]], align 8 2625 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 2626 // CHECK9-NEXT: [[TMP12:%.*]] = load [4 x i32]*, [4 x i32]** [[E]], align 8 2627 // CHECK9-NEXT: store [4 x i32]* [[TMP12]], [4 x i32]** [[TMP11]], align 8 2628 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 2629 // CHECK9-NEXT: ret void 2630 // 2631 // 2632 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 2633 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 2634 // CHECK9-NEXT: entry: 2635 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2636 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2637 // CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 2638 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4 2639 // CHECK9-NEXT: [[B:%.*]] = alloca i32, align 4 2640 // CHECK9-NEXT: [[C:%.*]] = alloca i32, align 4 2641 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2642 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 2643 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca [4 x i32]*, align 8 2644 // CHECK9-NEXT: [[E:%.*]] = alloca [4 x i32], align 16 2645 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca [4 x i32]*, align 8 2646 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2647 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2648 // CHECK9-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 2649 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 2650 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 2651 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 2652 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 2653 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 2654 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 2655 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 2 2656 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2657 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[B]], align 4 2658 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 3 2659 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 8 2660 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[C]], align 4 2661 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 4 2662 // CHECK9-NEXT: [[TMP10:%.*]] = load [4 x i32]*, [4 x i32]** [[TMP9]], align 8 2663 // CHECK9-NEXT: store i32* [[A]], i32** [[TMP]], align 8 2664 // CHECK9-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 2665 // CHECK9-NEXT: store [4 x i32]* [[TMP10]], [4 x i32]** [[_TMP2]], align 8 2666 // CHECK9-NEXT: [[TMP11:%.*]] = load [4 x i32]*, [4 x i32]** [[_TMP2]], align 8 2667 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [4 x i32]* [[E]] to i8* 2668 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast [4 x i32]* [[TMP11]] to i8* 2669 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP12]], i8* align 4 [[TMP13]], i64 16, i1 false) 2670 // CHECK9-NEXT: store [4 x i32]* [[E]], [4 x i32]** [[_TMP3]], align 8 2671 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP]], align 8 2672 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 2673 // CHECK9-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1 2674 // CHECK9-NEXT: store i32 [[INC]], i32* [[TMP14]], align 4 2675 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[B]], align 4 2676 // CHECK9-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP16]], -1 2677 // CHECK9-NEXT: store i32 [[DEC]], i32* [[B]], align 4 2678 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[_TMP1]], align 8 2679 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 2680 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP18]], 1 2681 // CHECK9-NEXT: store i32 [[DIV]], i32* [[TMP17]], align 4 2682 // CHECK9-NEXT: [[TMP19:%.*]] = load [4 x i32]*, [4 x i32]** [[_TMP3]], align 8 2683 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[TMP19]], i64 0, i64 2 2684 // CHECK9-NEXT: store i32 1111, i32* [[ARRAYIDX]], align 4 2685 // CHECK9-NEXT: ret void 2686 // 2687 // 2688 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2689 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2690 // CHECK9-NEXT: entry: 2691 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2692 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2693 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2694 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2695 // CHECK9-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 2696 // CHECK9-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 2697 // CHECK9-NEXT: store float [[CONV]], float* [[F]], align 4 2698 // CHECK9-NEXT: ret void 2699 // 2700 // 2701 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2702 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2703 // CHECK9-NEXT: entry: 2704 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2705 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2706 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2707 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2708 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2709 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2710 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2711 // CHECK9-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 2712 // CHECK9-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 2713 // CHECK9-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 2714 // CHECK9-NEXT: store float [[ADD]], float* [[F]], align 4 2715 // CHECK9-NEXT: ret void 2716 // 2717 // 2718 // CHECK9-LABEL: define {{[^@]+}}@_ZN2StC2Ev 2719 // CHECK9-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2720 // CHECK9-NEXT: entry: 2721 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 2722 // CHECK9-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 2723 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 2724 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[THIS1]], i32 0, i32 0 2725 // CHECK9-NEXT: store i32 0, i32* [[A]], align 4 2726 // CHECK9-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 1 2727 // CHECK9-NEXT: store i32 0, i32* [[B]], align 4 2728 // CHECK9-NEXT: ret void 2729 // 2730 // 2731 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2ERKS0_2St 2732 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2733 // CHECK9-NEXT: entry: 2734 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2735 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca %struct.S*, align 8 2736 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2737 // CHECK9-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 8 2738 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2739 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2740 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 8 2741 // CHECK9-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP0]], i32 0, i32 0 2742 // CHECK9-NEXT: [[TMP1:%.*]] = load float, float* [[F2]], align 4 2743 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[T]], i32 0, i32 0 2744 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 2745 // CHECK9-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP2]] to float 2746 // CHECK9-NEXT: [[ADD:%.*]] = fadd float [[TMP1]], [[CONV]] 2747 // CHECK9-NEXT: store float [[ADD]], float* [[F]], align 4 2748 // CHECK9-NEXT: ret void 2749 // 2750 // 2751 // CHECK9-LABEL: define {{[^@]+}}@_ZN2StD2Ev 2752 // CHECK9-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2753 // CHECK9-NEXT: entry: 2754 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 2755 // CHECK9-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 2756 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 2757 // CHECK9-NEXT: ret void 2758 // 2759 // 2760 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2761 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2762 // CHECK9-NEXT: entry: 2763 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2764 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2765 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2766 // CHECK9-NEXT: ret void 2767 // 2768 // 2769 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2770 // CHECK9-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2771 // CHECK9-NEXT: entry: 2772 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 2773 // CHECK9-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 2774 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 2775 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]]) 2776 // CHECK9-NEXT: ret void 2777 // 2778 // 2779 // CHECK9-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 2780 // CHECK9-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2781 // CHECK9-NEXT: entry: 2782 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 2783 // CHECK9-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 2784 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 2785 // CHECK9-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 2786 // CHECK9-NEXT: ret void 2787 // 2788 // 2789 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2790 // CHECK9-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2791 // CHECK9-NEXT: entry: 2792 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 2793 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2794 // CHECK9-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 2795 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2796 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 2797 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2798 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 2799 // CHECK9-NEXT: ret void 2800 // 2801 // 2802 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 2803 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 2804 // CHECK9-NEXT: entry: 2805 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2806 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2807 // CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 2808 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 2809 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 2810 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.2], align 128 2811 // CHECK9-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 2812 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_2:%.*]], align 128 2813 // CHECK9-NEXT: [[AGG_TMP2:%.*]] = alloca [[STRUCT_ST]], align 4 2814 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2815 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2816 // CHECK9-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 2817 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 2818 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 2819 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 8 2820 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 2821 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 2822 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 2823 // CHECK9-NEXT: [[TMP6:%.*]] = load [2 x %struct.S.2]*, [2 x %struct.S.2]** [[TMP5]], align 8 2824 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 2825 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S.2*, %struct.S.2** [[TMP7]], align 8 2826 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP4]], align 128 2827 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[T_VAR]], align 128 2828 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2829 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast [2 x i32]* [[TMP2]] to i8* 2830 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP10]], i8* align 128 [[TMP11]], i64 8, i1 false) 2831 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 2832 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [2 x %struct.S.2]* [[TMP6]] to %struct.S.2* 2833 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr [[STRUCT_S_2]], %struct.S.2* [[ARRAY_BEGIN]], i64 2 2834 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.2* [[ARRAY_BEGIN]], [[TMP13]] 2835 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE1:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2836 // CHECK9: omp.arraycpy.body: 2837 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.2* [ [[TMP12]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2838 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.2* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2839 // CHECK9-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) 2840 // CHECK9-NEXT: call void @_ZN1SIiEC1ERKS0_2St(%struct.S.2* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.2* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], %struct.St* [[AGG_TMP]]) 2841 // CHECK9-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]] 2842 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_2]], %struct.S.2* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2843 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_2]], %struct.S.2* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2844 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.2* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP13]] 2845 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE1]], label [[OMP_ARRAYCPY_BODY]] 2846 // CHECK9: omp.arraycpy.done1: 2847 // CHECK9-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) 2848 // CHECK9-NEXT: call void @_ZN1SIiEC1ERKS0_2St(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]], %struct.S.2* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.St* [[AGG_TMP2]]) 2849 // CHECK9-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) #[[ATTR4]] 2850 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR]], align 128 2851 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 2852 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 128 2853 // CHECK9-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i64 0, i64 0 2854 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S.2* [[ARRAYIDX3]] to i8* 2855 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast %struct.S.2* [[VAR]] to i8* 2856 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP15]], i8* align 128 [[TMP16]], i64 4, i1 false) 2857 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2858 // CHECK9-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 2859 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAY_BEGIN4]], i64 2 2860 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2861 // CHECK9: arraydestroy.body: 2862 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.2* [ [[TMP17]], [[OMP_ARRAYCPY_DONE1]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2863 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2864 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2865 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.2* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 2866 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 2867 // CHECK9: arraydestroy.done5: 2868 // CHECK9-NEXT: ret void 2869 // 2870 // 2871 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_2St 2872 // CHECK9-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.2* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2873 // CHECK9-NEXT: entry: 2874 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 2875 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca %struct.S.2*, align 8 2876 // CHECK9-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 2877 // CHECK9-NEXT: store %struct.S.2* [[S]], %struct.S.2** [[S_ADDR]], align 8 2878 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 2879 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S.2*, %struct.S.2** [[S_ADDR]], align 8 2880 // CHECK9-NEXT: call void @_ZN1SIiEC2ERKS0_2St(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]], %struct.S.2* nonnull align 4 dereferenceable(4) [[TMP0]], %struct.St* [[T]]) 2881 // CHECK9-NEXT: ret void 2882 // 2883 // 2884 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2885 // CHECK9-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2886 // CHECK9-NEXT: entry: 2887 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 2888 // CHECK9-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 2889 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 2890 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2891 // CHECK9-NEXT: ret void 2892 // 2893 // 2894 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 2895 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 2896 // CHECK9-NEXT: entry: 2897 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2898 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2899 // CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 8 2900 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 2901 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2902 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2903 // CHECK9-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 8 2904 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 8 2905 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 2906 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8 2907 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 128 2908 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[T_VAR]], align 128 2909 // CHECK9-NEXT: ret void 2910 // 2911 // 2912 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2913 // CHECK9-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2914 // CHECK9-NEXT: entry: 2915 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 2916 // CHECK9-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 2917 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 2918 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_2:%.*]], %struct.S.2* [[THIS1]], i32 0, i32 0 2919 // CHECK9-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 2920 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2921 // CHECK9-NEXT: ret void 2922 // 2923 // 2924 // CHECK9-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 2925 // CHECK9-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2926 // CHECK9-NEXT: entry: 2927 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 2928 // CHECK9-NEXT: [[A2:%.*]] = alloca i32*, align 8 2929 // CHECK9-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 2930 // CHECK9-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 2931 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 2932 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 2933 // CHECK9-NEXT: store i32 0, i32* [[A]], align 4 2934 // CHECK9-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SST]], %struct.SST* [[THIS1]], i32 0, i32 0 2935 // CHECK9-NEXT: store i32* [[A3]], i32** [[A2]], align 8 2936 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2937 // CHECK9-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP0]], align 8 2938 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2939 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8 2940 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2941 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[TMP1]], align 8 2942 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 2943 // CHECK9-NEXT: ret void 2944 // 2945 // 2946 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5 2947 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 2948 // CHECK9-NEXT: entry: 2949 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2950 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2951 // CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 8 2952 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4 2953 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2954 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2955 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2956 // CHECK9-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 8 2957 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 8 2958 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 2959 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.SST*, %struct.SST** [[TMP1]], align 8 2960 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 2961 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 2962 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 2963 // CHECK9-NEXT: store i32* [[A]], i32** [[TMP]], align 8 2964 // CHECK9-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP]], align 8 2965 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2966 // CHECK9-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 2967 // CHECK9-NEXT: store i32 [[INC]], i32* [[TMP5]], align 4 2968 // CHECK9-NEXT: ret void 2969 // 2970 // 2971 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2972 // CHECK9-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2973 // CHECK9-NEXT: entry: 2974 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 2975 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2976 // CHECK9-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 2977 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2978 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 2979 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_2:%.*]], %struct.S.2* [[THIS1]], i32 0, i32 0 2980 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2981 // CHECK9-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 2982 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 2983 // CHECK9-NEXT: store i32 [[ADD]], i32* [[F]], align 4 2984 // CHECK9-NEXT: ret void 2985 // 2986 // 2987 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_2St 2988 // CHECK9-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.2* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2989 // CHECK9-NEXT: entry: 2990 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 2991 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca %struct.S.2*, align 8 2992 // CHECK9-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 2993 // CHECK9-NEXT: store %struct.S.2* [[S]], %struct.S.2** [[S_ADDR]], align 8 2994 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 2995 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_2:%.*]], %struct.S.2* [[THIS1]], i32 0, i32 0 2996 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S.2*, %struct.S.2** [[S_ADDR]], align 8 2997 // CHECK9-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[TMP0]], i32 0, i32 0 2998 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[F2]], align 4 2999 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[T]], i32 0, i32 0 3000 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 3001 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]] 3002 // CHECK9-NEXT: store i32 [[ADD]], i32* [[F]], align 4 3003 // CHECK9-NEXT: ret void 3004 // 3005 // 3006 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3007 // CHECK9-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3008 // CHECK9-NEXT: entry: 3009 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 3010 // CHECK9-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 3011 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 3012 // CHECK9-NEXT: ret void 3013 // 3014 // 3015 // CHECK10-LABEL: define {{[^@]+}}@main 3016 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 3017 // CHECK10-NEXT: entry: 3018 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3019 // CHECK10-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 3020 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3021 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3022 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3023 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3024 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 3025 // CHECK10-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 3026 // CHECK10-NEXT: [[A:%.*]] = alloca i32, align 4 3027 // CHECK10-NEXT: [[OMP_OUTLINED_ARG_AGG_1:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 4 3028 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 3029 // CHECK10-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(32) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 3030 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3031 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 3032 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3033 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3034 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3035 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3036 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3037 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3038 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 3039 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3040 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP1]], align 8 3041 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3042 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR]], align 4 3043 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP2]], align 8 3044 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 3045 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP4]], align 8 3046 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 3047 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[TMP5]], align 8 3048 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 3049 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 3050 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[TMP6]], align 8 3051 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 3052 // CHECK10-NEXT: store i32 0, i32* [[A]], align 4 3053 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 0 3054 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4 3055 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 4 3056 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_1]]) 3057 // CHECK10-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 3058 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3059 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4:[0-9]+]] 3060 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3061 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3062 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3063 // CHECK10: arraydestroy.body: 3064 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP10]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3065 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3066 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3067 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3068 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3069 // CHECK10: arraydestroy.done2: 3070 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3071 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 3072 // CHECK10-NEXT: ret i32 [[TMP11]] 3073 // 3074 // 3075 // CHECK10-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 3076 // CHECK10-SAME: (%struct.SS* nonnull align 8 dereferenceable(32) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3077 // CHECK10-NEXT: entry: 3078 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3079 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3080 // CHECK10-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3081 // CHECK10-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3082 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3083 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3084 // CHECK10-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(32) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 3085 // CHECK10-NEXT: ret void 3086 // 3087 // 3088 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3089 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3090 // CHECK10-NEXT: entry: 3091 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3092 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3093 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3094 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3095 // CHECK10-NEXT: ret void 3096 // 3097 // 3098 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3099 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3100 // CHECK10-NEXT: entry: 3101 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3102 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3103 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3104 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3105 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3106 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3107 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3108 // CHECK10-NEXT: ret void 3109 // 3110 // 3111 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 3112 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { 3113 // CHECK10-NEXT: entry: 3114 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3115 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3116 // CHECK10-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 3117 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3118 // CHECK10-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 3119 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3120 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3121 // CHECK10-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 3122 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3123 // CHECK10-NEXT: [[AGG_TMP2:%.*]] = alloca [[STRUCT_ST]], align 4 3124 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3125 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3126 // CHECK10-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 3127 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 3128 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 3129 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 8 3130 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 1 3131 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 3132 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[T_VAR]], align 4 3133 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 3 3134 // CHECK10-NEXT: [[TMP6:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP5]], align 8 3135 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 4 3136 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP7]], align 8 3137 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 5 3138 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 8 3139 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[SIVAR]], align 4 3140 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3141 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast [2 x i32]* [[TMP2]] to i8* 3142 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 8, i1 false) 3143 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3144 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast [2 x %struct.S]* [[TMP6]] to %struct.S* 3145 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3146 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP14]] 3147 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE1:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3148 // CHECK10: omp.arraycpy.body: 3149 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3150 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3151 // CHECK10-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) 3152 // CHECK10-NEXT: call void @_ZN1SIfEC1ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], %struct.St* [[AGG_TMP]]) 3153 // CHECK10-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]] 3154 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3155 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3156 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]] 3157 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE1]], label [[OMP_ARRAYCPY_BODY]] 3158 // CHECK10: omp.arraycpy.done1: 3159 // CHECK10-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) 3160 // CHECK10-NEXT: call void @_ZN1SIfEC1ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.St* [[AGG_TMP2]]) 3161 // CHECK10-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) #[[ATTR4]] 3162 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR]], align 4 3163 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 3164 // CHECK10-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4 3165 // CHECK10-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3166 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX3]] to i8* 3167 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[VAR]] to i8* 3168 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false) 3169 // CHECK10-NEXT: store i32 2, i32* [[SIVAR]], align 4 3170 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3171 // CHECK10-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3172 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i64 2 3173 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3174 // CHECK10: arraydestroy.body: 3175 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP18]], [[OMP_ARRAYCPY_DONE1]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3176 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3177 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3178 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 3179 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 3180 // CHECK10: arraydestroy.done5: 3181 // CHECK10-NEXT: ret void 3182 // 3183 // 3184 // CHECK10-LABEL: define {{[^@]+}}@_ZN2StC1Ev 3185 // CHECK10-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3186 // CHECK10-NEXT: entry: 3187 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 3188 // CHECK10-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 3189 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 3190 // CHECK10-NEXT: call void @_ZN2StC2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) 3191 // CHECK10-NEXT: ret void 3192 // 3193 // 3194 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1ERKS0_2St 3195 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3196 // CHECK10-NEXT: entry: 3197 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3198 // CHECK10-NEXT: [[S_ADDR:%.*]] = alloca %struct.S*, align 8 3199 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3200 // CHECK10-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 8 3201 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3202 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 8 3203 // CHECK10-NEXT: call void @_ZN1SIfEC2ERKS0_2St(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP0]], %struct.St* [[T]]) 3204 // CHECK10-NEXT: ret void 3205 // 3206 // 3207 // CHECK10-LABEL: define {{[^@]+}}@_ZN2StD1Ev 3208 // CHECK10-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3209 // CHECK10-NEXT: entry: 3210 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 3211 // CHECK10-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 3212 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 3213 // CHECK10-NEXT: call void @_ZN2StD2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR4]] 3214 // CHECK10-NEXT: ret void 3215 // 3216 // 3217 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3218 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3219 // CHECK10-NEXT: entry: 3220 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3221 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3222 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3223 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3224 // CHECK10-NEXT: ret void 3225 // 3226 // 3227 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 3228 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 3229 // CHECK10-NEXT: entry: 3230 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3231 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3232 // CHECK10-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 3233 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3234 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3235 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3236 // CHECK10-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 3237 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 3238 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 3239 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3240 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[T_VAR]], align 4 3241 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3242 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3243 // CHECK10-NEXT: [[DOTT_VAR__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP4]], i64 4, i8* inttoptr (i64 1 to i8*)) 3244 // CHECK10-NEXT: [[DOTT_VAR__ADDR:%.*]] = bitcast i8* [[DOTT_VAR__VOID_ADDR]] to i32* 3245 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR]], align 4 3246 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTT_VAR__ADDR]], align 4 3247 // CHECK10-NEXT: store i32 0, i32* [[DOTT_VAR__ADDR]], align 4 3248 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTT_VAR__ADDR]] to i8* 3249 // CHECK10-NEXT: call void @__kmpc_free(i32 [[TMP4]], i8* [[TMP6]], i8* inttoptr (i64 1 to i8*)) 3250 // CHECK10-NEXT: ret void 3251 // 3252 // 3253 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3254 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 3255 // CHECK10-NEXT: entry: 3256 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3257 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_2:%.*]], align 4 3258 // CHECK10-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 3259 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 3260 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 3261 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.2], align 128 3262 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_2]], align 128 3263 // CHECK10-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 8 3264 // CHECK10-NEXT: [[OMP_OUTLINED_ARG_AGG_1:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 3265 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[TEST]]) 3266 // CHECK10-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 3267 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 128 3268 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3269 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3270 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i64 0, i64 0 3271 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 3272 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAYINIT_BEGIN]], i64 1 3273 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 3274 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 3275 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3276 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP1]], align 8 3277 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3278 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 8 3279 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 3280 // CHECK10-NEXT: store [2 x %struct.S.2]* [[S_ARR]], [2 x %struct.S.2]** [[TMP3]], align 8 3281 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 3282 // CHECK10-NEXT: store %struct.S.2* [[VAR]], %struct.S.2** [[TMP4]], align 8 3283 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 3284 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 0 3285 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[TMP5]], align 8 3286 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_1]]) 3287 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 3288 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3289 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 3290 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAY_BEGIN]], i64 2 3291 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3292 // CHECK10: arraydestroy.body: 3293 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.2* [ [[TMP6]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3294 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3295 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3296 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.2* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3297 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3298 // CHECK10: arraydestroy.done2: 3299 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3300 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[RETVAL]], align 4 3301 // CHECK10-NEXT: ret i32 [[TMP7]] 3302 // 3303 // 3304 // CHECK10-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 3305 // CHECK10-SAME: (%struct.SS* nonnull align 8 dereferenceable(32) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3306 // CHECK10-NEXT: entry: 3307 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3308 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3309 // CHECK10-NEXT: [[A2:%.*]] = alloca i32*, align 8 3310 // CHECK10-NEXT: [[B4:%.*]] = alloca i32, align 4 3311 // CHECK10-NEXT: [[C7:%.*]] = alloca i32*, align 8 3312 // CHECK10-NEXT: [[E:%.*]] = alloca [4 x i32]*, align 8 3313 // CHECK10-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 3314 // CHECK10-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3315 // CHECK10-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3316 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3317 // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3318 // CHECK10-NEXT: store i32 0, i32* [[A]], align 8 3319 // CHECK10-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 3320 // CHECK10-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 3321 // CHECK10-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 3322 // CHECK10-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 3323 // CHECK10-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 3324 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3325 // CHECK10-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 3326 // CHECK10-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3327 // CHECK10-NEXT: store i32* [[A3]], i32** [[A2]], align 8 3328 // CHECK10-NEXT: [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 3329 // CHECK10-NEXT: [[BF_LOAD6:%.*]] = load i8, i8* [[B5]], align 4 3330 // CHECK10-NEXT: [[BF_SHL:%.*]] = shl i8 [[BF_LOAD6]], 4 3331 // CHECK10-NEXT: [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4 3332 // CHECK10-NEXT: [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32 3333 // CHECK10-NEXT: store i32 [[BF_CAST]], i32* [[B4]], align 4 3334 // CHECK10-NEXT: [[C8:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 3335 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C8]], align 8 3336 // CHECK10-NEXT: store i32* [[TMP1]], i32** [[C7]], align 8 3337 // CHECK10-NEXT: [[E9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 3338 // CHECK10-NEXT: store [4 x i32]* [[E9]], [4 x i32]** [[E]], align 8 3339 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3340 // CHECK10-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8 3341 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3342 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A2]], align 8 3343 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 3344 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[TMP3]], align 8 3345 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 3346 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[B4]], align 4 3347 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[TMP6]], align 4 3348 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 3349 // CHECK10-NEXT: [[TMP9:%.*]] = load i32*, i32** [[C7]], align 8 3350 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 3351 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[TMP8]], align 8 3352 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 3353 // CHECK10-NEXT: [[TMP12:%.*]] = load [4 x i32]*, [4 x i32]** [[E]], align 8 3354 // CHECK10-NEXT: store [4 x i32]* [[TMP12]], [4 x i32]** [[TMP11]], align 8 3355 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 3356 // CHECK10-NEXT: ret void 3357 // 3358 // 3359 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 3360 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 3361 // CHECK10-NEXT: entry: 3362 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3363 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3364 // CHECK10-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 3365 // CHECK10-NEXT: [[A:%.*]] = alloca i32, align 4 3366 // CHECK10-NEXT: [[B:%.*]] = alloca i32, align 4 3367 // CHECK10-NEXT: [[C:%.*]] = alloca i32, align 4 3368 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3369 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 3370 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca [4 x i32]*, align 8 3371 // CHECK10-NEXT: [[E:%.*]] = alloca [4 x i32], align 16 3372 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca [4 x i32]*, align 8 3373 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3374 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3375 // CHECK10-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 3376 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 3377 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 3378 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 3379 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 3380 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 3381 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 3382 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 2 3383 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3384 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[B]], align 4 3385 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 3 3386 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 8 3387 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[C]], align 4 3388 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 4 3389 // CHECK10-NEXT: [[TMP10:%.*]] = load [4 x i32]*, [4 x i32]** [[TMP9]], align 8 3390 // CHECK10-NEXT: store i32* [[A]], i32** [[TMP]], align 8 3391 // CHECK10-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 3392 // CHECK10-NEXT: store [4 x i32]* [[TMP10]], [4 x i32]** [[_TMP2]], align 8 3393 // CHECK10-NEXT: [[TMP11:%.*]] = load [4 x i32]*, [4 x i32]** [[_TMP2]], align 8 3394 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast [4 x i32]* [[E]] to i8* 3395 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast [4 x i32]* [[TMP11]] to i8* 3396 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP12]], i8* align 4 [[TMP13]], i64 16, i1 false) 3397 // CHECK10-NEXT: store [4 x i32]* [[E]], [4 x i32]** [[_TMP3]], align 8 3398 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP]], align 8 3399 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 3400 // CHECK10-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1 3401 // CHECK10-NEXT: store i32 [[INC]], i32* [[TMP14]], align 4 3402 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[B]], align 4 3403 // CHECK10-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP16]], -1 3404 // CHECK10-NEXT: store i32 [[DEC]], i32* [[B]], align 4 3405 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[_TMP1]], align 8 3406 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 3407 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP18]], 1 3408 // CHECK10-NEXT: store i32 [[DIV]], i32* [[TMP17]], align 4 3409 // CHECK10-NEXT: [[TMP19:%.*]] = load [4 x i32]*, [4 x i32]** [[_TMP3]], align 8 3410 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[TMP19]], i64 0, i64 2 3411 // CHECK10-NEXT: store i32 1111, i32* [[ARRAYIDX]], align 4 3412 // CHECK10-NEXT: ret void 3413 // 3414 // 3415 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3416 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3417 // CHECK10-NEXT: entry: 3418 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3419 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3420 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3421 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3422 // CHECK10-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 3423 // CHECK10-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 3424 // CHECK10-NEXT: store float [[CONV]], float* [[F]], align 4 3425 // CHECK10-NEXT: ret void 3426 // 3427 // 3428 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3429 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3430 // CHECK10-NEXT: entry: 3431 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3432 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3433 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3434 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3435 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3436 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3437 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3438 // CHECK10-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 3439 // CHECK10-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 3440 // CHECK10-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 3441 // CHECK10-NEXT: store float [[ADD]], float* [[F]], align 4 3442 // CHECK10-NEXT: ret void 3443 // 3444 // 3445 // CHECK10-LABEL: define {{[^@]+}}@_ZN2StC2Ev 3446 // CHECK10-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3447 // CHECK10-NEXT: entry: 3448 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 3449 // CHECK10-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 3450 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 3451 // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[THIS1]], i32 0, i32 0 3452 // CHECK10-NEXT: store i32 0, i32* [[A]], align 4 3453 // CHECK10-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 1 3454 // CHECK10-NEXT: store i32 0, i32* [[B]], align 4 3455 // CHECK10-NEXT: ret void 3456 // 3457 // 3458 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2ERKS0_2St 3459 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3460 // CHECK10-NEXT: entry: 3461 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3462 // CHECK10-NEXT: [[S_ADDR:%.*]] = alloca %struct.S*, align 8 3463 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3464 // CHECK10-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 8 3465 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3466 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3467 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 8 3468 // CHECK10-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP0]], i32 0, i32 0 3469 // CHECK10-NEXT: [[TMP1:%.*]] = load float, float* [[F2]], align 4 3470 // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[T]], i32 0, i32 0 3471 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 3472 // CHECK10-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP2]] to float 3473 // CHECK10-NEXT: [[ADD:%.*]] = fadd float [[TMP1]], [[CONV]] 3474 // CHECK10-NEXT: store float [[ADD]], float* [[F]], align 4 3475 // CHECK10-NEXT: ret void 3476 // 3477 // 3478 // CHECK10-LABEL: define {{[^@]+}}@_ZN2StD2Ev 3479 // CHECK10-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3480 // CHECK10-NEXT: entry: 3481 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 3482 // CHECK10-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 3483 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 3484 // CHECK10-NEXT: ret void 3485 // 3486 // 3487 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3488 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3489 // CHECK10-NEXT: entry: 3490 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3491 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3492 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3493 // CHECK10-NEXT: ret void 3494 // 3495 // 3496 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3497 // CHECK10-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3498 // CHECK10-NEXT: entry: 3499 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 3500 // CHECK10-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 3501 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 3502 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]]) 3503 // CHECK10-NEXT: ret void 3504 // 3505 // 3506 // CHECK10-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 3507 // CHECK10-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3508 // CHECK10-NEXT: entry: 3509 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 3510 // CHECK10-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 3511 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 3512 // CHECK10-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 3513 // CHECK10-NEXT: ret void 3514 // 3515 // 3516 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3517 // CHECK10-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3518 // CHECK10-NEXT: entry: 3519 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 3520 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3521 // CHECK10-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 3522 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3523 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 3524 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3525 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 3526 // CHECK10-NEXT: ret void 3527 // 3528 // 3529 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 3530 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 3531 // CHECK10-NEXT: entry: 3532 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3533 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3534 // CHECK10-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 3535 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 3536 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 3537 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.2], align 128 3538 // CHECK10-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 3539 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_2:%.*]], align 128 3540 // CHECK10-NEXT: [[AGG_TMP2:%.*]] = alloca [[STRUCT_ST]], align 4 3541 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3542 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3543 // CHECK10-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 3544 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 3545 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 3546 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 8 3547 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 3548 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 3549 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 3550 // CHECK10-NEXT: [[TMP6:%.*]] = load [2 x %struct.S.2]*, [2 x %struct.S.2]** [[TMP5]], align 8 3551 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 3552 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S.2*, %struct.S.2** [[TMP7]], align 8 3553 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP4]], align 128 3554 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[T_VAR]], align 128 3555 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3556 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast [2 x i32]* [[TMP2]] to i8* 3557 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP10]], i8* align 128 [[TMP11]], i64 8, i1 false) 3558 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 3559 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast [2 x %struct.S.2]* [[TMP6]] to %struct.S.2* 3560 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr [[STRUCT_S_2]], %struct.S.2* [[ARRAY_BEGIN]], i64 2 3561 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.2* [[ARRAY_BEGIN]], [[TMP13]] 3562 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE1:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3563 // CHECK10: omp.arraycpy.body: 3564 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.2* [ [[TMP12]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3565 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.2* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3566 // CHECK10-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) 3567 // CHECK10-NEXT: call void @_ZN1SIiEC1ERKS0_2St(%struct.S.2* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.2* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], %struct.St* [[AGG_TMP]]) 3568 // CHECK10-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP]]) #[[ATTR4]] 3569 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_2]], %struct.S.2* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3570 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_2]], %struct.S.2* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3571 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.2* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP13]] 3572 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE1]], label [[OMP_ARRAYCPY_BODY]] 3573 // CHECK10: omp.arraycpy.done1: 3574 // CHECK10-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) 3575 // CHECK10-NEXT: call void @_ZN1SIiEC1ERKS0_2St(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]], %struct.S.2* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.St* [[AGG_TMP2]]) 3576 // CHECK10-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[AGG_TMP2]]) #[[ATTR4]] 3577 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR]], align 128 3578 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 3579 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 128 3580 // CHECK10-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i64 0, i64 0 3581 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S.2* [[ARRAYIDX3]] to i8* 3582 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast %struct.S.2* [[VAR]] to i8* 3583 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP15]], i8* align 128 [[TMP16]], i64 4, i1 false) 3584 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3585 // CHECK10-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.2], [2 x %struct.S.2]* [[S_ARR]], i32 0, i32 0 3586 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAY_BEGIN4]], i64 2 3587 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3588 // CHECK10: arraydestroy.body: 3589 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.2* [ [[TMP17]], [[OMP_ARRAYCPY_DONE1]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3590 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3591 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3592 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.2* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 3593 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 3594 // CHECK10: arraydestroy.done5: 3595 // CHECK10-NEXT: ret void 3596 // 3597 // 3598 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_2St 3599 // CHECK10-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.2* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3600 // CHECK10-NEXT: entry: 3601 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 3602 // CHECK10-NEXT: [[S_ADDR:%.*]] = alloca %struct.S.2*, align 8 3603 // CHECK10-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 3604 // CHECK10-NEXT: store %struct.S.2* [[S]], %struct.S.2** [[S_ADDR]], align 8 3605 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 3606 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.S.2*, %struct.S.2** [[S_ADDR]], align 8 3607 // CHECK10-NEXT: call void @_ZN1SIiEC2ERKS0_2St(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]], %struct.S.2* nonnull align 4 dereferenceable(4) [[TMP0]], %struct.St* [[T]]) 3608 // CHECK10-NEXT: ret void 3609 // 3610 // 3611 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3612 // CHECK10-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3613 // CHECK10-NEXT: entry: 3614 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 3615 // CHECK10-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 3616 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 3617 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3618 // CHECK10-NEXT: ret void 3619 // 3620 // 3621 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4 3622 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 3623 // CHECK10-NEXT: entry: 3624 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3625 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3626 // CHECK10-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 8 3627 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 3628 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3629 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3630 // CHECK10-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 8 3631 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 8 3632 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 3633 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8 3634 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 128 3635 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[T_VAR]], align 128 3636 // CHECK10-NEXT: ret void 3637 // 3638 // 3639 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3640 // CHECK10-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3641 // CHECK10-NEXT: entry: 3642 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 3643 // CHECK10-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 3644 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 3645 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_2:%.*]], %struct.S.2* [[THIS1]], i32 0, i32 0 3646 // CHECK10-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 3647 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3648 // CHECK10-NEXT: ret void 3649 // 3650 // 3651 // CHECK10-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 3652 // CHECK10-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3653 // CHECK10-NEXT: entry: 3654 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 3655 // CHECK10-NEXT: [[A2:%.*]] = alloca i32*, align 8 3656 // CHECK10-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 3657 // CHECK10-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 3658 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 3659 // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 3660 // CHECK10-NEXT: store i32 0, i32* [[A]], align 4 3661 // CHECK10-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SST]], %struct.SST* [[THIS1]], i32 0, i32 0 3662 // CHECK10-NEXT: store i32* [[A3]], i32** [[A2]], align 8 3663 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3664 // CHECK10-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP0]], align 8 3665 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3666 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8 3667 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3668 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP1]], align 8 3669 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 3670 // CHECK10-NEXT: ret void 3671 // 3672 // 3673 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5 3674 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 3675 // CHECK10-NEXT: entry: 3676 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3677 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3678 // CHECK10-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 8 3679 // CHECK10-NEXT: [[A:%.*]] = alloca i32, align 4 3680 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3681 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3682 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3683 // CHECK10-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 8 3684 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 8 3685 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 3686 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.SST*, %struct.SST** [[TMP1]], align 8 3687 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 3688 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 3689 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 3690 // CHECK10-NEXT: store i32* [[A]], i32** [[TMP]], align 8 3691 // CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP]], align 8 3692 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3693 // CHECK10-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 3694 // CHECK10-NEXT: store i32 [[INC]], i32* [[TMP5]], align 4 3695 // CHECK10-NEXT: ret void 3696 // 3697 // 3698 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3699 // CHECK10-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3700 // CHECK10-NEXT: entry: 3701 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 3702 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3703 // CHECK10-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 3704 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3705 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 3706 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_2:%.*]], %struct.S.2* [[THIS1]], i32 0, i32 0 3707 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3708 // CHECK10-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 3709 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 3710 // CHECK10-NEXT: store i32 [[ADD]], i32* [[F]], align 4 3711 // CHECK10-NEXT: ret void 3712 // 3713 // 3714 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_2St 3715 // CHECK10-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.2* nonnull align 4 dereferenceable(4) [[S:%.*]], %struct.St* [[T:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3716 // CHECK10-NEXT: entry: 3717 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 3718 // CHECK10-NEXT: [[S_ADDR:%.*]] = alloca %struct.S.2*, align 8 3719 // CHECK10-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 3720 // CHECK10-NEXT: store %struct.S.2* [[S]], %struct.S.2** [[S_ADDR]], align 8 3721 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 3722 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_2:%.*]], %struct.S.2* [[THIS1]], i32 0, i32 0 3723 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.S.2*, %struct.S.2** [[S_ADDR]], align 8 3724 // CHECK10-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S_2]], %struct.S.2* [[TMP0]], i32 0, i32 0 3725 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[F2]], align 4 3726 // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[T]], i32 0, i32 0 3727 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 3728 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]] 3729 // CHECK10-NEXT: store i32 [[ADD]], i32* [[F]], align 4 3730 // CHECK10-NEXT: ret void 3731 // 3732 // 3733 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3734 // CHECK10-SAME: (%struct.S.2* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3735 // CHECK10-NEXT: entry: 3736 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.2*, align 8 3737 // CHECK10-NEXT: store %struct.S.2* [[THIS]], %struct.S.2** [[THIS_ADDR]], align 8 3738 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.2*, %struct.S.2** [[THIS_ADDR]], align 8 3739 // CHECK10-NEXT: ret void 3740 // 3741 // 3742 // CHECK11-LABEL: define {{[^@]+}}@main 3743 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 3744 // CHECK11-NEXT: entry: 3745 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3746 // CHECK11-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 3747 // CHECK11-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 3748 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 3749 // CHECK11-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(32) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 3750 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 3751 // CHECK11-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP0]], align 8 3752 // CHECK11-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(8) [[REF_TMP]]) 3753 // CHECK11-NEXT: ret i32 0 3754 // 3755 // 3756 // CHECK11-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 3757 // CHECK11-SAME: (%struct.SS* nonnull align 8 dereferenceable(32) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3758 // CHECK11-NEXT: entry: 3759 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3760 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3761 // CHECK11-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3762 // CHECK11-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3763 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3764 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3765 // CHECK11-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(32) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 3766 // CHECK11-NEXT: ret void 3767 // 3768 // 3769 // CHECK11-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 3770 // CHECK11-SAME: (%struct.SS* nonnull align 8 dereferenceable(32) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3771 // CHECK11-NEXT: entry: 3772 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3773 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3774 // CHECK11-NEXT: [[A2:%.*]] = alloca i32*, align 8 3775 // CHECK11-NEXT: [[B4:%.*]] = alloca i32, align 4 3776 // CHECK11-NEXT: [[C7:%.*]] = alloca i32*, align 8 3777 // CHECK11-NEXT: [[E:%.*]] = alloca [4 x i32]*, align 8 3778 // CHECK11-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 3779 // CHECK11-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3780 // CHECK11-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3781 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3782 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3783 // CHECK11-NEXT: store i32 0, i32* [[A]], align 8 3784 // CHECK11-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 3785 // CHECK11-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 3786 // CHECK11-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 3787 // CHECK11-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 3788 // CHECK11-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 3789 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3790 // CHECK11-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 3791 // CHECK11-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3792 // CHECK11-NEXT: store i32* [[A3]], i32** [[A2]], align 8 3793 // CHECK11-NEXT: [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 3794 // CHECK11-NEXT: [[BF_LOAD6:%.*]] = load i8, i8* [[B5]], align 4 3795 // CHECK11-NEXT: [[BF_SHL:%.*]] = shl i8 [[BF_LOAD6]], 4 3796 // CHECK11-NEXT: [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4 3797 // CHECK11-NEXT: [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32 3798 // CHECK11-NEXT: store i32 [[BF_CAST]], i32* [[B4]], align 4 3799 // CHECK11-NEXT: [[C8:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 3800 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C8]], align 8 3801 // CHECK11-NEXT: store i32* [[TMP1]], i32** [[C7]], align 8 3802 // CHECK11-NEXT: [[E9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 3803 // CHECK11-NEXT: store [4 x i32]* [[E9]], [4 x i32]** [[E]], align 8 3804 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3805 // CHECK11-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8 3806 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3807 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A2]], align 8 3808 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 3809 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP3]], align 8 3810 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 3811 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[B4]], align 4 3812 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP6]], align 4 3813 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 3814 // CHECK11-NEXT: [[TMP9:%.*]] = load i32*, i32** [[C7]], align 8 3815 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 3816 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[TMP8]], align 8 3817 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 3818 // CHECK11-NEXT: [[TMP12:%.*]] = load [4 x i32]*, [4 x i32]** [[E]], align 8 3819 // CHECK11-NEXT: store [4 x i32]* [[TMP12]], [4 x i32]** [[TMP11]], align 8 3820 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 3821 // CHECK11-NEXT: ret void 3822 // 3823 // 3824 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 3825 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { 3826 // CHECK11-NEXT: entry: 3827 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3828 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3829 // CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 3830 // CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4 3831 // CHECK11-NEXT: [[B:%.*]] = alloca i32, align 4 3832 // CHECK11-NEXT: [[C:%.*]] = alloca i32, align 4 3833 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3834 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 3835 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca [4 x i32]*, align 8 3836 // CHECK11-NEXT: [[E:%.*]] = alloca [4 x i32], align 16 3837 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca [4 x i32]*, align 8 3838 // CHECK11-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 3839 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3840 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3841 // CHECK11-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 3842 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 3843 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 3844 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 3845 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 1 3846 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 3847 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 3848 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 2 3849 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3850 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[B]], align 4 3851 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 3 3852 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 8 3853 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[C]], align 4 3854 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 4 3855 // CHECK11-NEXT: [[TMP10:%.*]] = load [4 x i32]*, [4 x i32]** [[TMP9]], align 8 3856 // CHECK11-NEXT: store i32* [[A]], i32** [[TMP]], align 8 3857 // CHECK11-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 3858 // CHECK11-NEXT: store [4 x i32]* [[TMP10]], [4 x i32]** [[_TMP2]], align 8 3859 // CHECK11-NEXT: [[TMP11:%.*]] = load [4 x i32]*, [4 x i32]** [[_TMP2]], align 8 3860 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast [4 x i32]* [[E]] to i8* 3861 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast [4 x i32]* [[TMP11]] to i8* 3862 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP12]], i8* align 4 [[TMP13]], i64 16, i1 false) 3863 // CHECK11-NEXT: store [4 x i32]* [[E]], [4 x i32]** [[_TMP3]], align 8 3864 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 3865 // CHECK11-NEXT: store %struct.SS* [[TMP2]], %struct.SS** [[TMP14]], align 8 3866 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 3867 // CHECK11-NEXT: [[TMP16:%.*]] = load i32*, i32** [[TMP]], align 8 3868 // CHECK11-NEXT: store i32* [[TMP16]], i32** [[TMP15]], align 8 3869 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 3870 // CHECK11-NEXT: store i32* [[B]], i32** [[TMP17]], align 8 3871 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 3872 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[_TMP1]], align 8 3873 // CHECK11-NEXT: store i32* [[TMP19]], i32** [[TMP18]], align 8 3874 // CHECK11-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 3875 // CHECK11-NEXT: ret void 3876 // 3877 // 3878 // CHECK11-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 3879 // CHECK11-SAME: (%class.anon.0* nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 3880 // CHECK11-NEXT: entry: 3881 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8 3882 // CHECK11-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 3883 // CHECK11-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8 3884 // CHECK11-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8 3885 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 3886 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 3887 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 3888 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 3889 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3890 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 3891 // CHECK11-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 3892 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 3893 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 3894 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3895 // CHECK11-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 3896 // CHECK11-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 3897 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 3898 // CHECK11-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 3899 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 3900 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 3901 // CHECK11-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 3902 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3903 // CHECK11-NEXT: store %struct.SS* [[TMP1]], %struct.SS** [[TMP11]], align 8 3904 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3905 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 3906 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP13]], align 8 3907 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 3908 // CHECK11-NEXT: store i32 [[TMP15]], i32* [[TMP12]], align 8 3909 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 3910 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 3911 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[TMP17]], align 8 3912 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 3913 // CHECK11-NEXT: store i32 [[TMP19]], i32* [[TMP16]], align 4 3914 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 3915 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 3916 // CHECK11-NEXT: [[TMP22:%.*]] = load i32*, i32** [[TMP21]], align 8 3917 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 3918 // CHECK11-NEXT: store i32 [[TMP23]], i32* [[TMP20]], align 8 3919 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 3920 // CHECK11-NEXT: ret void 3921 // 3922 // 3923 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 3924 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 3925 // CHECK11-NEXT: entry: 3926 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3927 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3928 // CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 3929 // CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4 3930 // CHECK11-NEXT: [[B:%.*]] = alloca i32, align 4 3931 // CHECK11-NEXT: [[C:%.*]] = alloca i32, align 4 3932 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3933 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 3934 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3935 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3936 // CHECK11-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 3937 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 3938 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 3939 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 3940 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 3941 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 3942 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 3943 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 2 3944 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3945 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[B]], align 4 3946 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 3 3947 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 8 3948 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[C]], align 4 3949 // CHECK11-NEXT: store i32* [[A]], i32** [[TMP]], align 8 3950 // CHECK11-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 3951 // CHECK11-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP]], align 8 3952 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 3953 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1 3954 // CHECK11-NEXT: store i32 [[INC]], i32* [[TMP9]], align 4 3955 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 3956 // CHECK11-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP11]], -1 3957 // CHECK11-NEXT: store i32 [[DEC]], i32* [[B]], align 4 3958 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[_TMP1]], align 8 3959 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 3960 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP13]], 1 3961 // CHECK11-NEXT: store i32 [[DIV]], i32* [[TMP12]], align 4 3962 // CHECK11-NEXT: ret void 3963 // 3964 // 3965 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 3966 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 3967 // CHECK11-NEXT: entry: 3968 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3969 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3970 // CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 3971 // CHECK11-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 3972 // CHECK11-NEXT: [[G:%.*]] = alloca i32, align 128 3973 // CHECK11-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_4:%.*]], align 8 3974 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3975 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3976 // CHECK11-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 3977 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 3978 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 3979 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8 3980 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 1 3981 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 3982 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[SIVAR]], align 4 3983 // CHECK11-NEXT: [[TMP5:%.*]] = load volatile i32, i32* [[TMP2]], align 128 3984 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[G]], align 128 3985 // CHECK11-NEXT: store i32 1, i32* [[G]], align 128 3986 // CHECK11-NEXT: store i32 2, i32* [[SIVAR]], align 4 3987 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 0 3988 // CHECK11-NEXT: store i32* [[G]], i32** [[TMP6]], align 8 3989 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 1 3990 // CHECK11-NEXT: store i32* [[SIVAR]], i32** [[TMP7]], align 8 3991 // CHECK11-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.4* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 3992 // CHECK11-NEXT: ret void 3993 // 3994 // 3995 // CHECK12-LABEL: define {{[^@]+}}@main 3996 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 3997 // CHECK12-NEXT: entry: 3998 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3999 // CHECK12-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 4000 // CHECK12-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, align 8 4001 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 4002 // CHECK12-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(32) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 4003 // CHECK12-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 0 4004 // CHECK12-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 4005 // CHECK12-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 1 4006 // CHECK12-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 4007 // CHECK12-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 2 4008 // CHECK12-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 4009 // CHECK12-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 3 4010 // CHECK12-NEXT: store i8* bitcast (void (i8*)* @__main_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8 4011 // CHECK12-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 4 4012 // CHECK12-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 4013 // CHECK12-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 5 4014 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 4015 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[BLOCK_CAPTURED]], align 8 4016 // CHECK12-NEXT: [[TMP1:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]] to void ()* 4017 // CHECK12-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP1]] to %struct.__block_literal_generic* 4018 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 4019 // CHECK12-NEXT: [[TMP3:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 4020 // CHECK12-NEXT: [[TMP4:%.*]] = load i8*, i8** [[TMP2]], align 8 4021 // CHECK12-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to void (i8*)* 4022 // CHECK12-NEXT: call void [[TMP5]](i8* [[TMP3]]) 4023 // CHECK12-NEXT: ret i32 0 4024 // 4025 // 4026 // CHECK12-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 4027 // CHECK12-SAME: (%struct.SS* nonnull align 8 dereferenceable(32) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4028 // CHECK12-NEXT: entry: 4029 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4030 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 4031 // CHECK12-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4032 // CHECK12-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 4033 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4034 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 4035 // CHECK12-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(32) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 4036 // CHECK12-NEXT: ret void 4037 // 4038 // 4039 // CHECK12-LABEL: define {{[^@]+}}@__main_block_invoke 4040 // CHECK12-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] { 4041 // CHECK12-NEXT: entry: 4042 // CHECK12-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 4043 // CHECK12-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>*, align 8 4044 // CHECK12-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 4045 // CHECK12-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 4046 // CHECK12-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* 4047 // CHECK12-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>** [[BLOCK_ADDR]], align 8 4048 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4049 // CHECK12-NEXT: store i32* @g, i32** [[TMP0]], align 8 4050 // CHECK12-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4051 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 4052 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 4053 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 4054 // CHECK12-NEXT: ret void 4055 // 4056 // 4057 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 4058 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] { 4059 // CHECK12-NEXT: entry: 4060 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4061 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4062 // CHECK12-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 4063 // CHECK12-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 4064 // CHECK12-NEXT: [[G:%.*]] = alloca i32, align 128 4065 // CHECK12-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, align 128 4066 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4067 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4068 // CHECK12-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 4069 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 4070 // CHECK12-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 4071 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8 4072 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 1 4073 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 4074 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[SIVAR]], align 4 4075 // CHECK12-NEXT: [[TMP5:%.*]] = load volatile i32, i32* [[TMP2]], align 128 4076 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[G]], align 128 4077 // CHECK12-NEXT: store i32 1, i32* [[G]], align 128 4078 // CHECK12-NEXT: store i32 2, i32* [[SIVAR]], align 4 4079 // CHECK12-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 0 4080 // CHECK12-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 128 4081 // CHECK12-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 1 4082 // CHECK12-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 4083 // CHECK12-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 2 4084 // CHECK12-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 4085 // CHECK12-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 3 4086 // CHECK12-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 16 4087 // CHECK12-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 4 4088 // CHECK12-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 4089 // CHECK12-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 7 4090 // CHECK12-NEXT: [[TMP6:%.*]] = load volatile i32, i32* [[G]], align 128 4091 // CHECK12-NEXT: store volatile i32 [[TMP6]], i32* [[BLOCK_CAPTURED]], align 128 4092 // CHECK12-NEXT: [[BLOCK_CAPTURED1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 5 4093 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[SIVAR]], align 4 4094 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[BLOCK_CAPTURED1]], align 32 4095 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]] to void ()* 4096 // CHECK12-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP8]] to %struct.__block_literal_generic* 4097 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 4098 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 4099 // CHECK12-NEXT: [[TMP11:%.*]] = load i8*, i8** [[TMP9]], align 8 4100 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to void (i8*)* 4101 // CHECK12-NEXT: call void [[TMP12]](i8* [[TMP10]]) 4102 // CHECK12-NEXT: ret void 4103 // 4104 // 4105 // CHECK12-LABEL: define {{[^@]+}}@g_block_invoke 4106 // CHECK12-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] { 4107 // CHECK12-NEXT: entry: 4108 // CHECK12-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 4109 // CHECK12-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>*, align 8 4110 // CHECK12-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 4111 // CHECK12-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* 4112 // CHECK12-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>** [[BLOCK_ADDR]], align 8 4113 // CHECK12-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 7 4114 // CHECK12-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 128 4115 // CHECK12-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 5 4116 // CHECK12-NEXT: store i32 4, i32* [[BLOCK_CAPTURE_ADDR1]], align 32 4117 // CHECK12-NEXT: ret void 4118 // 4119 // 4120 // CHECK12-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 4121 // CHECK12-SAME: (%struct.SS* nonnull align 8 dereferenceable(32) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4122 // CHECK12-NEXT: entry: 4123 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4124 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 4125 // CHECK12-NEXT: [[A2:%.*]] = alloca i32*, align 8 4126 // CHECK12-NEXT: [[B4:%.*]] = alloca i32, align 4 4127 // CHECK12-NEXT: [[C7:%.*]] = alloca i32*, align 8 4128 // CHECK12-NEXT: [[E:%.*]] = alloca [4 x i32]*, align 8 4129 // CHECK12-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 8 4130 // CHECK12-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4131 // CHECK12-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 4132 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4133 // CHECK12-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4134 // CHECK12-NEXT: store i32 0, i32* [[A]], align 8 4135 // CHECK12-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 4136 // CHECK12-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 4137 // CHECK12-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 4138 // CHECK12-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 4139 // CHECK12-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 4140 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 4141 // CHECK12-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 4142 // CHECK12-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4143 // CHECK12-NEXT: store i32* [[A3]], i32** [[A2]], align 8 4144 // CHECK12-NEXT: [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 4145 // CHECK12-NEXT: [[BF_LOAD6:%.*]] = load i8, i8* [[B5]], align 4 4146 // CHECK12-NEXT: [[BF_SHL:%.*]] = shl i8 [[BF_LOAD6]], 4 4147 // CHECK12-NEXT: [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4 4148 // CHECK12-NEXT: [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32 4149 // CHECK12-NEXT: store i32 [[BF_CAST]], i32* [[B4]], align 4 4150 // CHECK12-NEXT: [[C8:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 4151 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C8]], align 8 4152 // CHECK12-NEXT: store i32* [[TMP1]], i32** [[C7]], align 8 4153 // CHECK12-NEXT: [[E9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 4154 // CHECK12-NEXT: store [4 x i32]* [[E9]], [4 x i32]** [[E]], align 8 4155 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4156 // CHECK12-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8 4157 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4158 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A2]], align 8 4159 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 4160 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[TMP3]], align 8 4161 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 4162 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[B4]], align 4 4163 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[TMP6]], align 4 4164 // CHECK12-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 4165 // CHECK12-NEXT: [[TMP9:%.*]] = load i32*, i32** [[C7]], align 8 4166 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 4167 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[TMP8]], align 8 4168 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 4169 // CHECK12-NEXT: [[TMP12:%.*]] = load [4 x i32]*, [4 x i32]** [[E]], align 8 4170 // CHECK12-NEXT: store [4 x i32]* [[TMP12]], [4 x i32]** [[TMP11]], align 8 4171 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 4172 // CHECK12-NEXT: ret void 4173 // 4174 // 4175 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 4176 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 4177 // CHECK12-NEXT: entry: 4178 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4179 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4180 // CHECK12-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 4181 // CHECK12-NEXT: [[A:%.*]] = alloca i32, align 4 4182 // CHECK12-NEXT: [[B:%.*]] = alloca i32, align 4 4183 // CHECK12-NEXT: [[C:%.*]] = alloca i32, align 4 4184 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32*, align 8 4185 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 4186 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca [4 x i32]*, align 8 4187 // CHECK12-NEXT: [[E:%.*]] = alloca [4 x i32], align 16 4188 // CHECK12-NEXT: [[_TMP3:%.*]] = alloca [4 x i32]*, align 8 4189 // CHECK12-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, align 8 4190 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4191 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4192 // CHECK12-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 4193 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 4194 // CHECK12-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 4195 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 4196 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 1 4197 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 4198 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 4199 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 2 4200 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 4201 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[B]], align 4 4202 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 3 4203 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 8 4204 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[C]], align 4 4205 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 4 4206 // CHECK12-NEXT: [[TMP10:%.*]] = load [4 x i32]*, [4 x i32]** [[TMP9]], align 8 4207 // CHECK12-NEXT: store i32* [[A]], i32** [[TMP]], align 8 4208 // CHECK12-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 4209 // CHECK12-NEXT: store [4 x i32]* [[TMP10]], [4 x i32]** [[_TMP2]], align 8 4210 // CHECK12-NEXT: [[TMP11:%.*]] = load [4 x i32]*, [4 x i32]** [[_TMP2]], align 8 4211 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast [4 x i32]* [[E]] to i8* 4212 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast [4 x i32]* [[TMP11]] to i8* 4213 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP12]], i8* align 4 [[TMP13]], i64 16, i1 false) 4214 // CHECK12-NEXT: store [4 x i32]* [[E]], [4 x i32]** [[_TMP3]], align 8 4215 // CHECK12-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0 4216 // CHECK12-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 4217 // CHECK12-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1 4218 // CHECK12-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 4219 // CHECK12-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2 4220 // CHECK12-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 4221 // CHECK12-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3 4222 // CHECK12-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8 4223 // CHECK12-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4 4224 // CHECK12-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.4 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 4225 // CHECK12-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 4226 // CHECK12-NEXT: store %struct.SS* [[TMP2]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8 4227 // CHECK12-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 4228 // CHECK12-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP]], align 8 4229 // CHECK12-NEXT: store i32* [[TMP14]], i32** [[BLOCK_CAPTURED]], align 8 4230 // CHECK12-NEXT: [[BLOCK_CAPTURED4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 4231 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[B]], align 4 4232 // CHECK12-NEXT: store i32 [[TMP15]], i32* [[BLOCK_CAPTURED4]], align 8 4233 // CHECK12-NEXT: [[BLOCK_CAPTURED5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 4234 // CHECK12-NEXT: [[TMP16:%.*]] = load i32*, i32** [[_TMP1]], align 8 4235 // CHECK12-NEXT: store i32* [[TMP16]], i32** [[BLOCK_CAPTURED5]], align 8 4236 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]] to void ()* 4237 // CHECK12-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP17]] to %struct.__block_literal_generic* 4238 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 4239 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 4240 // CHECK12-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP18]], align 8 4241 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to void (i8*)* 4242 // CHECK12-NEXT: call void [[TMP21]](i8* [[TMP19]]) 4243 // CHECK12-NEXT: ret void 4244 // 4245 // 4246 // CHECK12-LABEL: define {{[^@]+}}@g_block_invoke_2 4247 // CHECK12-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] { 4248 // CHECK12-NEXT: entry: 4249 // CHECK12-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 4250 // CHECK12-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*, align 8 4251 // CHECK12-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 4252 // CHECK12-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 4253 // CHECK12-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* 4254 // CHECK12-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>** [[BLOCK_ADDR]], align 8 4255 // CHECK12-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 4256 // CHECK12-NEXT: [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8 4257 // CHECK12-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 4258 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8 4259 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4260 // CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 4261 // CHECK12-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 4262 // CHECK12-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 4263 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR1]], align 8 4264 // CHECK12-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -1 4265 // CHECK12-NEXT: store i32 [[DEC]], i32* [[BLOCK_CAPTURE_ADDR1]], align 8 4266 // CHECK12-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 4267 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8 4268 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4269 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1 4270 // CHECK12-NEXT: store i32 [[DIV]], i32* [[TMP3]], align 4 4271 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4272 // CHECK12-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[TMP5]], align 8 4273 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4274 // CHECK12-NEXT: [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 4275 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR3]], align 8 4276 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 4277 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[TMP6]], align 8 4278 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 4279 // CHECK12-NEXT: [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 4280 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR4]], align 8 4281 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[TMP9]], align 4 4282 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 4283 // CHECK12-NEXT: [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 4284 // CHECK12-NEXT: [[TMP12:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR5]], align 8 4285 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 4286 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[TMP11]], align 8 4287 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 4288 // CHECK12-NEXT: ret void 4289 // 4290 // 4291 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3 4292 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 4293 // CHECK12-NEXT: entry: 4294 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4295 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4296 // CHECK12-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 4297 // CHECK12-NEXT: [[A:%.*]] = alloca i32, align 4 4298 // CHECK12-NEXT: [[B:%.*]] = alloca i32, align 4 4299 // CHECK12-NEXT: [[C:%.*]] = alloca i32, align 4 4300 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32*, align 8 4301 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 4302 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4303 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4304 // CHECK12-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 4305 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 4306 // CHECK12-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 4307 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 4308 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 4309 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 4310 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[A]], align 4 4311 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 2 4312 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 4313 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[B]], align 4 4314 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 3 4315 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 8 4316 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[C]], align 4 4317 // CHECK12-NEXT: store i32* [[A]], i32** [[TMP]], align 8 4318 // CHECK12-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 4319 // CHECK12-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP]], align 8 4320 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 4321 // CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1 4322 // CHECK12-NEXT: store i32 [[INC]], i32* [[TMP9]], align 4 4323 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 4324 // CHECK12-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP11]], -1 4325 // CHECK12-NEXT: store i32 [[DEC]], i32* [[B]], align 4 4326 // CHECK12-NEXT: [[TMP12:%.*]] = load i32*, i32** [[_TMP1]], align 8 4327 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 4328 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP13]], 1 4329 // CHECK12-NEXT: store i32 [[DIV]], i32* [[TMP12]], align 4 4330 // CHECK12-NEXT: ret void 4331 // 4332 // 4333 // CHECK17-LABEL: define {{[^@]+}}@_Z10array_funcPfP2StiPe 4334 // CHECK17-SAME: (float* [[A:%.*]], %struct.St* [[S:%.*]], i32 [[N:%.*]], x86_fp80* [[VLA1:%.*]]) #[[ATTR0:[0-9]+]] { 4335 // CHECK17-NEXT: entry: 4336 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8 4337 // CHECK17-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 8 4338 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4339 // CHECK17-NEXT: [[VLA1_ADDR:%.*]] = alloca x86_fp80*, align 8 4340 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 4341 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 4342 // CHECK17-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 4343 // CHECK17-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 4344 // CHECK17-NEXT: store float* [[A]], float** [[A_ADDR]], align 8 4345 // CHECK17-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 8 4346 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4347 // CHECK17-NEXT: store x86_fp80* [[VLA1]], x86_fp80** [[VLA1_ADDR]], align 8 4348 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 4349 // CHECK17-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 4350 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4351 // CHECK17-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 4352 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 4353 // CHECK17-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64 4354 // CHECK17-NEXT: [[TMP6:%.*]] = call i8* @llvm.stacksave() 4355 // CHECK17-NEXT: store i8* [[TMP6]], i8** [[SAVED_STACK]], align 8 4356 // CHECK17-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP3]], [[TMP5]] 4357 // CHECK17-NEXT: [[VLA:%.*]] = alloca double, i64 [[TMP7]], align 128 4358 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR0]], align 8 4359 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8 4360 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4361 // CHECK17-NEXT: [[TMP9:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 8 4362 // CHECK17-NEXT: store %struct.St* [[TMP9]], %struct.St** [[TMP8]], align 8 4363 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4364 // CHECK17-NEXT: store i32* [[N_ADDR]], i32** [[TMP10]], align 8 4365 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 4366 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP11]], align 8 4367 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 4368 // CHECK17-NEXT: [[TMP13:%.*]] = load x86_fp80*, x86_fp80** [[VLA1_ADDR]], align 8 4369 // CHECK17-NEXT: store x86_fp80* [[TMP13]], x86_fp80** [[TMP12]], align 8 4370 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 4371 // CHECK17-NEXT: [[TMP15:%.*]] = load float*, float** [[A_ADDR]], align 8 4372 // CHECK17-NEXT: store float* [[TMP15]], float** [[TMP14]], align 8 4373 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 4374 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP16]], align 8 4375 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 4376 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP17]], align 8 4377 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 4378 // CHECK17-NEXT: store double* [[VLA]], double** [[TMP18]], align 8 4379 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 4380 // CHECK17-NEXT: [[TMP19:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 4381 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP19]]) 4382 // CHECK17-NEXT: ret void 4383 // 4384 // 4385 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 4386 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] { 4387 // CHECK17-NEXT: entry: 4388 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4389 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4390 // CHECK17-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 4391 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 4392 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 4393 // CHECK17-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 4394 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4395 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4396 // CHECK17-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 4397 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 4398 // CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 4399 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 1 4400 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 4401 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 2 4402 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP4]], align 8 4403 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 3 4404 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 4 4405 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 5 4406 // CHECK17-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP8]], align 8 4407 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 6 4408 // CHECK17-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 4409 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 7 4410 // CHECK17-NEXT: [[TMP13:%.*]] = load double*, double** [[TMP12]], align 8 4411 // CHECK17-NEXT: [[TMP14:%.*]] = call i8* @llvm.stacksave() 4412 // CHECK17-NEXT: store i8* [[TMP14]], i8** [[SAVED_STACK]], align 8 4413 // CHECK17-NEXT: [[TMP15:%.*]] = mul nuw i64 [[TMP9]], [[TMP11]] 4414 // CHECK17-NEXT: [[VLA:%.*]] = alloca double, i64 [[TMP15]], align 128 4415 // CHECK17-NEXT: store i64 [[TMP9]], i64* [[__VLA_EXPR0]], align 8 4416 // CHECK17-NEXT: store i64 [[TMP11]], i64* [[__VLA_EXPR1]], align 8 4417 // CHECK17-NEXT: [[TMP16:%.*]] = mul nuw i64 [[TMP9]], [[TMP11]] 4418 // CHECK17-NEXT: [[TMP17:%.*]] = mul nuw i64 [[TMP16]], 8 4419 // CHECK17-NEXT: [[TMP18:%.*]] = bitcast double* [[VLA]] to i8* 4420 // CHECK17-NEXT: [[TMP19:%.*]] = bitcast double* [[TMP13]] to i8* 4421 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP18]], i8* align 128 [[TMP19]], i64 [[TMP17]], i1 false) 4422 // CHECK17-NEXT: [[TMP20:%.*]] = load %struct.St*, %struct.St** [[TMP1]], align 8 4423 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[TMP20]], i64 0 4424 // CHECK17-NEXT: [[TMP21:%.*]] = load %struct.St*, %struct.St** [[TMP1]], align 8 4425 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP3]], align 4 4426 // CHECK17-NEXT: [[TMP23:%.*]] = load x86_fp80*, x86_fp80** [[TMP6]], align 8 4427 // CHECK17-NEXT: call void @_ZN2St7St_funcEPS_iPe(%struct.St* nonnull align 4 dereferenceable(8) [[ARRAYIDX]], %struct.St* [[TMP21]], i32 [[TMP22]], x86_fp80* [[TMP23]]) 4428 // CHECK17-NEXT: [[TMP24:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 4429 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP24]]) 4430 // CHECK17-NEXT: ret void 4431 // 4432 // 4433 // CHECK17-LABEL: define {{[^@]+}}@_ZN2St7St_funcEPS_iPe 4434 // CHECK17-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]], %struct.St* [[S:%.*]], i32 [[N:%.*]], x86_fp80* [[VLA1:%.*]]) #[[ATTR0]] align 2 { 4435 // CHECK17-NEXT: entry: 4436 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 4437 // CHECK17-NEXT: [[S_ADDR:%.*]] = alloca %struct.St*, align 8 4438 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4439 // CHECK17-NEXT: [[VLA1_ADDR:%.*]] = alloca x86_fp80*, align 8 4440 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 4441 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 4442 // CHECK17-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 4443 // CHECK17-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 8 4444 // CHECK17-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 4445 // CHECK17-NEXT: store %struct.St* [[S]], %struct.St** [[S_ADDR]], align 8 4446 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4447 // CHECK17-NEXT: store x86_fp80* [[VLA1]], x86_fp80** [[VLA1_ADDR]], align 8 4448 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 4449 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 4450 // CHECK17-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 4451 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4452 // CHECK17-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 4453 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 4454 // CHECK17-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64 4455 // CHECK17-NEXT: [[TMP6:%.*]] = call i8* @llvm.stacksave() 4456 // CHECK17-NEXT: store i8* [[TMP6]], i8** [[SAVED_STACK]], align 8 4457 // CHECK17-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP3]], [[TMP5]] 4458 // CHECK17-NEXT: [[VLA:%.*]] = alloca double, i64 [[TMP7]], align 128 4459 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR0]], align 8 4460 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8 4461 // CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[THIS1]], i32 0, i32 1 4462 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[B]], align 4 4463 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 0 4464 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[A]], align 4 4465 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4466 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP9]], align 8 4467 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4468 // CHECK17-NEXT: [[TMP11:%.*]] = load x86_fp80*, x86_fp80** [[VLA1_ADDR]], align 8 4469 // CHECK17-NEXT: store x86_fp80* [[TMP11]], x86_fp80** [[TMP10]], align 8 4470 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 4471 // CHECK17-NEXT: store %struct.St* [[THIS1]], %struct.St** [[TMP12]], align 8 4472 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 4473 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 4474 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 4475 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP14]], align 8 4476 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 4477 // CHECK17-NEXT: store double* [[VLA]], double** [[TMP15]], align 8 4478 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 4479 // CHECK17-NEXT: store i32* [[N_ADDR]], i32** [[TMP16]], align 8 4480 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 4481 // CHECK17-NEXT: [[TMP18:%.*]] = load %struct.St*, %struct.St** [[S_ADDR]], align 8 4482 // CHECK17-NEXT: store %struct.St* [[TMP18]], %struct.St** [[TMP17]], align 8 4483 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 4484 // CHECK17-NEXT: [[TMP19:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 4485 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP19]]) 4486 // CHECK17-NEXT: ret void 4487 // 4488 // 4489 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1 4490 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 4491 // CHECK17-NEXT: entry: 4492 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4493 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4494 // CHECK17-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 4495 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4496 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4497 // CHECK17-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 4498 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 4499 // CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 4500 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP1]], align 8 4501 // CHECK17-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 1 4502 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 2 4503 // CHECK17-NEXT: [[TMP5:%.*]] = load %struct.St*, %struct.St** [[TMP4]], align 8 4504 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 3 4505 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[TMP6]], align 8 4506 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 4 4507 // CHECK17-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP8]], align 8 4508 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 5 4509 // CHECK17-NEXT: [[TMP11:%.*]] = load double*, double** [[TMP10]], align 8 4510 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 6 4511 // CHECK17-NEXT: [[TMP13:%.*]] = load i32*, i32** [[TMP12]], align 8 4512 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 7 4513 // CHECK17-NEXT: [[TMP15:%.*]] = mul nuw i64 [[TMP7]], [[TMP9]] 4514 // CHECK17-NEXT: [[TMP16:%.*]] = mul nuw i64 [[TMP15]], 8 4515 // CHECK17-NEXT: [[TMP17:%.*]] = add nuw i64 [[TMP16]], 127 4516 // CHECK17-NEXT: [[TMP18:%.*]] = udiv i64 [[TMP17]], 128 4517 // CHECK17-NEXT: [[TMP19:%.*]] = mul nuw i64 [[TMP18]], 128 4518 // CHECK17-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4519 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 4520 // CHECK17-NEXT: [[DOTVLA2__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP21]], i64 [[TMP19]], i8* inttoptr (i64 8 to i8*)) 4521 // CHECK17-NEXT: [[DOTVLA2__ADDR:%.*]] = bitcast i8* [[DOTVLA2__VOID_ADDR]] to double* 4522 // CHECK17-NEXT: [[TMP22:%.*]] = mul nuw i64 [[TMP7]], [[TMP9]] 4523 // CHECK17-NEXT: [[TMP23:%.*]] = mul nuw i64 [[TMP22]], 8 4524 // CHECK17-NEXT: [[TMP24:%.*]] = bitcast double* [[DOTVLA2__ADDR]] to i8* 4525 // CHECK17-NEXT: [[TMP25:%.*]] = bitcast double* [[TMP11]] to i8* 4526 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP24]], i8* align 128 [[TMP25]], i64 [[TMP23]], i1 false) 4527 // CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[TMP5]], i32 0, i32 1 4528 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[B]], align 4 4529 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[TMP5]], i32 0, i32 0 4530 // CHECK17-NEXT: store i32 [[TMP26]], i32* [[A]], align 4 4531 // CHECK17-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP26]] to double 4532 // CHECK17-NEXT: [[TMP27:%.*]] = mul nsw i64 1, [[TMP9]] 4533 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[DOTVLA2__ADDR]], i64 [[TMP27]] 4534 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP13]], align 4 4535 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 1 4536 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[SUB]] to i64 4537 // CHECK17-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX]], i64 [[IDXPROM]] 4538 // CHECK17-NEXT: store double [[CONV]], double* [[ARRAYIDX1]], align 8 4539 // CHECK17-NEXT: [[CONV2:%.*]] = fpext double [[CONV]] to x86_fp80 4540 // CHECK17-NEXT: [[TMP29:%.*]] = load x86_fp80*, x86_fp80** [[TMP3]], align 8 4541 // CHECK17-NEXT: [[B3:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[TMP5]], i32 0, i32 1 4542 // CHECK17-NEXT: [[TMP30:%.*]] = load i32, i32* [[B3]], align 4 4543 // CHECK17-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP30]] to i64 4544 // CHECK17-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds x86_fp80, x86_fp80* [[TMP29]], i64 [[IDXPROM4]] 4545 // CHECK17-NEXT: store x86_fp80 [[CONV2]], x86_fp80* [[ARRAYIDX5]], align 16 4546 // CHECK17-NEXT: [[TMP31:%.*]] = bitcast double* [[DOTVLA2__ADDR]] to i8* 4547 // CHECK17-NEXT: call void @__kmpc_free(i32 [[TMP21]], i8* [[TMP31]], i8* inttoptr (i64 8 to i8*)) 4548 // CHECK17-NEXT: ret void 4549 // 4550