xref: /llvm-project/clang/test/OpenMP/nvptx_multi_target_parallel_codegen.cpp (revision 6bd74fd65fadef06edd92740c8ef4fc822d99ae3)
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // Test target codegen - host bc file has to be created first.
3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
4 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK2
7 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK2
8 
9 // expected-no-diagnostics
10 #ifndef HEADER
11 #define HEADER
12 
13 void work();
14 
15 void use() {
16       #pragma omp parallel
17       work();
18 }
19 
20 int main() {
21       #pragma omp target parallel
22       {  use(); }
23         #pragma omp target
24         {  use(); }
25 }
26 
27 #endif
28 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l21
29 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
30 // CHECK1-NEXT:  entry:
31 // CHECK1-NEXT:    [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
32 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @[[GLOB1:[0-9]+]], i8 2, i1 false)
33 // CHECK1-NEXT:    [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
34 // CHECK1-NEXT:    br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
35 // CHECK1:       user_code.entry:
36 // CHECK1-NEXT:    [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
37 // CHECK1-NEXT:    call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l21_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
38 // CHECK1-NEXT:    call void @__kmpc_target_deinit(ptr @[[GLOB1]], i8 2)
39 // CHECK1-NEXT:    ret void
40 // CHECK1:       worker.exit:
41 // CHECK1-NEXT:    ret void
42 //
43 //
44 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l21_omp_outlined
45 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
46 // CHECK1-NEXT:  entry:
47 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
48 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
49 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
50 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
51 // CHECK1-NEXT:    call void @_Z3usev() #[[ATTR8:[0-9]+]]
52 // CHECK1-NEXT:    ret void
53 //
54 //
55 // CHECK1-LABEL: define {{[^@]+}}@_Z3usev
56 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] {
57 // CHECK1-NEXT:  entry:
58 // CHECK1-NEXT:    [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 8
59 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
60 // CHECK1-NEXT:    call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP0]], i32 1, i32 -1, i32 -1, ptr @_Z3usev_omp_outlined, ptr @_Z3usev_omp_outlined_wrapper, ptr [[CAPTURED_VARS_ADDRS]], i64 0)
61 // CHECK1-NEXT:    ret void
62 //
63 //
64 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l23
65 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] {
66 // CHECK1-NEXT:  entry:
67 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @[[GLOB1]], i8 1, i1 true)
68 // CHECK1-NEXT:    [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
69 // CHECK1-NEXT:    br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
70 // CHECK1:       user_code.entry:
71 // CHECK1-NEXT:    call void @_Z3usev() #[[ATTR8]]
72 // CHECK1-NEXT:    call void @__kmpc_target_deinit(ptr @[[GLOB1]], i8 1)
73 // CHECK1-NEXT:    ret void
74 // CHECK1:       worker.exit:
75 // CHECK1-NEXT:    ret void
76 //
77 //
78 // CHECK1-LABEL: define {{[^@]+}}@_Z3usev_omp_outlined
79 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
80 // CHECK1-NEXT:  entry:
81 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
82 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
83 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
84 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
85 // CHECK1-NEXT:    call void @_Z4workv() #[[ATTR8]]
86 // CHECK1-NEXT:    ret void
87 //
88 //
89 // CHECK1-LABEL: define {{[^@]+}}@_Z3usev_omp_outlined_wrapper
90 // CHECK1-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {
91 // CHECK1-NEXT:  entry:
92 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca i16, align 2
93 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca i32, align 4
94 // CHECK1-NEXT:    [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
95 // CHECK1-NEXT:    [[GLOBAL_ARGS:%.*]] = alloca ptr, align 8
96 // CHECK1-NEXT:    store i16 [[TMP0]], ptr [[DOTADDR]], align 2
97 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
98 // CHECK1-NEXT:    store i32 0, ptr [[DOTZERO_ADDR]], align 4
99 // CHECK1-NEXT:    call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS]])
100 // CHECK1-NEXT:    call void @_Z3usev_omp_outlined(ptr [[DOTADDR1]], ptr [[DOTZERO_ADDR]]) #[[ATTR3:[0-9]+]]
101 // CHECK1-NEXT:    ret void
102 //
103 //
104 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l21
105 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
106 // CHECK2-NEXT:  entry:
107 // CHECK2-NEXT:    [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
108 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @[[GLOB1:[0-9]+]], i8 2, i1 false)
109 // CHECK2-NEXT:    [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
110 // CHECK2-NEXT:    br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
111 // CHECK2:       user_code.entry:
112 // CHECK2-NEXT:    [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
113 // CHECK2-NEXT:    call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l21_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
114 // CHECK2-NEXT:    call void @__kmpc_target_deinit(ptr @[[GLOB1]], i8 2)
115 // CHECK2-NEXT:    ret void
116 // CHECK2:       worker.exit:
117 // CHECK2-NEXT:    ret void
118 //
119 //
120 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l21_omp_outlined
121 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
122 // CHECK2-NEXT:  entry:
123 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
124 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
125 // CHECK2-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
126 // CHECK2-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
127 // CHECK2-NEXT:    call void @_Z3usev() #[[ATTR8:[0-9]+]]
128 // CHECK2-NEXT:    ret void
129 //
130 //
131 // CHECK2-LABEL: define {{[^@]+}}@_Z3usev
132 // CHECK2-SAME: () #[[ATTR2:[0-9]+]] {
133 // CHECK2-NEXT:  entry:
134 // CHECK2-NEXT:    [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x ptr], align 4
135 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
136 // CHECK2-NEXT:    call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP0]], i32 1, i32 -1, i32 -1, ptr @_Z3usev_omp_outlined, ptr @_Z3usev_omp_outlined_wrapper, ptr [[CAPTURED_VARS_ADDRS]], i32 0)
137 // CHECK2-NEXT:    ret void
138 //
139 //
140 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l23
141 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] {
142 // CHECK2-NEXT:  entry:
143 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @[[GLOB1]], i8 1, i1 true)
144 // CHECK2-NEXT:    [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
145 // CHECK2-NEXT:    br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
146 // CHECK2:       user_code.entry:
147 // CHECK2-NEXT:    call void @_Z3usev() #[[ATTR8]]
148 // CHECK2-NEXT:    call void @__kmpc_target_deinit(ptr @[[GLOB1]], i8 1)
149 // CHECK2-NEXT:    ret void
150 // CHECK2:       worker.exit:
151 // CHECK2-NEXT:    ret void
152 //
153 //
154 // CHECK2-LABEL: define {{[^@]+}}@_Z3usev_omp_outlined
155 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
156 // CHECK2-NEXT:  entry:
157 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
158 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
159 // CHECK2-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
160 // CHECK2-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
161 // CHECK2-NEXT:    call void @_Z4workv() #[[ATTR8]]
162 // CHECK2-NEXT:    ret void
163 //
164 //
165 // CHECK2-LABEL: define {{[^@]+}}@_Z3usev_omp_outlined_wrapper
166 // CHECK2-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {
167 // CHECK2-NEXT:  entry:
168 // CHECK2-NEXT:    [[DOTADDR:%.*]] = alloca i16, align 2
169 // CHECK2-NEXT:    [[DOTADDR1:%.*]] = alloca i32, align 4
170 // CHECK2-NEXT:    [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
171 // CHECK2-NEXT:    [[GLOBAL_ARGS:%.*]] = alloca ptr, align 4
172 // CHECK2-NEXT:    store i16 [[TMP0]], ptr [[DOTADDR]], align 2
173 // CHECK2-NEXT:    store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
174 // CHECK2-NEXT:    store i32 0, ptr [[DOTZERO_ADDR]], align 4
175 // CHECK2-NEXT:    call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS]])
176 // CHECK2-NEXT:    call void @_Z3usev_omp_outlined(ptr [[DOTADDR1]], ptr [[DOTZERO_ADDR]]) #[[ATTR3:[0-9]+]]
177 // CHECK2-NEXT:    ret void
178 //
179