1e415cb1dSWeining Lu // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2e415cb1dSWeining Lu // RUN: %clang_cc1 -triple loongarch32 -O2 -emit-llvm %s -o - | FileCheck %s
3e415cb1dSWeining Lu // RUN: %clang_cc1 -triple loongarch64 -O2 -emit-llvm %s -o - | FileCheck %s
4e415cb1dSWeining Lu
5e415cb1dSWeining Lu /// Test LoongArch specific operand modifiers (i.e. operand codes).
6e415cb1dSWeining Lu
7e415cb1dSWeining Lu // CHECK-LABEL: @test_z_zero(
8e415cb1dSWeining Lu // CHECK-NEXT: entry:
9*3391bdc2SNoah Goldstein // CHECK-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "add.w $0, $1, ${2:z}", "=r,r,ri"(i32 [[A:%.*]], i32 0) #[[ATTR1:[0-9]+]], !srcloc !2
10e415cb1dSWeining Lu // CHECK-NEXT: ret void
11e415cb1dSWeining Lu //
test_z_zero(int a)12e415cb1dSWeining Lu void test_z_zero(int a) {
13e415cb1dSWeining Lu int tmp;
14e415cb1dSWeining Lu asm volatile ("add.w %0, %1, %z2" : "=r" (tmp) : "r" (a), "ri" (0));
15e415cb1dSWeining Lu }
16e415cb1dSWeining Lu
17e415cb1dSWeining Lu // CHECK-LABEL: @test_z_nonzero(
18e415cb1dSWeining Lu // CHECK-NEXT: entry:
19*3391bdc2SNoah Goldstein // CHECK-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "add.w $0, $1, ${2:z}", "=r,r,ri"(i32 [[A:%.*]], i32 1) #[[ATTR1]], !srcloc !3
20e415cb1dSWeining Lu // CHECK-NEXT: ret void
21e415cb1dSWeining Lu //
test_z_nonzero(int a)22e415cb1dSWeining Lu void test_z_nonzero(int a) {
23e415cb1dSWeining Lu int tmp;
24e415cb1dSWeining Lu asm volatile ("add.w %0, %1, %z2" : "=r" (tmp) : "r" (a), "ri" (1));
25e415cb1dSWeining Lu }
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