xref: /llvm-project/clang/test/CodeGen/AArch64/sve-inline-asm-crash.c (revision 207e5ccceec8d3cc3f32723e78f2a142bc61b07d)
1*207e5cccSFangrui Song // REQUIRES: aarch64-registered-target
2*207e5cccSFangrui Song 
3*207e5cccSFangrui Song // RUN: not %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve \
4*207e5cccSFangrui Song // RUN:   -target-feature +neon -S -O1 -o - %s 2>&1 | FileCheck %s
5*207e5cccSFangrui Song 
6*207e5cccSFangrui Song // Set a vector constraint for an sve predicate register
7*207e5cccSFangrui Song // As the wrong constraint is used for an SVBool,
8*207e5cccSFangrui Song // the compiler will try to extend the nxv16i1 to an nxv16i8
9*207e5cccSFangrui Song // TODO: We don't have patterns for this yet but once they are added this test
10*207e5cccSFangrui Song // should be updated to check for an assembler error
11*207e5cccSFangrui Song __SVBool_t funcB1(__SVBool_t in)
12*207e5cccSFangrui Song {
13*207e5cccSFangrui Song   __SVBool_t ret ;
14*207e5cccSFangrui Song   asm volatile (
15*207e5cccSFangrui Song     "mov %[ret].b, %[in].b \n"
16*207e5cccSFangrui Song     : [ret] "=w" (ret)
17*207e5cccSFangrui Song     : [in] "w" (in)
18*207e5cccSFangrui Song     :);
19*207e5cccSFangrui Song 
20*207e5cccSFangrui Song   return ret ;
21*207e5cccSFangrui Song }
22*207e5cccSFangrui Song 
23*207e5cccSFangrui Song __SVCount_t funcB1(__SVCount_t in)
24*207e5cccSFangrui Song {
25*207e5cccSFangrui Song   __SVCount_t ret ;
26*207e5cccSFangrui Song   asm volatile (
27*207e5cccSFangrui Song     "mov %[ret].b, %[in].b \n"
28*207e5cccSFangrui Song     : [ret] "=w" (ret)
29*207e5cccSFangrui Song     : [in] "w" (in)
30*207e5cccSFangrui Song     :);
31*207e5cccSFangrui Song 
32*207e5cccSFangrui Song   return ret ;
33*207e5cccSFangrui Song }
34*207e5cccSFangrui Song 
35*207e5cccSFangrui Song // CHECK: funcB1
36*207e5cccSFangrui Song // CHECK-ERROR: fatal error: error in backend: Cannot select
37