1*5d9d9091SRichard Lowe/* 2*5d9d9091SRichard Lowe * CDDL HEADER START 3*5d9d9091SRichard Lowe * 4*5d9d9091SRichard Lowe * The contents of this file are subject to the terms of the 5*5d9d9091SRichard Lowe * Common Development and Distribution License (the "License"). 6*5d9d9091SRichard Lowe * You may not use this file except in compliance with the License. 7*5d9d9091SRichard Lowe * 8*5d9d9091SRichard Lowe * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*5d9d9091SRichard Lowe * or http://www.opensolaris.org/os/licensing. 10*5d9d9091SRichard Lowe * See the License for the specific language governing permissions 11*5d9d9091SRichard Lowe * and limitations under the License. 12*5d9d9091SRichard Lowe * 13*5d9d9091SRichard Lowe * When distributing Covered Code, include this CDDL HEADER in each 14*5d9d9091SRichard Lowe * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*5d9d9091SRichard Lowe * If applicable, add the following below this CDDL HEADER, with the 16*5d9d9091SRichard Lowe * fields enclosed by brackets "[]" replaced with your own identifying 17*5d9d9091SRichard Lowe * information: Portions Copyright [yyyy] [name of copyright owner] 18*5d9d9091SRichard Lowe * 19*5d9d9091SRichard Lowe * CDDL HEADER END 20*5d9d9091SRichard Lowe */ 21*5d9d9091SRichard Lowe 22*5d9d9091SRichard Lowe/* 23*5d9d9091SRichard Lowe * Copyright 2001 Sun Microsystems, Inc. All rights reserved. 24*5d9d9091SRichard Lowe * Use is subject to license terms. 25*5d9d9091SRichard Lowe */ 26*5d9d9091SRichard Lowe 27*5d9d9091SRichard Lowe#include <sys/param.h> 28*5d9d9091SRichard Lowe#include <sys/errno.h> 29*5d9d9091SRichard Lowe#include <sys/asm_linkage.h> 30*5d9d9091SRichard Lowe#include <sys/vtrace.h> 31*5d9d9091SRichard Lowe#include <sys/machthread.h> 32*5d9d9091SRichard Lowe#include <sys/clock.h> 33*5d9d9091SRichard Lowe#include <sys/asi.h> 34*5d9d9091SRichard Lowe#include <sys/fsr.h> 35*5d9d9091SRichard Lowe#include <sys/privregs.h> 36*5d9d9091SRichard Lowe#include <sys/pte.h> 37*5d9d9091SRichard Lowe#include <sys/mmu.h> 38*5d9d9091SRichard Lowe#include <sys/spitregs.h> 39*5d9d9091SRichard Lowe 40*5d9d9091SRichard Lowe#include "assym.h" 41*5d9d9091SRichard Lowe 42*5d9d9091SRichard Lowe#define TT_HSM 0x99 43*5d9d9091SRichard Lowe 44*5d9d9091SRichard Lowe/* 45*5d9d9091SRichard Lowe * This routine quiets a cpu and has it spin on a barrier. 46*5d9d9091SRichard Lowe * It is used during memory sparing so that no memory operation 47*5d9d9091SRichard Lowe * occurs during the memory copy. 48*5d9d9091SRichard Lowe * 49*5d9d9091SRichard Lowe * Entry: 50*5d9d9091SRichard Lowe * %g1 - gate array base address 51*5d9d9091SRichard Lowe * %g2 - barrier base address 52*5d9d9091SRichard Lowe * %g3 - arg2 53*5d9d9091SRichard Lowe * %g4 - arg3 54*5d9d9091SRichard Lowe * 55*5d9d9091SRichard Lowe * Register Usage: 56*5d9d9091SRichard Lowe * %g3 - saved pstate 57*5d9d9091SRichard Lowe * %g4 - temporary 58*5d9d9091SRichard Lowe * %g5 - check for panicstr 59*5d9d9091SRichard Lowe */ 60*5d9d9091SRichard Lowe ENTRY_NP(sysctrl_freeze) 61*5d9d9091SRichard Lowe CPU_INDEX(%g4, %g5) 62*5d9d9091SRichard Lowe sll %g4, 2, %g4 63*5d9d9091SRichard Lowe add %g4, %g1, %g4 ! compute address of gate id 64*5d9d9091SRichard Lowe 65*5d9d9091SRichard Lowe st %g4, [%g4] ! indicate we are ready 66*5d9d9091SRichard Lowe membar #Sync 67*5d9d9091SRichard Lowe1: 68*5d9d9091SRichard Lowe sethi %hi(panicstr), %g5 69*5d9d9091SRichard Lowe ldn [%g5 + %lo(panicstr)], %g5 70*5d9d9091SRichard Lowe brnz %g5, 2f ! exit if in panic 71*5d9d9091SRichard Lowe nop 72*5d9d9091SRichard Lowe ld [%g2], %g4 73*5d9d9091SRichard Lowe brz,pt %g4, 1b ! spin until barrier true 74*5d9d9091SRichard Lowe nop 75*5d9d9091SRichard Lowe 76*5d9d9091SRichard Lowe2: 77*5d9d9091SRichard Lowe retry 78*5d9d9091SRichard Lowe membar #Sync 79*5d9d9091SRichard Lowe SET_SIZE(sysctrl_freeze) 80*5d9d9091SRichard Lowe 81