1*49ef7e06SGarrett D'Amore /*
2*49ef7e06SGarrett D'Amore * Copyright (c) 2008-2016 Solarflare Communications Inc.
3*49ef7e06SGarrett D'Amore * All rights reserved.
4*49ef7e06SGarrett D'Amore *
5*49ef7e06SGarrett D'Amore * Redistribution and use in source and binary forms, with or without
6*49ef7e06SGarrett D'Amore * modification, are permitted provided that the following conditions are met:
7*49ef7e06SGarrett D'Amore *
8*49ef7e06SGarrett D'Amore * 1. Redistributions of source code must retain the above copyright notice,
9*49ef7e06SGarrett D'Amore * this list of conditions and the following disclaimer.
10*49ef7e06SGarrett D'Amore * 2. Redistributions in binary form must reproduce the above copyright notice,
11*49ef7e06SGarrett D'Amore * this list of conditions and the following disclaimer in the documentation
12*49ef7e06SGarrett D'Amore * and/or other materials provided with the distribution.
13*49ef7e06SGarrett D'Amore *
14*49ef7e06SGarrett D'Amore * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15*49ef7e06SGarrett D'Amore * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16*49ef7e06SGarrett D'Amore * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17*49ef7e06SGarrett D'Amore * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18*49ef7e06SGarrett D'Amore * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19*49ef7e06SGarrett D'Amore * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20*49ef7e06SGarrett D'Amore * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21*49ef7e06SGarrett D'Amore * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22*49ef7e06SGarrett D'Amore * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23*49ef7e06SGarrett D'Amore * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24*49ef7e06SGarrett D'Amore * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25*49ef7e06SGarrett D'Amore *
26*49ef7e06SGarrett D'Amore * The views and conclusions contained in the software and documentation are
27*49ef7e06SGarrett D'Amore * those of the authors and should not be interpreted as representing official
28*49ef7e06SGarrett D'Amore * policies, either expressed or implied, of the FreeBSD Project.
29*49ef7e06SGarrett D'Amore */
30*49ef7e06SGarrett D'Amore
31*49ef7e06SGarrett D'Amore #include <sys/types.h>
32*49ef7e06SGarrett D'Amore #include <sys/ddi.h>
33*49ef7e06SGarrett D'Amore #include <sys/sunddi.h>
34*49ef7e06SGarrett D'Amore
35*49ef7e06SGarrett D'Amore #include "sfxge.h"
36*49ef7e06SGarrett D'Amore
37*49ef7e06SGarrett D'Amore void
sfxge_sram_init(sfxge_t * sp)38*49ef7e06SGarrett D'Amore sfxge_sram_init(sfxge_t *sp)
39*49ef7e06SGarrett D'Amore {
40*49ef7e06SGarrett D'Amore sfxge_sram_t *ssp = &(sp->s_sram);
41*49ef7e06SGarrett D'Amore dev_info_t *dip = sp->s_dip;
42*49ef7e06SGarrett D'Amore char name[MAXNAMELEN];
43*49ef7e06SGarrett D'Amore
44*49ef7e06SGarrett D'Amore ASSERT3U(ssp->ss_state, ==, SFXGE_SRAM_UNINITIALIZED);
45*49ef7e06SGarrett D'Amore
46*49ef7e06SGarrett D'Amore mutex_init(&(ssp->ss_lock), NULL, MUTEX_DRIVER, NULL);
47*49ef7e06SGarrett D'Amore
48*49ef7e06SGarrett D'Amore (void) snprintf(name, MAXNAMELEN - 1, "%s%d_sram", ddi_driver_name(dip),
49*49ef7e06SGarrett D'Amore ddi_get_instance(dip));
50*49ef7e06SGarrett D'Amore ssp->ss_buf_tbl_map = rmallocmap_wait(EFX_BUF_TBL_SIZE);
51*49ef7e06SGarrett D'Amore rmfree(ssp->ss_buf_tbl_map, EFX_BUF_TBL_SIZE - 1, 1);
52*49ef7e06SGarrett D'Amore ssp->ss_state = SFXGE_SRAM_INITIALIZED;
53*49ef7e06SGarrett D'Amore }
54*49ef7e06SGarrett D'Amore
55*49ef7e06SGarrett D'Amore int
sfxge_sram_buf_tbl_alloc(sfxge_t * sp,size_t n,uint32_t * idp)56*49ef7e06SGarrett D'Amore sfxge_sram_buf_tbl_alloc(sfxge_t *sp, size_t n, uint32_t *idp)
57*49ef7e06SGarrett D'Amore {
58*49ef7e06SGarrett D'Amore sfxge_sram_t *ssp = &(sp->s_sram);
59*49ef7e06SGarrett D'Amore unsigned long id;
60*49ef7e06SGarrett D'Amore int rc;
61*49ef7e06SGarrett D'Amore
62*49ef7e06SGarrett D'Amore mutex_enter(&(ssp->ss_lock));
63*49ef7e06SGarrett D'Amore
64*49ef7e06SGarrett D'Amore ASSERT(ssp->ss_state != SFXGE_SRAM_UNINITIALIZED);
65*49ef7e06SGarrett D'Amore
66*49ef7e06SGarrett D'Amore if ((id = rmalloc(ssp->ss_buf_tbl_map, n)) == 0) {
67*49ef7e06SGarrett D'Amore rc = ENOSPC;
68*49ef7e06SGarrett D'Amore goto fail1;
69*49ef7e06SGarrett D'Amore }
70*49ef7e06SGarrett D'Amore *idp = (uint32_t)id - 1;
71*49ef7e06SGarrett D'Amore mutex_exit(&(ssp->ss_lock));
72*49ef7e06SGarrett D'Amore
73*49ef7e06SGarrett D'Amore return (0);
74*49ef7e06SGarrett D'Amore
75*49ef7e06SGarrett D'Amore fail1:
76*49ef7e06SGarrett D'Amore DTRACE_PROBE1(fail1, int, rc);
77*49ef7e06SGarrett D'Amore
78*49ef7e06SGarrett D'Amore mutex_exit(&(ssp->ss_lock));
79*49ef7e06SGarrett D'Amore
80*49ef7e06SGarrett D'Amore return (rc);
81*49ef7e06SGarrett D'Amore }
82*49ef7e06SGarrett D'Amore
83*49ef7e06SGarrett D'Amore int
sfxge_sram_start(sfxge_t * sp)84*49ef7e06SGarrett D'Amore sfxge_sram_start(sfxge_t *sp)
85*49ef7e06SGarrett D'Amore {
86*49ef7e06SGarrett D'Amore sfxge_sram_t *ssp = &(sp->s_sram);
87*49ef7e06SGarrett D'Amore
88*49ef7e06SGarrett D'Amore mutex_enter(&(ssp->ss_lock));
89*49ef7e06SGarrett D'Amore
90*49ef7e06SGarrett D'Amore ASSERT3U(ssp->ss_state, ==, SFXGE_SRAM_INITIALIZED);
91*49ef7e06SGarrett D'Amore ASSERT3U(ssp->ss_count, ==, 0);
92*49ef7e06SGarrett D'Amore
93*49ef7e06SGarrett D'Amore ssp->ss_state = SFXGE_SRAM_STARTED;
94*49ef7e06SGarrett D'Amore
95*49ef7e06SGarrett D'Amore mutex_exit(&(ssp->ss_lock));
96*49ef7e06SGarrett D'Amore
97*49ef7e06SGarrett D'Amore return (0);
98*49ef7e06SGarrett D'Amore }
99*49ef7e06SGarrett D'Amore
100*49ef7e06SGarrett D'Amore int
sfxge_sram_buf_tbl_set(sfxge_t * sp,uint32_t id,efsys_mem_t * esmp,size_t n)101*49ef7e06SGarrett D'Amore sfxge_sram_buf_tbl_set(sfxge_t *sp, uint32_t id, efsys_mem_t *esmp,
102*49ef7e06SGarrett D'Amore size_t n)
103*49ef7e06SGarrett D'Amore {
104*49ef7e06SGarrett D'Amore sfxge_sram_t *ssp = &(sp->s_sram);
105*49ef7e06SGarrett D'Amore int rc;
106*49ef7e06SGarrett D'Amore
107*49ef7e06SGarrett D'Amore mutex_enter(&(ssp->ss_lock));
108*49ef7e06SGarrett D'Amore
109*49ef7e06SGarrett D'Amore ASSERT3U(ssp->ss_state, ==, SFXGE_SRAM_STARTED);
110*49ef7e06SGarrett D'Amore
111*49ef7e06SGarrett D'Amore if ((rc = efx_sram_buf_tbl_set(sp->s_enp, id, esmp, n)) != 0)
112*49ef7e06SGarrett D'Amore goto fail1;
113*49ef7e06SGarrett D'Amore
114*49ef7e06SGarrett D'Amore ssp->ss_count += n;
115*49ef7e06SGarrett D'Amore
116*49ef7e06SGarrett D'Amore mutex_exit(&(ssp->ss_lock));
117*49ef7e06SGarrett D'Amore
118*49ef7e06SGarrett D'Amore return (0);
119*49ef7e06SGarrett D'Amore
120*49ef7e06SGarrett D'Amore fail1:
121*49ef7e06SGarrett D'Amore DTRACE_PROBE1(fail1, int, rc);
122*49ef7e06SGarrett D'Amore
123*49ef7e06SGarrett D'Amore mutex_exit(&(ssp->ss_lock));
124*49ef7e06SGarrett D'Amore
125*49ef7e06SGarrett D'Amore return (rc);
126*49ef7e06SGarrett D'Amore }
127*49ef7e06SGarrett D'Amore
128*49ef7e06SGarrett D'Amore void
sfxge_sram_buf_tbl_clear(sfxge_t * sp,uint32_t id,size_t n)129*49ef7e06SGarrett D'Amore sfxge_sram_buf_tbl_clear(sfxge_t *sp, uint32_t id, size_t n)
130*49ef7e06SGarrett D'Amore {
131*49ef7e06SGarrett D'Amore sfxge_sram_t *ssp = &(sp->s_sram);
132*49ef7e06SGarrett D'Amore
133*49ef7e06SGarrett D'Amore mutex_enter(&(ssp->ss_lock));
134*49ef7e06SGarrett D'Amore
135*49ef7e06SGarrett D'Amore ASSERT3U(ssp->ss_state, ==, SFXGE_SRAM_STARTED);
136*49ef7e06SGarrett D'Amore
137*49ef7e06SGarrett D'Amore ASSERT3U(ssp->ss_count, >=, n);
138*49ef7e06SGarrett D'Amore ssp->ss_count -= n;
139*49ef7e06SGarrett D'Amore
140*49ef7e06SGarrett D'Amore efx_sram_buf_tbl_clear(sp->s_enp, id, n);
141*49ef7e06SGarrett D'Amore
142*49ef7e06SGarrett D'Amore mutex_exit(&(ssp->ss_lock));
143*49ef7e06SGarrett D'Amore }
144*49ef7e06SGarrett D'Amore
145*49ef7e06SGarrett D'Amore void
sfxge_sram_stop(sfxge_t * sp)146*49ef7e06SGarrett D'Amore sfxge_sram_stop(sfxge_t *sp)
147*49ef7e06SGarrett D'Amore {
148*49ef7e06SGarrett D'Amore sfxge_sram_t *ssp = &(sp->s_sram);
149*49ef7e06SGarrett D'Amore
150*49ef7e06SGarrett D'Amore mutex_enter(&(ssp->ss_lock));
151*49ef7e06SGarrett D'Amore
152*49ef7e06SGarrett D'Amore ASSERT3U(ssp->ss_state, ==, SFXGE_SRAM_STARTED);
153*49ef7e06SGarrett D'Amore ASSERT3U(ssp->ss_count, ==, 0);
154*49ef7e06SGarrett D'Amore
155*49ef7e06SGarrett D'Amore ssp->ss_state = SFXGE_SRAM_INITIALIZED;
156*49ef7e06SGarrett D'Amore
157*49ef7e06SGarrett D'Amore mutex_exit(&(ssp->ss_lock));
158*49ef7e06SGarrett D'Amore }
159*49ef7e06SGarrett D'Amore
160*49ef7e06SGarrett D'Amore void
sfxge_sram_buf_tbl_free(sfxge_t * sp,uint32_t id,size_t n)161*49ef7e06SGarrett D'Amore sfxge_sram_buf_tbl_free(sfxge_t *sp, uint32_t id, size_t n)
162*49ef7e06SGarrett D'Amore {
163*49ef7e06SGarrett D'Amore sfxge_sram_t *ssp = &(sp->s_sram);
164*49ef7e06SGarrett D'Amore
165*49ef7e06SGarrett D'Amore mutex_enter(&(ssp->ss_lock));
166*49ef7e06SGarrett D'Amore
167*49ef7e06SGarrett D'Amore ASSERT(ssp->ss_state != SFXGE_SRAM_UNINITIALIZED);
168*49ef7e06SGarrett D'Amore
169*49ef7e06SGarrett D'Amore rmfree(ssp->ss_buf_tbl_map, n, (unsigned long)id + 1);
170*49ef7e06SGarrett D'Amore
171*49ef7e06SGarrett D'Amore mutex_exit(&(ssp->ss_lock));
172*49ef7e06SGarrett D'Amore }
173*49ef7e06SGarrett D'Amore
174*49ef7e06SGarrett D'Amore void
sfxge_sram_fini(sfxge_t * sp)175*49ef7e06SGarrett D'Amore sfxge_sram_fini(sfxge_t *sp)
176*49ef7e06SGarrett D'Amore {
177*49ef7e06SGarrett D'Amore sfxge_sram_t *ssp = &(sp->s_sram);
178*49ef7e06SGarrett D'Amore
179*49ef7e06SGarrett D'Amore ASSERT3U(ssp->ss_state, ==, SFXGE_SRAM_INITIALIZED);
180*49ef7e06SGarrett D'Amore
181*49ef7e06SGarrett D'Amore rmfreemap(ssp->ss_buf_tbl_map);
182*49ef7e06SGarrett D'Amore ssp->ss_buf_tbl_map = NULL;
183*49ef7e06SGarrett D'Amore
184*49ef7e06SGarrett D'Amore mutex_destroy(&(ssp->ss_lock));
185*49ef7e06SGarrett D'Amore
186*49ef7e06SGarrett D'Amore ssp->ss_state = SFXGE_SRAM_UNINITIALIZED;
187*49ef7e06SGarrett D'Amore }
188