1*19da400cSJung-uk Kim /*- 2*19da400cSJung-uk Kim * APM (Advanced Power Management) BIOS Device Driver 3*19da400cSJung-uk Kim * 4*19da400cSJung-uk Kim * Copyright (c) 1994-1995 by HOSOKAWA, Tatsumi <hosokawa@mt.cs.keio.ac.jp> 5*19da400cSJung-uk Kim * 6*19da400cSJung-uk Kim * This software may be used, modified, copied, and distributed, in 7*19da400cSJung-uk Kim * both source and binary form provided that the above copyright and 8*19da400cSJung-uk Kim * these terms are retained. Under no circumstances is the author 9*19da400cSJung-uk Kim * responsible for the proper functioning of this software, nor does 10*19da400cSJung-uk Kim * the author assume any responsibility for damages incurred with its 11*19da400cSJung-uk Kim * use. 12*19da400cSJung-uk Kim * 13*19da400cSJung-uk Kim * Aug, 1994 Implemented on FreeBSD 1.1.5.1R (Toshiba AVS001WD) 14*19da400cSJung-uk Kim */ 15*19da400cSJung-uk Kim 16*19da400cSJung-uk Kim #ifndef _X86_APM_BIOS_H_ 17*19da400cSJung-uk Kim #define _X86_APM_BIOS_H_ 18*19da400cSJung-uk Kim 19*19da400cSJung-uk Kim #ifndef _KERNEL 20*19da400cSJung-uk Kim #include <sys/types.h> 21*19da400cSJung-uk Kim #endif 22*19da400cSJung-uk Kim #include <sys/ioccom.h> 23*19da400cSJung-uk Kim 24*19da400cSJung-uk Kim /* BIOS id */ 25*19da400cSJung-uk Kim #define APM_BIOS 0x53 26*19da400cSJung-uk Kim #define APM_INT 0x15 27*19da400cSJung-uk Kim 28*19da400cSJung-uk Kim /* APM flags */ 29*19da400cSJung-uk Kim #define APM_16BIT_SUPPORT 0x01 30*19da400cSJung-uk Kim #define APM_32BIT_SUPPORT 0x02 31*19da400cSJung-uk Kim #define APM_CPUIDLE_SLOW 0x04 32*19da400cSJung-uk Kim #define APM_DISABLED 0x08 33*19da400cSJung-uk Kim #define APM_DISENGAGED 0x10 34*19da400cSJung-uk Kim 35*19da400cSJung-uk Kim /* APM initializer physical address */ 36*19da400cSJung-uk Kim #define APM_OURADDR 0x00080000 37*19da400cSJung-uk Kim 38*19da400cSJung-uk Kim /* APM functions */ 39*19da400cSJung-uk Kim #define APM_INSTCHECK 0x00 40*19da400cSJung-uk Kim #define APM_REALCONNECT 0x01 41*19da400cSJung-uk Kim #define APM_PROT16CONNECT 0x02 42*19da400cSJung-uk Kim #define APM_PROT32CONNECT 0x03 43*19da400cSJung-uk Kim #define APM_DISCONNECT 0x04 44*19da400cSJung-uk Kim #define APM_CPUIDLE 0x05 45*19da400cSJung-uk Kim #define APM_CPUBUSY 0x06 46*19da400cSJung-uk Kim #define APM_SETPWSTATE 0x07 47*19da400cSJung-uk Kim #define APM_ENABLEDISABLEPM 0x08 48*19da400cSJung-uk Kim #define APM_RESTOREDEFAULT 0x09 49*19da400cSJung-uk Kim #define APM_GETPWSTATUS 0x0a 50*19da400cSJung-uk Kim #define APM_GETPMEVENT 0x0b 51*19da400cSJung-uk Kim #define APM_GETPWSTATE 0x0c 52*19da400cSJung-uk Kim #define APM_ENABLEDISABLEDPM 0x0d 53*19da400cSJung-uk Kim #define APM_DRVVERSION 0x0e 54*19da400cSJung-uk Kim #define APM_ENGAGEDISENGAGEPM 0x0f 55*19da400cSJung-uk Kim #define APM_GETCAPABILITIES 0x10 56*19da400cSJung-uk Kim #define APM_RESUMETIMER 0x11 57*19da400cSJung-uk Kim #define APM_RESUMEONRING 0x12 58*19da400cSJung-uk Kim #define APM_TIMERREQUESTS 0x13 59*19da400cSJung-uk Kim #define APM_OEMFUNC 0x80 60*19da400cSJung-uk Kim 61*19da400cSJung-uk Kim /* error code */ 62*19da400cSJung-uk Kim #define APME_OK 0x00 63*19da400cSJung-uk Kim #define APME_PMDISABLED 0x01 64*19da400cSJung-uk Kim #define APME_REALESTABLISHED 0x02 65*19da400cSJung-uk Kim #define APME_NOTCONNECTED 0x03 66*19da400cSJung-uk Kim #define APME_PROT16ESTABLISHED 0x05 67*19da400cSJung-uk Kim #define APME_PROT16NOTSUPPORTED 0x06 68*19da400cSJung-uk Kim #define APME_PROT32ESTABLISHED 0x07 69*19da400cSJung-uk Kim #define APME_PROT32NOTDUPPORTED 0x08 70*19da400cSJung-uk Kim #define APME_UNKNOWNDEVICEID 0x09 71*19da400cSJung-uk Kim #define APME_OUTOFRANGE 0x0a 72*19da400cSJung-uk Kim #define APME_NOTENGAGED 0x0b 73*19da400cSJung-uk Kim #define APME_CANTENTERSTATE 0x60 74*19da400cSJung-uk Kim #define APME_NOPMEVENT 0x80 75*19da400cSJung-uk Kim #define APME_NOAPMPRESENT 0x86 76*19da400cSJung-uk Kim 77*19da400cSJung-uk Kim /* device code */ 78*19da400cSJung-uk Kim #define PMDV_APMBIOS 0x0000 79*19da400cSJung-uk Kim #define PMDV_ALLDEV 0x0001 80*19da400cSJung-uk Kim #define PMDV_DISP0 0x0100 81*19da400cSJung-uk Kim #define PMDV_DISP1 0x0101 82*19da400cSJung-uk Kim #define PMDV_DISPALL 0x01ff 83*19da400cSJung-uk Kim #define PMDV_2NDSTORAGE0 0x0200 84*19da400cSJung-uk Kim #define PMDV_2NDSTORAGE1 0x0201 85*19da400cSJung-uk Kim #define PMDV_2NDSTORAGE2 0x0202 86*19da400cSJung-uk Kim #define PMDV_2NDSTORAGE3 0x0203 87*19da400cSJung-uk Kim #define PMDV_PARALLEL0 0x0300 88*19da400cSJung-uk Kim #define PMDV_PARALLEL1 0x0301 89*19da400cSJung-uk Kim #define PMDV_SERIAL0 0x0400 90*19da400cSJung-uk Kim #define PMDV_SERIAL1 0x0401 91*19da400cSJung-uk Kim #define PMDV_SERIAL2 0x0402 92*19da400cSJung-uk Kim #define PMDV_SERIAL3 0x0403 93*19da400cSJung-uk Kim #define PMDV_SERIAL4 0x0404 94*19da400cSJung-uk Kim #define PMDV_SERIAL5 0x0405 95*19da400cSJung-uk Kim #define PMDV_SERIAL6 0x0406 96*19da400cSJung-uk Kim #define PMDV_SERIAL7 0x0407 97*19da400cSJung-uk Kim #define PMDV_NET0 0x0500 98*19da400cSJung-uk Kim #define PMDV_NET1 0x0501 99*19da400cSJung-uk Kim #define PMDV_NET2 0x0502 100*19da400cSJung-uk Kim #define PMDV_NET3 0x0503 101*19da400cSJung-uk Kim #define PMDV_PCMCIA0 0x0600 102*19da400cSJung-uk Kim #define PMDV_PCMCIA1 0x0601 103*19da400cSJung-uk Kim #define PMDV_PCMCIA2 0x0602 104*19da400cSJung-uk Kim #define PMDV_PCMCIA3 0x0603 105*19da400cSJung-uk Kim /* 0x0700 - 0x7fff Reserved */ 106*19da400cSJung-uk Kim #define PMDV_BATT_BASE 0x8000 107*19da400cSJung-uk Kim #define PMDV_BATT0 0x8001 108*19da400cSJung-uk Kim #define PMDV_BATT1 0x8002 109*19da400cSJung-uk Kim #define PMDV_BATT_ALL 0x80ff 110*19da400cSJung-uk Kim /* 0x8100 - 0xdfff Reserved */ 111*19da400cSJung-uk Kim /* 0xe000 - 0xefff OEM-defined power device IDs */ 112*19da400cSJung-uk Kim /* 0xf000 - 0xffff Reserved */ 113*19da400cSJung-uk Kim 114*19da400cSJung-uk Kim /* Power state */ 115*19da400cSJung-uk Kim #define PMST_APMENABLED 0x0000 116*19da400cSJung-uk Kim #define PMST_STANDBY 0x0001 117*19da400cSJung-uk Kim #define PMST_SUSPEND 0x0002 118*19da400cSJung-uk Kim #define PMST_OFF 0x0003 119*19da400cSJung-uk Kim #define PMST_LASTREQNOTIFY 0x0004 120*19da400cSJung-uk Kim #define PMST_LASTREQREJECT 0x0005 121*19da400cSJung-uk Kim /* 0x0006 - 0x001f Reserved system states */ 122*19da400cSJung-uk Kim /* 0x0020 - 0x003f OEM-defined system states */ 123*19da400cSJung-uk Kim /* 0x0040 - 0x007f OEM-defined device states */ 124*19da400cSJung-uk Kim /* 0x0080 - 0xffff Reserved device states */ 125*19da400cSJung-uk Kim 126*19da400cSJung-uk Kim #if !defined(ASSEMBLER) && !defined(INITIALIZER) 127*19da400cSJung-uk Kim 128*19da400cSJung-uk Kim /* C definitions */ 129*19da400cSJung-uk Kim struct apmhook { 130*19da400cSJung-uk Kim struct apmhook *ah_next; 131*19da400cSJung-uk Kim int (*ah_fun)(void *ah_arg); 132*19da400cSJung-uk Kim void *ah_arg; 133*19da400cSJung-uk Kim const char *ah_name; 134*19da400cSJung-uk Kim int ah_order; 135*19da400cSJung-uk Kim }; 136*19da400cSJung-uk Kim #define APM_HOOK_NONE (-1) 137*19da400cSJung-uk Kim #define APM_HOOK_SUSPEND 0 138*19da400cSJung-uk Kim #define APM_HOOK_RESUME 1 139*19da400cSJung-uk Kim #define NAPM_HOOK 2 140*19da400cSJung-uk Kim 141*19da400cSJung-uk Kim #ifdef _KERNEL 142*19da400cSJung-uk Kim 143*19da400cSJung-uk Kim void apm_suspend(int state); 144*19da400cSJung-uk Kim struct apmhook *apm_hook_establish (int apmh, struct apmhook *); 145*19da400cSJung-uk Kim void apm_hook_disestablish (int apmh, struct apmhook *); 146*19da400cSJung-uk Kim void apm_cpu_idle(void); 147*19da400cSJung-uk Kim void apm_cpu_busy(void); 148*19da400cSJung-uk Kim 149*19da400cSJung-uk Kim #endif 150*19da400cSJung-uk Kim 151*19da400cSJung-uk Kim #endif /* !ASSEMBLER && !INITIALIZER */ 152*19da400cSJung-uk Kim 153*19da400cSJung-uk Kim #define APM_MIN_ORDER 0x00 154*19da400cSJung-uk Kim #define APM_MID_ORDER 0x80 155*19da400cSJung-uk Kim #define APM_MAX_ORDER 0xff 156*19da400cSJung-uk Kim 157*19da400cSJung-uk Kim /* power management event code */ 158*19da400cSJung-uk Kim #define PMEV_NOEVENT 0x0000 159*19da400cSJung-uk Kim #define PMEV_STANDBYREQ 0x0001 160*19da400cSJung-uk Kim #define PMEV_SUSPENDREQ 0x0002 161*19da400cSJung-uk Kim #define PMEV_NORMRESUME 0x0003 162*19da400cSJung-uk Kim #define PMEV_CRITRESUME 0x0004 163*19da400cSJung-uk Kim #define PMEV_BATTERYLOW 0x0005 164*19da400cSJung-uk Kim #define PMEV_POWERSTATECHANGE 0x0006 165*19da400cSJung-uk Kim #define PMEV_UPDATETIME 0x0007 166*19da400cSJung-uk Kim #define PMEV_CRITSUSPEND 0x0008 167*19da400cSJung-uk Kim #define PMEV_USERSTANDBYREQ 0x0009 168*19da400cSJung-uk Kim #define PMEV_USERSUSPENDREQ 0x000a 169*19da400cSJung-uk Kim #define PMEV_STANDBYRESUME 0x000b 170*19da400cSJung-uk Kim #define PMEV_CAPABILITIESCHANGE 0x000c 171*19da400cSJung-uk Kim /* 0x000d - 0x00ff Reserved system events */ 172*19da400cSJung-uk Kim /* 0x0100 - 0x01ff Reserved device events */ 173*19da400cSJung-uk Kim /* 0x0200 - 0x02ff OEM-defined APM events */ 174*19da400cSJung-uk Kim /* 0x0300 - 0xffff Reserved */ 175*19da400cSJung-uk Kim #define PMEV_DEFAULT 0xffffffff /* used for customization */ 176*19da400cSJung-uk Kim 177*19da400cSJung-uk Kim #if !defined(ASSEMBLER) && !defined(INITIALIZER) 178*19da400cSJung-uk Kim 179*19da400cSJung-uk Kim /* 180*19da400cSJung-uk Kim * Old apm_info structure, returned by the APMIO_GETINFO_OLD ioctl. This 181*19da400cSJung-uk Kim * is for backward compatibility with old executables. 182*19da400cSJung-uk Kim */ 183*19da400cSJung-uk Kim typedef struct apm_info_old { 184*19da400cSJung-uk Kim u_int ai_major; /* APM major version */ 185*19da400cSJung-uk Kim u_int ai_minor; /* APM minor version */ 186*19da400cSJung-uk Kim u_int ai_acline; /* AC line status */ 187*19da400cSJung-uk Kim u_int ai_batt_stat; /* Battery status */ 188*19da400cSJung-uk Kim u_int ai_batt_life; /* Remaining battery life */ 189*19da400cSJung-uk Kim u_int ai_status; /* Status of APM support (enabled/disabled) */ 190*19da400cSJung-uk Kim } *apm_info_old_t; 191*19da400cSJung-uk Kim 192*19da400cSJung-uk Kim /* 193*19da400cSJung-uk Kim * Structure returned by the APMIO_GETINFO ioctl. 194*19da400cSJung-uk Kim * 195*19da400cSJung-uk Kim * In the comments below, the parenthesized numbers indicate the minimum 196*19da400cSJung-uk Kim * value of ai_infoversion for which each field is valid. 197*19da400cSJung-uk Kim */ 198*19da400cSJung-uk Kim typedef struct apm_info { 199*19da400cSJung-uk Kim u_int ai_infoversion; /* Indicates which fields are valid */ 200*19da400cSJung-uk Kim u_int ai_major; /* APM major version (0) */ 201*19da400cSJung-uk Kim u_int ai_minor; /* APM minor version (0) */ 202*19da400cSJung-uk Kim u_int ai_acline; /* AC line status (0) */ 203*19da400cSJung-uk Kim u_int ai_batt_stat; /* Battery status (0) */ 204*19da400cSJung-uk Kim u_int ai_batt_life; /* Remaining battery life in percent (0) */ 205*19da400cSJung-uk Kim int ai_batt_time; /* Remaining battery time in seconds (0) */ 206*19da400cSJung-uk Kim u_int ai_status; /* True if enabled (0) */ 207*19da400cSJung-uk Kim u_int ai_batteries; /* Number of batteries (1) */ 208*19da400cSJung-uk Kim u_int ai_capabilities;/* APM Capabilities (1) */ 209*19da400cSJung-uk Kim u_int ai_spare[6]; /* For future expansion */ 210*19da400cSJung-uk Kim } *apm_info_t; 211*19da400cSJung-uk Kim 212*19da400cSJung-uk Kim /* Battery flag */ 213*19da400cSJung-uk Kim #define APM_BATT_HIGH 0x01 214*19da400cSJung-uk Kim #define APM_BATT_LOW 0x02 215*19da400cSJung-uk Kim #define APM_BATT_CRITICAL 0x04 216*19da400cSJung-uk Kim #define APM_BATT_CHARGING 0x08 217*19da400cSJung-uk Kim #define APM_BATT_NOT_PRESENT 0x10 218*19da400cSJung-uk Kim #define APM_BATT_NO_SYSTEM 0x80 219*19da400cSJung-uk Kim 220*19da400cSJung-uk Kim typedef struct apm_pwstatus { 221*19da400cSJung-uk Kim u_int ap_device; /* Device code of battery */ 222*19da400cSJung-uk Kim u_int ap_acline; /* AC line status (0) */ 223*19da400cSJung-uk Kim u_int ap_batt_stat; /* Battery status (0) */ 224*19da400cSJung-uk Kim u_int ap_batt_flag; /* Battery flag (0) */ 225*19da400cSJung-uk Kim u_int ap_batt_life; /* Remaining battery life in percent (0) */ 226*19da400cSJung-uk Kim int ap_batt_time; /* Remaining battery time in seconds (0) */ 227*19da400cSJung-uk Kim } *apm_pwstatus_t; 228*19da400cSJung-uk Kim 229*19da400cSJung-uk Kim struct apm_bios_arg { 230*19da400cSJung-uk Kim uint32_t eax; 231*19da400cSJung-uk Kim uint32_t ebx; 232*19da400cSJung-uk Kim uint32_t ecx; 233*19da400cSJung-uk Kim uint32_t edx; 234*19da400cSJung-uk Kim uint32_t esi; 235*19da400cSJung-uk Kim uint32_t edi; 236*19da400cSJung-uk Kim }; 237*19da400cSJung-uk Kim 238*19da400cSJung-uk Kim struct apm_event_info { 239*19da400cSJung-uk Kim u_int type; 240*19da400cSJung-uk Kim u_int index; 241*19da400cSJung-uk Kim u_int spare[8]; 242*19da400cSJung-uk Kim }; 243*19da400cSJung-uk Kim 244*19da400cSJung-uk Kim #define APMIO_SUSPEND _IO('P', 1) 245*19da400cSJung-uk Kim #define APMIO_GETINFO_OLD _IOR('P', 2, struct apm_info_old) 246*19da400cSJung-uk Kim #define APMIO_ENABLE _IO('P', 5) 247*19da400cSJung-uk Kim #define APMIO_DISABLE _IO('P', 6) 248*19da400cSJung-uk Kim #define APMIO_HALTCPU _IO('P', 7) 249*19da400cSJung-uk Kim #define APMIO_NOTHALTCPU _IO('P', 8) 250*19da400cSJung-uk Kim #define APMIO_DISPLAY _IOW('P', 9, int) 251*19da400cSJung-uk Kim #define APMIO_BIOS _IOWR('P', 10, struct apm_bios_arg) 252*19da400cSJung-uk Kim #define APMIO_GETINFO _IOR('P', 11, struct apm_info) 253*19da400cSJung-uk Kim #define APMIO_STANDBY _IO('P', 12) 254*19da400cSJung-uk Kim #define APMIO_GETPWSTATUS _IOWR('P', 13, struct apm_pwstatus) 255*19da400cSJung-uk Kim /* for /dev/apmctl */ 256*19da400cSJung-uk Kim #define APMIO_NEXTEVENT _IOR('A', 100, struct apm_event_info) 257*19da400cSJung-uk Kim #define APMIO_REJECTLASTREQ _IO('P', 101) 258*19da400cSJung-uk Kim 259*19da400cSJung-uk Kim #endif /* !ASSEMBLER && !INITIALIZER */ 260*19da400cSJung-uk Kim 261*19da400cSJung-uk Kim #endif /* !_X86_APM_BIOS_H_ */ 262