1cd32ac64SAdrian Chadd /*- 2*4d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause 3cd32ac64SAdrian Chadd * 4cd32ac64SAdrian Chadd * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org> 5cd32ac64SAdrian Chadd * 6cd32ac64SAdrian Chadd * Redistribution and use in source and binary forms, with or without 7cd32ac64SAdrian Chadd * modification, are permitted provided that the following conditions 8cd32ac64SAdrian Chadd * are met: 9cd32ac64SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 10cd32ac64SAdrian Chadd * notice, this list of conditions and the following disclaimer. 11cd32ac64SAdrian Chadd * 2. Redistributions in binary form must reproduce the above copyright 12cd32ac64SAdrian Chadd * notice, this list of conditions and the following disclaimer in the 13cd32ac64SAdrian Chadd * documentation and/or other materials provided with the distribution. 14cd32ac64SAdrian Chadd * 15cd32ac64SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16cd32ac64SAdrian Chadd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17cd32ac64SAdrian Chadd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18cd32ac64SAdrian Chadd * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19cd32ac64SAdrian Chadd * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20cd32ac64SAdrian Chadd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21cd32ac64SAdrian Chadd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22cd32ac64SAdrian Chadd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23cd32ac64SAdrian Chadd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24cd32ac64SAdrian Chadd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25cd32ac64SAdrian Chadd * SUCH DAMAGE. 26cd32ac64SAdrian Chadd */ 27cd32ac64SAdrian Chadd 28cd32ac64SAdrian Chadd #ifndef __QCOM_GCC_IPQ4018_VAR_H__ 29cd32ac64SAdrian Chadd #define __QCOM_GCC_IPQ4018_VAR_H__ 30cd32ac64SAdrian Chadd 31cd32ac64SAdrian Chadd struct qcom_gcc_ipq4018_reset_entry { 32cd32ac64SAdrian Chadd uint32_t reg; 33cd32ac64SAdrian Chadd uint32_t bit; 34cd32ac64SAdrian Chadd }; 35cd32ac64SAdrian Chadd 36cd32ac64SAdrian Chadd struct qcom_gcc_ipq4018_softc { 37cd32ac64SAdrian Chadd device_t dev; 38cd32ac64SAdrian Chadd int reg_rid; 39cd32ac64SAdrian Chadd struct resource *reg; 40cd32ac64SAdrian Chadd struct mtx mtx; 41cd32ac64SAdrian Chadd struct clkdom *clkdom; 42cd32ac64SAdrian Chadd }; 43cd32ac64SAdrian Chadd 44cd32ac64SAdrian Chadd /* 45cd32ac64SAdrian Chadd * reset block 46cd32ac64SAdrian Chadd */ 47cd32ac64SAdrian Chadd extern int qcom_gcc_ipq4018_hwreset_assert(device_t dev, intptr_t id, 48cd32ac64SAdrian Chadd bool reset); 49cd32ac64SAdrian Chadd extern int qcom_gcc_ipq4018_hwreset_is_asserted(device_t dev, intptr_t id, 50cd32ac64SAdrian Chadd bool *reset); 51cd32ac64SAdrian Chadd 52cd32ac64SAdrian Chadd /* 53cd32ac64SAdrian Chadd * clock block 54cd32ac64SAdrian Chadd */ 55cd32ac64SAdrian Chadd extern int qcom_gcc_ipq4018_clock_read(device_t dev, bus_addr_t addr, 56cd32ac64SAdrian Chadd uint32_t *val); 57cd32ac64SAdrian Chadd extern int qcom_gcc_ipq4018_clock_write(device_t dev, bus_addr_t addr, 58cd32ac64SAdrian Chadd uint32_t val); 59cd32ac64SAdrian Chadd extern int qcom_gcc_ipq4018_clock_modify(device_t dev, bus_addr_t addr, 60cd32ac64SAdrian Chadd uint32_t clear_mask, uint32_t set_mask); 61cd32ac64SAdrian Chadd extern void qcom_gcc_ipq4018_clock_setup(struct qcom_gcc_ipq4018_softc *sc); 62cd32ac64SAdrian Chadd extern void qcom_gcc_ipq4018_clock_lock(device_t dev); 63cd32ac64SAdrian Chadd extern void qcom_gcc_ipq4018_clock_unlock(device_t dev); 64cd32ac64SAdrian Chadd 65cd32ac64SAdrian Chadd #endif /* __QCOM_GCC_IPQ4018_VAR_H__ */ 66