xref: /freebsd-src/sys/dev/mps/mpi/mpi2_ra.h (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
1d043c564SKenneth D. Merry /*-
2*4d846d26SWarner Losh  * SPDX-License-Identifier: BSD-2-Clause
3718cf2ccSPedro F. Giffuni  *
4ef065d89SStephen McConnell  * Copyright (c) 2009-2015 LSI Corp.
5ef065d89SStephen McConnell  * Copyright (c) 2013-2015 Avago Technologies
6d043c564SKenneth D. Merry  * All rights reserved.
7d043c564SKenneth D. Merry  *
8d043c564SKenneth D. Merry  * Redistribution and use in source and binary forms, with or without
9d043c564SKenneth D. Merry  * modification, are permitted provided that the following conditions
10d043c564SKenneth D. Merry  * are met:
11d043c564SKenneth D. Merry  * 1. Redistributions of source code must retain the above copyright
12d043c564SKenneth D. Merry  *    notice, this list of conditions and the following disclaimer.
13d043c564SKenneth D. Merry  * 2. Redistributions in binary form must reproduce the above copyright
14d043c564SKenneth D. Merry  *    notice, this list of conditions and the following disclaimer in the
15d043c564SKenneth D. Merry  *    documentation and/or other materials provided with the distribution.
16d043c564SKenneth D. Merry  *
17d043c564SKenneth D. Merry  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18d043c564SKenneth D. Merry  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19d043c564SKenneth D. Merry  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20d043c564SKenneth D. Merry  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21d043c564SKenneth D. Merry  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22d043c564SKenneth D. Merry  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23d043c564SKenneth D. Merry  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24d043c564SKenneth D. Merry  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25d043c564SKenneth D. Merry  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26d043c564SKenneth D. Merry  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27d043c564SKenneth D. Merry  * SUCH DAMAGE.
28d043c564SKenneth D. Merry  *
29ef065d89SStephen McConnell  * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
30d043c564SKenneth D. Merry  */
31d043c564SKenneth D. Merry 
32d3c7b9a0SKenneth D. Merry /*
33ef065d89SStephen McConnell  *  Copyright (c) 2009-2015 LSI Corporation.
34ef065d89SStephen McConnell  *  Copyright (c) 2013-2015 Avago Technologies
35d3c7b9a0SKenneth D. Merry  *
36d3c7b9a0SKenneth D. Merry  *
37d3c7b9a0SKenneth D. Merry  *           Name:  mpi2_ra.h
38d3c7b9a0SKenneth D. Merry  *          Title:  MPI RAID Accelerator messages and structures
39d3c7b9a0SKenneth D. Merry  *  Creation Date:  April 13, 2009
40d3c7b9a0SKenneth D. Merry  *
41d3c7b9a0SKenneth D. Merry  *  mpi2_ra.h Version:  02.00.00
42d3c7b9a0SKenneth D. Merry  *
43d3c7b9a0SKenneth D. Merry  *  Version History
44d3c7b9a0SKenneth D. Merry  *  ---------------
45d3c7b9a0SKenneth D. Merry  *
46d3c7b9a0SKenneth D. Merry  *  Date      Version   Description
47d3c7b9a0SKenneth D. Merry  *  --------  --------  ------------------------------------------------------
48d3c7b9a0SKenneth D. Merry  *  05-06-09  02.00.00  Initial version.
49d3c7b9a0SKenneth D. Merry  *  --------------------------------------------------------------------------
50d3c7b9a0SKenneth D. Merry  */
51d3c7b9a0SKenneth D. Merry 
52d3c7b9a0SKenneth D. Merry #ifndef MPI2_RA_H
53d3c7b9a0SKenneth D. Merry #define MPI2_RA_H
54d3c7b9a0SKenneth D. Merry 
55d3c7b9a0SKenneth D. Merry /* generic structure for RAID Accelerator Control Block */
56d3c7b9a0SKenneth D. Merry typedef struct _MPI2_RAID_ACCELERATOR_CONTROL_BLOCK
57d3c7b9a0SKenneth D. Merry {
58d3c7b9a0SKenneth D. Merry     U32                 Reserved[8];                /* 0x00 */
59d3c7b9a0SKenneth D. Merry     U32                 RaidAcceleratorCDB[1];      /* 0x20 */
60d3c7b9a0SKenneth D. Merry } MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
61d3c7b9a0SKenneth D. Merry   MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
62d3c7b9a0SKenneth D. Merry   Mpi2RAIDAcceleratorControlBlock_t,
63d3c7b9a0SKenneth D. Merry   MPI2_POINTER pMpi2RAIDAcceleratorControlBlock_t;
64d3c7b9a0SKenneth D. Merry 
65d3c7b9a0SKenneth D. Merry /******************************************************************************
66d3c7b9a0SKenneth D. Merry *
67d3c7b9a0SKenneth D. Merry *        RAID Accelerator Messages
68d3c7b9a0SKenneth D. Merry *
69d3c7b9a0SKenneth D. Merry *******************************************************************************/
70d3c7b9a0SKenneth D. Merry 
71d3c7b9a0SKenneth D. Merry /* RAID Accelerator Request Message */
72d3c7b9a0SKenneth D. Merry typedef struct _MPI2_RAID_ACCELERATOR_REQUEST
73d3c7b9a0SKenneth D. Merry {
74d3c7b9a0SKenneth D. Merry     U16                     Reserved0;                          /* 0x00 */
75d3c7b9a0SKenneth D. Merry     U8                      ChainOffset;                        /* 0x02 */
76d3c7b9a0SKenneth D. Merry     U8                      Function;                           /* 0x03 */
77d3c7b9a0SKenneth D. Merry     U16                     Reserved1;                          /* 0x04 */
78d3c7b9a0SKenneth D. Merry     U8                      Reserved2;                          /* 0x06 */
79d3c7b9a0SKenneth D. Merry     U8                      MsgFlags;                           /* 0x07 */
80d3c7b9a0SKenneth D. Merry     U8                      VP_ID;                              /* 0x08 */
81d3c7b9a0SKenneth D. Merry     U8                      VF_ID;                              /* 0x09 */
82d3c7b9a0SKenneth D. Merry     U16                     Reserved3;                          /* 0x0A */
83d3c7b9a0SKenneth D. Merry     U64                     RaidAcceleratorControlBlockAddress; /* 0x0C */
84d3c7b9a0SKenneth D. Merry     U8                      DmaEngineNumber;                    /* 0x14 */
85d3c7b9a0SKenneth D. Merry     U8                      Reserved4;                          /* 0x15 */
86d3c7b9a0SKenneth D. Merry     U16                     Reserved5;                          /* 0x16 */
87d3c7b9a0SKenneth D. Merry     U32                     Reserved6;                          /* 0x18 */
88d3c7b9a0SKenneth D. Merry     U32                     Reserved7;                          /* 0x1C */
89d3c7b9a0SKenneth D. Merry     U32                     Reserved8;                          /* 0x20 */
90d3c7b9a0SKenneth D. Merry } MPI2_RAID_ACCELERATOR_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REQUEST,
91d3c7b9a0SKenneth D. Merry   Mpi2RAIDAcceleratorRequest_t, MPI2_POINTER pMpi2RAIDAcceleratorRequest_t;
92d3c7b9a0SKenneth D. Merry 
93d3c7b9a0SKenneth D. Merry /* RAID Accelerator Error Reply Message */
94d3c7b9a0SKenneth D. Merry typedef struct _MPI2_RAID_ACCELERATOR_REPLY
95d3c7b9a0SKenneth D. Merry {
96d3c7b9a0SKenneth D. Merry     U16                     Reserved0;                      /* 0x00 */
97d3c7b9a0SKenneth D. Merry     U8                      MsgLength;                      /* 0x02 */
98d3c7b9a0SKenneth D. Merry     U8                      Function;                       /* 0x03 */
99d3c7b9a0SKenneth D. Merry     U16                     Reserved1;                      /* 0x04 */
100d3c7b9a0SKenneth D. Merry     U8                      Reserved2;                      /* 0x06 */
101d3c7b9a0SKenneth D. Merry     U8                      MsgFlags;                       /* 0x07 */
102d3c7b9a0SKenneth D. Merry     U8                      VP_ID;                          /* 0x08 */
103d3c7b9a0SKenneth D. Merry     U8                      VF_ID;                          /* 0x09 */
104d3c7b9a0SKenneth D. Merry     U16                     Reserved3;                      /* 0x0A */
105d3c7b9a0SKenneth D. Merry     U16                     Reserved4;                      /* 0x0C */
106d3c7b9a0SKenneth D. Merry     U16                     IOCStatus;                      /* 0x0E */
107d3c7b9a0SKenneth D. Merry     U32                     IOCLogInfo;                     /* 0x10 */
108d3c7b9a0SKenneth D. Merry     U32                     ProductSpecificData[3];         /* 0x14 */
109d3c7b9a0SKenneth D. Merry } MPI2_RAID_ACCELERATOR_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REPLY,
110d3c7b9a0SKenneth D. Merry   Mpi2RAIDAcceleratorReply_t, MPI2_POINTER pMpi2RAIDAcceleratorReply_t;
111d3c7b9a0SKenneth D. Merry 
112d3c7b9a0SKenneth D. Merry #endif
113