xref: /freebsd-src/sys/dev/mpi3mr/mpi3mr_cam.h (revision 3f3a15543a6721100dda0e4219eb48ecbe35731a)
12d1d418eSSumit Saxena /*
22d1d418eSSumit Saxena  * SPDX-License-Identifier: BSD-2-Clause
32d1d418eSSumit Saxena  *
4945c3ce4SChandrakanth patil  * Copyright (c) 2020-2024, Broadcom Inc. All rights reserved.
52d1d418eSSumit Saxena  * Support: <fbsd-storage-driver.pdl@broadcom.com>
62d1d418eSSumit Saxena  *
72d1d418eSSumit Saxena  * Authors: Sumit Saxena <sumit.saxena@broadcom.com>
82d1d418eSSumit Saxena  *	    Chandrakanth Patil <chandrakanth.patil@broadcom.com>
92d1d418eSSumit Saxena  *
102d1d418eSSumit Saxena  * Redistribution and use in source and binary forms, with or without
112d1d418eSSumit Saxena  * modification, are permitted provided that the following conditions are
122d1d418eSSumit Saxena  * met:
132d1d418eSSumit Saxena  *
142d1d418eSSumit Saxena  * 1. Redistributions of source code must retain the above copyright notice,
152d1d418eSSumit Saxena  *    this list of conditions and the following disclaimer.
162d1d418eSSumit Saxena  * 2. Redistributions in binary form must reproduce the above copyright notice,
172d1d418eSSumit Saxena  *    this list of conditions and the following disclaimer in the documentation and/or other
182d1d418eSSumit Saxena  *    materials provided with the distribution.
192d1d418eSSumit Saxena  * 3. Neither the name of the Broadcom Inc. nor the names of its contributors
202d1d418eSSumit Saxena  *    may be used to endorse or promote products derived from this software without
212d1d418eSSumit Saxena  *    specific prior written permission.
222d1d418eSSumit Saxena  *
232d1d418eSSumit Saxena  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
242d1d418eSSumit Saxena  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
252d1d418eSSumit Saxena  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
262d1d418eSSumit Saxena  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
272d1d418eSSumit Saxena  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
282d1d418eSSumit Saxena  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
292d1d418eSSumit Saxena  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
302d1d418eSSumit Saxena  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
312d1d418eSSumit Saxena  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
322d1d418eSSumit Saxena  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
332d1d418eSSumit Saxena  * POSSIBILITY OF SUCH DAMAGE.
342d1d418eSSumit Saxena  *
352d1d418eSSumit Saxena  * The views and conclusions contained in the software and documentation are
362d1d418eSSumit Saxena  * those of the authors and should not be interpreted as representing
372d1d418eSSumit Saxena  * official policies,either expressed or implied, of the FreeBSD Project.
382d1d418eSSumit Saxena  *
392d1d418eSSumit Saxena  * Mail to: Broadcom Inc 1320 Ridder Park Dr, San Jose, CA 95131
402d1d418eSSumit Saxena  *
412d1d418eSSumit Saxena  * Broadcom Inc. (Broadcom) MPI3MR Adapter FreeBSD
422d1d418eSSumit Saxena  */
432d1d418eSSumit Saxena #include "mpi3mr.h"
442d1d418eSSumit Saxena 
452d1d418eSSumit Saxena struct mpi3mr_fw_event_work;
462d1d418eSSumit Saxena 
472d1d418eSSumit Saxena struct mpi3mr_throttle_group_info {
482d1d418eSSumit Saxena 	U8 io_divert;
492d1d418eSSumit Saxena 	U16 fw_qd;
502d1d418eSSumit Saxena 	U16 modified_qd;
512d1d418eSSumit Saxena 	U16 id;
522d1d418eSSumit Saxena 	U32 high;
532d1d418eSSumit Saxena 	U32 low;
542d1d418eSSumit Saxena 	mpi3mr_atomic_t pend_large_data_sz;
552d1d418eSSumit Saxena };
562d1d418eSSumit Saxena 
572d1d418eSSumit Saxena struct mpi3mr_tgt_dev_sassata {
582d1d418eSSumit Saxena 	U64 sas_address;
592d1d418eSSumit Saxena 	U16 dev_info;
602d1d418eSSumit Saxena };
612d1d418eSSumit Saxena 
622d1d418eSSumit Saxena struct mpi3mr_tgt_dev_pcie {
632d1d418eSSumit Saxena 	U32 mdts;
642d1d418eSSumit Saxena 	U16 capb;
652d1d418eSSumit Saxena 	U8 pgsz;
662d1d418eSSumit Saxena 	U8 abort_to;
672d1d418eSSumit Saxena 	U8 reset_to;
682d1d418eSSumit Saxena 	U16 dev_info;
692d1d418eSSumit Saxena };
702d1d418eSSumit Saxena 
712d1d418eSSumit Saxena struct mpi3mr_tgt_dev_volume {
722d1d418eSSumit Saxena 	U8 state;
732d1d418eSSumit Saxena 	U16 tg_id;
742d1d418eSSumit Saxena 	U32 tg_high;
752d1d418eSSumit Saxena 	U32 tg_low;
762d1d418eSSumit Saxena 	struct mpi3mr_throttle_group_info *tg;
772d1d418eSSumit Saxena };
782d1d418eSSumit Saxena 
792d1d418eSSumit Saxena typedef union _mpi3mr_form_spec_inf {
802d1d418eSSumit Saxena 	struct mpi3mr_tgt_dev_sassata sassata_inf;
812d1d418eSSumit Saxena 	struct mpi3mr_tgt_dev_pcie pcie_inf;
822d1d418eSSumit Saxena 	struct mpi3mr_tgt_dev_volume vol_inf;
832d1d418eSSumit Saxena } mpi3mr_form_spec_inf;
842d1d418eSSumit Saxena 
852d1d418eSSumit Saxena struct mpi3mr_target {
862d1d418eSSumit Saxena 	uint16_t dev_handle;
872d1d418eSSumit Saxena 	uint16_t slot;
882d1d418eSSumit Saxena 	uint16_t per_id;
892d1d418eSSumit Saxena 	uint8_t dev_type;
902d1d418eSSumit Saxena 	volatile uint8_t	is_hidden;
912d1d418eSSumit Saxena 	volatile uint8_t	dev_removed;
922d1d418eSSumit Saxena 	U8 dev_removedelay;
932d1d418eSSumit Saxena 	mpi3mr_atomic_t block_io;
942d1d418eSSumit Saxena 	uint8_t exposed_to_os;
952d1d418eSSumit Saxena 	uint16_t qdepth;
962d1d418eSSumit Saxena 	uint64_t wwid;
972d1d418eSSumit Saxena 	mpi3mr_form_spec_inf dev_spec;
982d1d418eSSumit Saxena 	uint16_t	tid;
992d1d418eSSumit Saxena 	uint16_t        exp_dev_handle;
1002d1d418eSSumit Saxena 	uint16_t        phy_num;
1012d1d418eSSumit Saxena 	uint64_t	sasaddr;
1022d1d418eSSumit Saxena 	uint16_t	parent_handle;
1032d1d418eSSumit Saxena 	uint64_t	parent_sasaddr;
1042d1d418eSSumit Saxena 	uint32_t	parent_devinfo;
1052d1d418eSSumit Saxena 	mpi3mr_atomic_t outstanding;
1062d1d418eSSumit Saxena 	uint8_t		scsi_req_desc_type;
1072d1d418eSSumit Saxena 	TAILQ_ENTRY(mpi3mr_target)	tgt_next;
1082d1d418eSSumit Saxena 	uint16_t	handle;
1092d1d418eSSumit Saxena 	uint8_t		link_rate;
1102d1d418eSSumit Saxena 	uint8_t		encl_level_valid;
1112d1d418eSSumit Saxena 	uint8_t		encl_level;
1122d1d418eSSumit Saxena 	char		connector_name[4];
1132d1d418eSSumit Saxena 	uint64_t	devname;
1142d1d418eSSumit Saxena 	uint32_t	devinfo;
1152d1d418eSSumit Saxena 	uint16_t	encl_handle;
1162d1d418eSSumit Saxena 	uint16_t	encl_slot;
1172d1d418eSSumit Saxena 	uint8_t		flags;
1182d1d418eSSumit Saxena #define MPI3MRSAS_TARGET_INREMOVAL	(1 << 3)
1192d1d418eSSumit Saxena 	uint8_t		io_throttle_enabled;
1202d1d418eSSumit Saxena 	uint8_t		io_divert;
1212d1d418eSSumit Saxena 	struct mpi3mr_throttle_group_info *throttle_group;
1222d1d418eSSumit Saxena 	uint64_t	q_depth;
1232d1d418eSSumit Saxena 	enum mpi3mr_target_state state;
124*3f3a1554SChandrakanth patil 	uint16_t	ws_len;
1252d1d418eSSumit Saxena };
1262d1d418eSSumit Saxena 
1272d1d418eSSumit Saxena struct mpi3mr_cam_softc {
1282d1d418eSSumit Saxena 	struct mpi3mr_softc	*sc;
1292d1d418eSSumit Saxena 	u_int			flags;
1302d1d418eSSumit Saxena #define MPI3MRSAS_IN_DISCOVERY	(1 << 0)
1312d1d418eSSumit Saxena #define MPI3MRSAS_IN_STARTUP	(1 << 1)
1322d1d418eSSumit Saxena #define MPI3MRSAS_DISCOVERY_TIMEOUT_PENDING	(1 << 2)
1332d1d418eSSumit Saxena #define MPI3MRSAS_QUEUE_FROZEN	(1 << 3)
1342d1d418eSSumit Saxena #define	MPI3MRSAS_SHUTDOWN		(1 << 4)
1352d1d418eSSumit Saxena 	u_int			maxtargets;
1362d1d418eSSumit Saxena 	struct cam_devq		*devq;
1372d1d418eSSumit Saxena 	struct cam_sim		*sim;
1382d1d418eSSumit Saxena 	struct cam_path		*path;
1392d1d418eSSumit Saxena 	struct intr_config_hook	sas_ich;
1402d1d418eSSumit Saxena 	struct callout		discovery_callout;
1412d1d418eSSumit Saxena 	struct mpi3mr_event_handle	*mpi3mr_eh;
1422d1d418eSSumit Saxena 
1432d1d418eSSumit Saxena 	u_int                   startup_refcount;
1442d1d418eSSumit Saxena 	struct proc             *sysctl_proc;
1452d1d418eSSumit Saxena 	struct taskqueue	*ev_tq;
1462d1d418eSSumit Saxena 	struct task		ev_task;
1472d1d418eSSumit Saxena 	TAILQ_HEAD(, mpi3mr_fw_event_work)	ev_queue;
1482d1d418eSSumit Saxena 	TAILQ_HEAD(, mpi3mr_target)		tgt_list;
1492d1d418eSSumit Saxena };
1502d1d418eSSumit Saxena 
1512d1d418eSSumit Saxena MALLOC_DECLARE(M_MPI3MRSAS);
1522d1d418eSSumit Saxena 
1532d1d418eSSumit Saxena static __inline void
mpi3mr_set_ccbstatus(union ccb * ccb,int status)1542d1d418eSSumit Saxena mpi3mr_set_ccbstatus(union ccb *ccb, int status)
1552d1d418eSSumit Saxena {
1562d1d418eSSumit Saxena 	ccb->ccb_h.status &= ~CAM_STATUS_MASK;
1572d1d418eSSumit Saxena 	ccb->ccb_h.status |= status;
1582d1d418eSSumit Saxena }
1592d1d418eSSumit Saxena 
1602d1d418eSSumit Saxena static __inline int
mpi3mr_get_ccbstatus(union ccb * ccb)1612d1d418eSSumit Saxena mpi3mr_get_ccbstatus(union ccb *ccb)
1622d1d418eSSumit Saxena {
1632d1d418eSSumit Saxena 	return (ccb->ccb_h.status & CAM_STATUS_MASK);
1642d1d418eSSumit Saxena }
1652d1d418eSSumit Saxena 
mpi3mr_print_cdb(union ccb * ccb)1662d1d418eSSumit Saxena static __inline void mpi3mr_print_cdb(union ccb *ccb)
1672d1d418eSSumit Saxena {
1682d1d418eSSumit Saxena 	struct ccb_scsiio *csio;
1692d1d418eSSumit Saxena 	struct mpi3mr_cam_softc *cam_sc;
1702d1d418eSSumit Saxena 	struct cam_sim *sim;
1712d1d418eSSumit Saxena 	int i;
1722d1d418eSSumit Saxena 
1732d1d418eSSumit Saxena 	sim = xpt_path_sim(ccb->ccb_h.path);
1742d1d418eSSumit Saxena 	cam_sc = cam_sim_softc(sim);
1752d1d418eSSumit Saxena 
1762d1d418eSSumit Saxena 	csio = &ccb->csio;
1772d1d418eSSumit Saxena 
1782d1d418eSSumit Saxena 	mpi3mr_dprint(cam_sc->sc, MPI3MR_INFO, "tgtID: %d  CDB: ", csio->ccb_h.target_id);
1792d1d418eSSumit Saxena 	for (i = 0; i < csio->cdb_len; i++)
1802d1d418eSSumit Saxena 		printf("%x ", csio->cdb_io.cdb_bytes[i]);
1812d1d418eSSumit Saxena 
1822d1d418eSSumit Saxena 	printf("\n");
1832d1d418eSSumit Saxena }
1842d1d418eSSumit Saxena 
1852d1d418eSSumit Saxena void mpi3mr_rescan_target(struct mpi3mr_softc *sc, struct mpi3mr_target *targ);
1862d1d418eSSumit Saxena void mpi3mr_discovery_end(struct mpi3mr_cam_softc *sassc);
1872d1d418eSSumit Saxena void mpi3mr_prepare_for_tm(struct mpi3mr_softc *sc, struct mpi3mr_cmd *tm,
1882d1d418eSSumit Saxena     struct mpi3mr_target *target, lun_id_t lun_id);
1892d1d418eSSumit Saxena void mpi3mr_startup_increment(struct mpi3mr_cam_softc *sassc);
1902d1d418eSSumit Saxena void mpi3mr_startup_decrement(struct mpi3mr_cam_softc *sassc);
1912d1d418eSSumit Saxena 
1922d1d418eSSumit Saxena void mpi3mr_firmware_event_work(void *arg, int pending);
1932d1d418eSSumit Saxena int mpi3mr_check_id(struct mpi3mr_cam_softc *sassc, int id);
1942d1d418eSSumit Saxena int
1952d1d418eSSumit Saxena mpi3mr_cam_attach(struct mpi3mr_softc *sc);
1962d1d418eSSumit Saxena int
1972d1d418eSSumit Saxena mpi3mr_cam_detach(struct mpi3mr_softc *sc);
1982d1d418eSSumit Saxena void
1992d1d418eSSumit Saxena mpi3mr_evt_handler(struct mpi3mr_softc *sc, uintptr_t data,
2002d1d418eSSumit Saxena     MPI3_EVENT_NOTIFICATION_REPLY *event);
201