12d1d418eSSumit Saxena /* 2*baabb919SChandrakanth patil * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 32d1d418eSSumit Saxena * 4*baabb919SChandrakanth patil * Copyright (c) 2016-2024, Broadcom Inc. All rights reserved. 52d1d418eSSumit Saxena * Support: <fbsd-storage-driver.pdl@broadcom.com> 62d1d418eSSumit Saxena * 72d1d418eSSumit Saxena * Redistribution and use in source and binary forms, with or without 82d1d418eSSumit Saxena * modification, are permitted provided that the following conditions are 92d1d418eSSumit Saxena * met: 102d1d418eSSumit Saxena * 112d1d418eSSumit Saxena * 1. Redistributions of source code must retain the above copyright notice, 122d1d418eSSumit Saxena * this list of conditions and the following disclaimer. 132d1d418eSSumit Saxena * 2. Redistributions in binary form must reproduce the above copyright notice, 142d1d418eSSumit Saxena * this list of conditions and the following disclaimer in the documentation and/or other 152d1d418eSSumit Saxena * materials provided with the distribution. 162d1d418eSSumit Saxena * 3. Neither the name of the Broadcom Inc. nor the names of its contributors 172d1d418eSSumit Saxena * may be used to endorse or promote products derived from this software without 182d1d418eSSumit Saxena * specific prior written permission. 192d1d418eSSumit Saxena * 202d1d418eSSumit Saxena * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 212d1d418eSSumit Saxena * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 222d1d418eSSumit Saxena * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 232d1d418eSSumit Saxena * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 242d1d418eSSumit Saxena * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 252d1d418eSSumit Saxena * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 262d1d418eSSumit Saxena * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 272d1d418eSSumit Saxena * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 282d1d418eSSumit Saxena * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 292d1d418eSSumit Saxena * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 302d1d418eSSumit Saxena * POSSIBILITY OF SUCH DAMAGE. 312d1d418eSSumit Saxena * 322d1d418eSSumit Saxena * The views and conclusions contained in the software and documentation are 332d1d418eSSumit Saxena * those of the authors and should not be interpreted as representing 342d1d418eSSumit Saxena * official policies,either expressed or implied, of the FreeBSD Project. 352d1d418eSSumit Saxena * 362d1d418eSSumit Saxena * Mail to: Broadcom Inc 1320 Ridder Park Dr, San Jose, CA 95131 372d1d418eSSumit Saxena * 382d1d418eSSumit Saxena * Broadcom Inc. (Broadcom) MPI3MR Adapter FreeBSD 392d1d418eSSumit Saxena * 402d1d418eSSumit Saxena */ 412d1d418eSSumit Saxena #ifndef MPI30_IOC_H 422d1d418eSSumit Saxena #define MPI30_IOC_H 1 432d1d418eSSumit Saxena 442d1d418eSSumit Saxena /***************************************************************************** 452d1d418eSSumit Saxena * IOC Messages * 462d1d418eSSumit Saxena ****************************************************************************/ 472d1d418eSSumit Saxena 482d1d418eSSumit Saxena /***************************************************************************** 492d1d418eSSumit Saxena * IOCInit Request Message * 502d1d418eSSumit Saxena ****************************************************************************/ 512d1d418eSSumit Saxena typedef struct _MPI3_IOC_INIT_REQUEST 522d1d418eSSumit Saxena { 532d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 542d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 552d1d418eSSumit Saxena U8 Function; /* 0x03 */ 562d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 572d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 582d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 592d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 602d1d418eSSumit Saxena U16 Reserved0A; /* 0x0A */ 612d1d418eSSumit Saxena MPI3_VERSION_UNION MPIVersion; /* 0x0C */ 622d1d418eSSumit Saxena U64 TimeStamp; /* 0x10 */ 632d1d418eSSumit Saxena U8 Reserved18; /* 0x18 */ 642d1d418eSSumit Saxena U8 WhoInit; /* 0x19 */ 652d1d418eSSumit Saxena U16 Reserved1A; /* 0x1A */ 662d1d418eSSumit Saxena U16 ReplyFreeQueueDepth; /* 0x1C */ 672d1d418eSSumit Saxena U16 Reserved1E; /* 0x1E */ 682d1d418eSSumit Saxena U64 ReplyFreeQueueAddress; /* 0x20 */ 692d1d418eSSumit Saxena U32 Reserved28; /* 0x28 */ 702d1d418eSSumit Saxena U16 SenseBufferFreeQueueDepth; /* 0x2C */ 712d1d418eSSumit Saxena U16 SenseBufferLength; /* 0x2E */ 722d1d418eSSumit Saxena U64 SenseBufferFreeQueueAddress; /* 0x30 */ 732d1d418eSSumit Saxena U64 DriverInformationAddress; /* 0x38 */ 742d1d418eSSumit Saxena } MPI3_IOC_INIT_REQUEST, MPI3_POINTER PTR_MPI3_IOC_INIT_REQUEST, 752d1d418eSSumit Saxena Mpi3IOCInitRequest_t, MPI3_POINTER pMpi3IOCInitRequest_t; 762d1d418eSSumit Saxena 772d1d418eSSumit Saxena /**** Defines for the MsgFlags field ****/ 78*baabb919SChandrakanth patil #define MPI3_IOCINIT_MSGFLAGS_WRITESAMEDIVERT_SUPPORTED (0x08) 79*baabb919SChandrakanth patil #define MPI3_IOCINIT_MSGFLAGS_SCSIIOSTATUSREPLY_SUPPORTED (0x04) 802d1d418eSSumit Saxena #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_MASK (0x03) 812d1d418eSSumit Saxena #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_NOT_USED (0x00) 822d1d418eSSumit Saxena #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_SEPARATED (0x01) 832d1d418eSSumit Saxena #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_INLINE (0x02) 842d1d418eSSumit Saxena #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_BOTH (0x03) 852d1d418eSSumit Saxena 862d1d418eSSumit Saxena /**** Defines for the WhoInit field ****/ 872d1d418eSSumit Saxena #define MPI3_WHOINIT_NOT_INITIALIZED (0x00) 882d1d418eSSumit Saxena #define MPI3_WHOINIT_ROM_BIOS (0x02) 892d1d418eSSumit Saxena #define MPI3_WHOINIT_HOST_DRIVER (0x03) 902d1d418eSSumit Saxena #define MPI3_WHOINIT_MANUFACTURER (0x04) 912d1d418eSSumit Saxena 922d1d418eSSumit Saxena /**** Defines for the DriverInformationAddress field */ 932d1d418eSSumit Saxena typedef struct _MPI3_DRIVER_INFO_LAYOUT 942d1d418eSSumit Saxena { 952d1d418eSSumit Saxena U32 InformationLength; /* 0x00 */ 962d1d418eSSumit Saxena U8 DriverSignature[12]; /* 0x04 */ 972d1d418eSSumit Saxena U8 OsName[16]; /* 0x10 */ 982d1d418eSSumit Saxena U8 OsVersion[12]; /* 0x20 */ 992d1d418eSSumit Saxena U8 DriverName[20]; /* 0x2C */ 1002d1d418eSSumit Saxena U8 DriverVersion[32]; /* 0x40 */ 1012d1d418eSSumit Saxena U8 DriverReleaseDate[20]; /* 0x60 */ 1022d1d418eSSumit Saxena U32 DriverCapabilities; /* 0x74 */ 1032d1d418eSSumit Saxena } MPI3_DRIVER_INFO_LAYOUT, MPI3_POINTER PTR_MPI3_DRIVER_INFO_LAYOUT, 1042d1d418eSSumit Saxena Mpi3DriverInfoLayout_t, MPI3_POINTER pMpi3DriverInfoLayout_t; 1052d1d418eSSumit Saxena 1062d1d418eSSumit Saxena /***************************************************************************** 1072d1d418eSSumit Saxena * IOCFacts Request Message * 1082d1d418eSSumit Saxena ****************************************************************************/ 1092d1d418eSSumit Saxena typedef struct _MPI3_IOC_FACTS_REQUEST 1102d1d418eSSumit Saxena { 1112d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 1122d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 1132d1d418eSSumit Saxena U8 Function; /* 0x03 */ 1142d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 1152d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 1162d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 1172d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 1182d1d418eSSumit Saxena U16 Reserved0A; /* 0x0A */ 1192d1d418eSSumit Saxena U32 Reserved0C; /* 0x0C */ 1202d1d418eSSumit Saxena MPI3_SGE_UNION SGL; /* 0x10 */ 1212d1d418eSSumit Saxena } MPI3_IOC_FACTS_REQUEST, MPI3_POINTER PTR_MPI3_IOC_FACTS_REQUEST, 1222d1d418eSSumit Saxena Mpi3IOCFactsRequest_t, MPI3_POINTER pMpi3IOCFactsRequest_t; 1232d1d418eSSumit Saxena 1242d1d418eSSumit Saxena /***************************************************************************** 1252d1d418eSSumit Saxena * IOCFacts Data * 1262d1d418eSSumit Saxena ****************************************************************************/ 1272d1d418eSSumit Saxena typedef struct _MPI3_IOC_FACTS_DATA 1282d1d418eSSumit Saxena { 1292d1d418eSSumit Saxena U16 IOCFactsDataLength; /* 0x00 */ 1302d1d418eSSumit Saxena U16 Reserved02; /* 0x02 */ 1312d1d418eSSumit Saxena MPI3_VERSION_UNION MPIVersion; /* 0x04 */ 1322d1d418eSSumit Saxena MPI3_COMP_IMAGE_VERSION FWVersion; /* 0x08 */ 1332d1d418eSSumit Saxena U32 IOCCapabilities; /* 0x10 */ 1342d1d418eSSumit Saxena U8 IOCNumber; /* 0x14 */ 1352d1d418eSSumit Saxena U8 WhoInit; /* 0x15 */ 1362d1d418eSSumit Saxena U16 MaxMSIxVectors; /* 0x16 */ 1372d1d418eSSumit Saxena U16 MaxOutstandingRequests; /* 0x18 */ 1382d1d418eSSumit Saxena U16 ProductID; /* 0x1A */ 1392d1d418eSSumit Saxena U16 IOCRequestFrameSize; /* 0x1C */ 1402d1d418eSSumit Saxena U16 ReplyFrameSize; /* 0x1E */ 1412d1d418eSSumit Saxena U16 IOCExceptions; /* 0x20 */ 1422d1d418eSSumit Saxena U16 MaxPersistentID; /* 0x22 */ 1432d1d418eSSumit Saxena U8 SGEModifierMask; /* 0x24 */ 1442d1d418eSSumit Saxena U8 SGEModifierValue; /* 0x25 */ 1452d1d418eSSumit Saxena U8 SGEModifierShift; /* 0x26 */ 1462d1d418eSSumit Saxena U8 ProtocolFlags; /* 0x27 */ 1472d1d418eSSumit Saxena U16 MaxSASInitiators; /* 0x28 */ 1482d1d418eSSumit Saxena U16 MaxDataLength; /* 0x2A */ 1492d1d418eSSumit Saxena U16 MaxSASExpanders; /* 0x2C */ 1502d1d418eSSumit Saxena U16 MaxEnclosures; /* 0x2E */ 1512d1d418eSSumit Saxena U16 MinDevHandle; /* 0x30 */ 1522d1d418eSSumit Saxena U16 MaxDevHandle; /* 0x32 */ 1532d1d418eSSumit Saxena U16 MaxPCIeSwitches; /* 0x34 */ 1542d1d418eSSumit Saxena U16 MaxNVMe; /* 0x36 */ 1552d1d418eSSumit Saxena U16 Reserved38; /* 0x38 */ 1562d1d418eSSumit Saxena U16 MaxVDs; /* 0x3A */ 1572d1d418eSSumit Saxena U16 MaxHostPDs; /* 0x3C */ 1582d1d418eSSumit Saxena U16 MaxAdvHostPDs; /* 0x3E */ 1592d1d418eSSumit Saxena U16 MaxRAIDPDs; /* 0x40 */ 1602d1d418eSSumit Saxena U16 MaxPostedCmdBuffers; /* 0x42 */ 1612d1d418eSSumit Saxena U32 Flags; /* 0x44 */ 1622d1d418eSSumit Saxena U16 MaxOperationalRequestQueues; /* 0x48 */ 1632d1d418eSSumit Saxena U16 MaxOperationalReplyQueues; /* 0x4A */ 1642d1d418eSSumit Saxena U16 ShutdownTimeout; /* 0x4C */ 1652d1d418eSSumit Saxena U16 Reserved4E; /* 0x4E */ 1662d1d418eSSumit Saxena U32 DiagTraceSize; /* 0x50 */ 1672d1d418eSSumit Saxena U32 DiagFwSize; /* 0x54 */ 1682d1d418eSSumit Saxena U32 DiagDriverSize; /* 0x58 */ 1692d1d418eSSumit Saxena U8 MaxHostPDNsCount; /* 0x5C */ 1702d1d418eSSumit Saxena U8 MaxAdvHostPDNsCount; /* 0x5D */ 1712d1d418eSSumit Saxena U8 MaxRAIDPDNsCount; /* 0x5E */ 1722d1d418eSSumit Saxena U8 MaxDevicesPerThrottleGroup; /* 0x5F */ 1732d1d418eSSumit Saxena U16 IOThrottleDataLength; /* 0x60 */ 1742d1d418eSSumit Saxena U16 MaxIOThrottleGroup; /* 0x62 */ 1752d1d418eSSumit Saxena U16 IOThrottleLow; /* 0x64 */ 1762d1d418eSSumit Saxena U16 IOThrottleHigh; /* 0x66 */ 177*baabb919SChandrakanth patil U32 DiagFdlSize; /* 0x68 */ 178*baabb919SChandrakanth patil U32 DiagTtySize; /* 0x6C */ 1792d1d418eSSumit Saxena } MPI3_IOC_FACTS_DATA, MPI3_POINTER PTR_MPI3_IOC_FACTS_DATA, 1802d1d418eSSumit Saxena Mpi3IOCFactsData_t, MPI3_POINTER pMpi3IOCFactsData_t; 1812d1d418eSSumit Saxena 1822d1d418eSSumit Saxena /**** Defines for the IOCCapabilities field ****/ 1832d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_MASK (0x80000000) 1842d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_SUPERVISOR_IOC (0x00000000) 1852d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_IOC (0x80000000) 1862d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_MASK (0x00000600) 1872d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_FIXED_THRESHOLD (0x00000000) 1882d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_OUTSTANDING_IO (0x00000200) 189*baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_COMPLETE_RESET_SUPPORTED (0x00000100) 190*baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_TRACE_SUPPORTED (0x00000080) 191*baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_FW_SUPPORTED (0x00000040) 192*baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_DRIVER_SUPPORTED (0x00000020) 193*baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_ADVANCED_HOST_PD_SUPPORTED (0x00000010) 194*baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_RAID_SUPPORTED (0x00000008) 195*baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_MULTIPATH_SUPPORTED (0x00000002) 1962d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_COALESCE_CTRL_SUPPORTED (0x00000001) 1972d1d418eSSumit Saxena 1982d1d418eSSumit Saxena /**** WhoInit values are defined under IOCInit Request Message definition ****/ 1992d1d418eSSumit Saxena 2002d1d418eSSumit Saxena /**** Defines for the ProductID field ****/ 2012d1d418eSSumit Saxena #define MPI3_IOCFACTS_PID_TYPE_MASK (0xF000) 2022d1d418eSSumit Saxena #define MPI3_IOCFACTS_PID_TYPE_SHIFT (12) 2032d1d418eSSumit Saxena #define MPI3_IOCFACTS_PID_PRODUCT_MASK (0x0F00) 2042d1d418eSSumit Saxena #define MPI3_IOCFACTS_PID_PRODUCT_SHIFT (8) 2052d1d418eSSumit Saxena #define MPI3_IOCFACTS_PID_FAMILY_MASK (0x00FF) 2062d1d418eSSumit Saxena #define MPI3_IOCFACTS_PID_FAMILY_SHIFT (0) 2072d1d418eSSumit Saxena 2082d1d418eSSumit Saxena /**** Defines for the IOCExceptions field ****/ 2092d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_REKEY (0x2000) 2102d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SAS_DISABLED (0x1000) 2112d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SAFE_MODE (0x0800) 2122d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_MASK (0x0700) 2132d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_NONE (0x0000) 2142d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_MGMT (0x0100) 2152d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_MGMT (0x0200) 2162d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_MGMT (0x0300) 2172d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_OOB (0x0400) 2182d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_OOB (0x0500) 2192d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_OOB (0x0600) 2202d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_PCIE_DISABLED (0x0080) 2212d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE (0x0040) 2222d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL (0x0020) 2232d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0010) 2242d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0008) 2252d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_MASK (0x0001) 2262d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_PRIMARY (0x0000) 2272d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_SECONDARY (0x0001) 2282d1d418eSSumit Saxena 2292d1d418eSSumit Saxena /**** Defines for the ProtocolFlags field ****/ 2302d1d418eSSumit Saxena #define MPI3_IOCFACTS_PROTOCOL_SAS (0x0010) 2312d1d418eSSumit Saxena #define MPI3_IOCFACTS_PROTOCOL_SATA (0x0008) 2322d1d418eSSumit Saxena #define MPI3_IOCFACTS_PROTOCOL_NVME (0x0004) 2332d1d418eSSumit Saxena #define MPI3_IOCFACTS_PROTOCOL_SCSI_INITIATOR (0x0002) 2342d1d418eSSumit Saxena #define MPI3_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001) 2352d1d418eSSumit Saxena 2362d1d418eSSumit Saxena /**** Defines for the MaxDataLength field ****/ 2372d1d418eSSumit Saxena #define MPI3_IOCFACTS_MAX_DATA_LENGTH_NOT_REPORTED (0x0000) 2382d1d418eSSumit Saxena 2392d1d418eSSumit Saxena /**** Defines for the Flags field ****/ 2402d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_SIGNED_NVDATA_REQUIRED (0x00010000) 2412d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_MASK (0x0000FF00) 2422d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_SHIFT (8) 243*baabb919SChandrakanth patil #define MPI3_IOCFACTS_FLAGS_MAX_REQ_PER_REPLY_QUEUE_LIMIT (0x00000040) 2442d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_MASK (0x00000030) 2452d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_NOT_STARTED (0x00000000) 2462d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_IN_PROGRESS (0x00000010) 2472d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_COMPLETE (0x00000020) 2482d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_PERSONALITY_MASK (0x0000000F) 2492d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_PERSONALITY_EHBA (0x00000000) 2502d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_PERSONALITY_RAID_DDR (0x00000002) 2512d1d418eSSumit Saxena 2522d1d418eSSumit Saxena /**** Defines for the IOThrottleDataLength field ****/ 2532d1d418eSSumit Saxena #define MPI3_IOCFACTS_IO_THROTTLE_DATA_LENGTH_NOT_REQUIRED (0x0000) 2542d1d418eSSumit Saxena 255*baabb919SChandrakanth patil /**** Defines for the MaxIOThrottleGroup field ****/ 2562d1d418eSSumit Saxena #define MPI3_IOCFACTS_MAX_IO_THROTTLE_GROUP_NOT_REQUIRED (0x0000) 2572d1d418eSSumit Saxena 258*baabb919SChandrakanth patil /**** Defines for the DiagFdlSize field ****/ 259*baabb919SChandrakanth patil #define MPI3_IOCFACTS_DIAGFDLSIZE_NOT_SUPPORTED (0x00000000) 260*baabb919SChandrakanth patil 261*baabb919SChandrakanth patil /**** Defines for the DiagTtySize field ****/ 262*baabb919SChandrakanth patil #define MPI3_IOCFACTS_DIAGTTYSIZE_NOT_SUPPORTED (0x00000000) 263*baabb919SChandrakanth patil 2642d1d418eSSumit Saxena /***************************************************************************** 2652d1d418eSSumit Saxena * Management Passthrough Request Message * 2662d1d418eSSumit Saxena ****************************************************************************/ 2672d1d418eSSumit Saxena typedef struct _MPI3_MGMT_PASSTHROUGH_REQUEST 2682d1d418eSSumit Saxena { 2692d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 2702d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 2712d1d418eSSumit Saxena U8 Function; /* 0x03 */ 2722d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 2732d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 2742d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 2752d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 2762d1d418eSSumit Saxena U16 Reserved0A; /* 0x0A */ 2772d1d418eSSumit Saxena U32 Reserved0C[5]; /* 0x0C */ 2782d1d418eSSumit Saxena MPI3_SGE_UNION CommandSGL; /* 0x20 */ 2792d1d418eSSumit Saxena MPI3_SGE_UNION ResponseSGL; /* 0x30 */ 2802d1d418eSSumit Saxena } MPI3_MGMT_PASSTHROUGH_REQUEST, MPI3_POINTER PTR_MPI3_MGMT_PASSTHROUGH_REQUEST, 2812d1d418eSSumit Saxena Mpi3MgmtPassthroughRequest_t, MPI3_POINTER pMpi3MgmtPassthroughRequest_t; 2822d1d418eSSumit Saxena 2832d1d418eSSumit Saxena /***************************************************************************** 2842d1d418eSSumit Saxena * CreateRequestQueue Request Message * 2852d1d418eSSumit Saxena ****************************************************************************/ 2862d1d418eSSumit Saxena typedef struct _MPI3_CREATE_REQUEST_QUEUE_REQUEST 2872d1d418eSSumit Saxena { 2882d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 2892d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 2902d1d418eSSumit Saxena U8 Function; /* 0x03 */ 2912d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 2922d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 2932d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 2942d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 2952d1d418eSSumit Saxena U8 Flags; /* 0x0A */ 2962d1d418eSSumit Saxena U8 Burst; /* 0x0B */ 2972d1d418eSSumit Saxena U16 Size; /* 0x0C */ 2982d1d418eSSumit Saxena U16 QueueID; /* 0x0E */ 2992d1d418eSSumit Saxena U16 ReplyQueueID; /* 0x10 */ 3002d1d418eSSumit Saxena U16 Reserved12; /* 0x12 */ 3012d1d418eSSumit Saxena U32 Reserved14; /* 0x14 */ 3022d1d418eSSumit Saxena U64 BaseAddress; /* 0x18 */ 3032d1d418eSSumit Saxena } MPI3_CREATE_REQUEST_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_CREATE_REQUEST_QUEUE_REQUEST, 3042d1d418eSSumit Saxena Mpi3CreateRequestQueueRequest_t, MPI3_POINTER pMpi3CreateRequestQueueRequest_t; 3052d1d418eSSumit Saxena 3062d1d418eSSumit Saxena /**** Defines for the Flags field ****/ 3072d1d418eSSumit Saxena #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_MASK (0x80) 3082d1d418eSSumit Saxena #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_SEGMENTED (0x80) 3092d1d418eSSumit Saxena #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_CONTIGUOUS (0x00) 3102d1d418eSSumit Saxena 3112d1d418eSSumit Saxena /**** Defines for the Size field ****/ 3122d1d418eSSumit Saxena #define MPI3_CREATE_REQUEST_QUEUE_SIZE_MINIMUM (2) 3132d1d418eSSumit Saxena 3142d1d418eSSumit Saxena /***************************************************************************** 3152d1d418eSSumit Saxena * DeleteRequestQueue Request Message * 3162d1d418eSSumit Saxena ****************************************************************************/ 3172d1d418eSSumit Saxena typedef struct _MPI3_DELETE_REQUEST_QUEUE_REQUEST 3182d1d418eSSumit Saxena { 3192d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 3202d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 3212d1d418eSSumit Saxena U8 Function; /* 0x03 */ 3222d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 3232d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 3242d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 3252d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 3262d1d418eSSumit Saxena U16 QueueID; /* 0x0A */ 3272d1d418eSSumit Saxena } MPI3_DELETE_REQUEST_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_DELETE_REQUEST_QUEUE_REQUEST, 3282d1d418eSSumit Saxena Mpi3DeleteRequestQueueRequest_t, MPI3_POINTER pMpi3DeleteRequestQueueRequest_t; 3292d1d418eSSumit Saxena 3302d1d418eSSumit Saxena 3312d1d418eSSumit Saxena /***************************************************************************** 3322d1d418eSSumit Saxena * CreateReplyQueue Request Message * 3332d1d418eSSumit Saxena ****************************************************************************/ 3342d1d418eSSumit Saxena typedef struct _MPI3_CREATE_REPLY_QUEUE_REQUEST 3352d1d418eSSumit Saxena { 3362d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 3372d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 3382d1d418eSSumit Saxena U8 Function; /* 0x03 */ 3392d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 3402d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 3412d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 3422d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 3432d1d418eSSumit Saxena U8 Flags; /* 0x0A */ 3442d1d418eSSumit Saxena U8 Reserved0B; /* 0x0B */ 3452d1d418eSSumit Saxena U16 Size; /* 0x0C */ 3462d1d418eSSumit Saxena U16 QueueID; /* 0x0E */ 3472d1d418eSSumit Saxena U16 MSIxIndex; /* 0x10 */ 3482d1d418eSSumit Saxena U16 Reserved12; /* 0x12 */ 3492d1d418eSSumit Saxena U32 Reserved14; /* 0x14 */ 3502d1d418eSSumit Saxena U64 BaseAddress; /* 0x18 */ 3512d1d418eSSumit Saxena } MPI3_CREATE_REPLY_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_CREATE_REPLY_QUEUE_REQUEST, 3522d1d418eSSumit Saxena Mpi3CreateReplyQueueRequest_t, MPI3_POINTER pMpi3CreateReplyQueueRequest_t; 3532d1d418eSSumit Saxena 3542d1d418eSSumit Saxena /**** Defines for the Flags field ****/ 3552d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_MASK (0x80) 3562d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_SEGMENTED (0x80) 3572d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_CONTIGUOUS (0x00) 3582d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_COALESCE_DISABLE (0x02) 3592d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_MASK (0x01) 3602d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_DISABLE (0x00) 3612d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_ENABLE (0x01) 3622d1d418eSSumit Saxena 3632d1d418eSSumit Saxena /**** Defines for the Size field ****/ 3642d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_SIZE_MINIMUM (2) 3652d1d418eSSumit Saxena 3662d1d418eSSumit Saxena /***************************************************************************** 3672d1d418eSSumit Saxena * DeleteReplyQueue Request Message * 3682d1d418eSSumit Saxena ****************************************************************************/ 3692d1d418eSSumit Saxena typedef struct _MPI3_DELETE_REPLY_QUEUE_REQUEST 3702d1d418eSSumit Saxena { 3712d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 3722d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 3732d1d418eSSumit Saxena U8 Function; /* 0x03 */ 3742d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 3752d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 3762d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 3772d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 3782d1d418eSSumit Saxena U16 QueueID; /* 0x0A */ 3792d1d418eSSumit Saxena } MPI3_DELETE_REPLY_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_DELETE_REPLY_QUEUE_REQUEST, 3802d1d418eSSumit Saxena Mpi3DeleteReplyQueueRequest_t, MPI3_POINTER pMpi3DeleteReplyQueueRequest_t; 3812d1d418eSSumit Saxena 3822d1d418eSSumit Saxena 3832d1d418eSSumit Saxena /***************************************************************************** 3842d1d418eSSumit Saxena * PortEnable Request Message * 3852d1d418eSSumit Saxena ****************************************************************************/ 3862d1d418eSSumit Saxena typedef struct _MPI3_PORT_ENABLE_REQUEST 3872d1d418eSSumit Saxena { 3882d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 3892d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 3902d1d418eSSumit Saxena U8 Function; /* 0x03 */ 3912d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 3922d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 3932d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 3942d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 3952d1d418eSSumit Saxena U16 Reserved0A; /* 0x0A */ 3962d1d418eSSumit Saxena } MPI3_PORT_ENABLE_REQUEST, MPI3_POINTER PTR_MPI3_PORT_ENABLE_REQUEST, 3972d1d418eSSumit Saxena Mpi3PortEnableRequest_t, MPI3_POINTER pMpi3PortEnableRequest_t; 3982d1d418eSSumit Saxena 3992d1d418eSSumit Saxena 4002d1d418eSSumit Saxena /***************************************************************************** 4012d1d418eSSumit Saxena * IOC Events and Event Management * 4022d1d418eSSumit Saxena ****************************************************************************/ 4032d1d418eSSumit Saxena #define MPI3_EVENT_LOG_DATA (0x01) 4042d1d418eSSumit Saxena #define MPI3_EVENT_CHANGE (0x02) 4052d1d418eSSumit Saxena #define MPI3_EVENT_GPIO_INTERRUPT (0x04) 4062d1d418eSSumit Saxena #define MPI3_EVENT_CABLE_MGMT (0x06) 4072d1d418eSSumit Saxena #define MPI3_EVENT_DEVICE_ADDED (0x07) 4082d1d418eSSumit Saxena #define MPI3_EVENT_DEVICE_INFO_CHANGED (0x08) 4092d1d418eSSumit Saxena #define MPI3_EVENT_PREPARE_FOR_RESET (0x09) 4102d1d418eSSumit Saxena #define MPI3_EVENT_COMP_IMAGE_ACT_START (0x0A) 4112d1d418eSSumit Saxena #define MPI3_EVENT_ENCL_DEVICE_ADDED (0x0B) 4122d1d418eSSumit Saxena #define MPI3_EVENT_ENCL_DEVICE_STATUS_CHANGE (0x0C) 4132d1d418eSSumit Saxena #define MPI3_EVENT_DEVICE_STATUS_CHANGE (0x0D) 4142d1d418eSSumit Saxena #define MPI3_EVENT_ENERGY_PACK_CHANGE (0x0E) 4152d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISCOVERY (0x11) 4162d1d418eSSumit Saxena #define MPI3_EVENT_SAS_BROADCAST_PRIMITIVE (0x12) 4172d1d418eSSumit Saxena #define MPI3_EVENT_SAS_NOTIFY_PRIMITIVE (0x13) 4182d1d418eSSumit Saxena #define MPI3_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x14) 4192d1d418eSSumit Saxena #define MPI3_EVENT_SAS_INIT_TABLE_OVERFLOW (0x15) 4202d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPOLOGY_CHANGE_LIST (0x16) 4212d1d418eSSumit Saxena #define MPI3_EVENT_SAS_PHY_COUNTER (0x18) 4222d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DEVICE_DISCOVERY_ERROR (0x19) 4232d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPOLOGY_CHANGE_LIST (0x20) 4242d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUMERATION (0x22) 4252d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ERROR_THRESHOLD (0x23) 4262d1d418eSSumit Saxena #define MPI3_EVENT_HARD_RESET_RECEIVED (0x40) 4272d1d418eSSumit Saxena #define MPI3_EVENT_DIAGNOSTIC_BUFFER_STATUS_CHANGE (0x50) 4282d1d418eSSumit Saxena #define MPI3_EVENT_MIN_PRODUCT_SPECIFIC (0x60) 4292d1d418eSSumit Saxena #define MPI3_EVENT_MAX_PRODUCT_SPECIFIC (0x7F) 4302d1d418eSSumit Saxena 4312d1d418eSSumit Saxena 4322d1d418eSSumit Saxena /***************************************************************************** 4332d1d418eSSumit Saxena * Event Notification Request Message * 4342d1d418eSSumit Saxena ****************************************************************************/ 4352d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_EVENTMASK_WORDS (4) 4362d1d418eSSumit Saxena 4372d1d418eSSumit Saxena typedef struct _MPI3_EVENT_NOTIFICATION_REQUEST 4382d1d418eSSumit Saxena { 4392d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 4402d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 4412d1d418eSSumit Saxena U8 Function; /* 0x03 */ 4422d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 4432d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 4442d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 4452d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 4462d1d418eSSumit Saxena U16 Reserved0A; /* 0x0A */ 4472d1d418eSSumit Saxena U16 SASBroadcastPrimitiveMasks; /* 0x0C */ 4482d1d418eSSumit Saxena U16 SASNotifyPrimitiveMasks; /* 0x0E */ 4492d1d418eSSumit Saxena U32 EventMasks[MPI3_EVENT_NOTIFY_EVENTMASK_WORDS]; /* 0x10 */ 4502d1d418eSSumit Saxena } MPI3_EVENT_NOTIFICATION_REQUEST, MPI3_POINTER PTR_MPI3_EVENT_NOTIFICATION_REQUEST, 4512d1d418eSSumit Saxena Mpi3EventNotificationRequest_t, MPI3_POINTER pMpi3EventNotificationRequest_t; 4522d1d418eSSumit Saxena 453*baabb919SChandrakanth patil /**** Defines for the SASBroadcastPrimitiveMasks field - use MPI3_EVENT_BROADCAST_PRIMITIVE_ values ****/ 4542d1d418eSSumit Saxena 455*baabb919SChandrakanth patil /**** Defines for the SASNotifyPrimitiveMasks field - use MPI3_EVENT_NOTIFY_PRIMITIVE_ values ****/ 4562d1d418eSSumit Saxena 4572d1d418eSSumit Saxena /**** Defines for the EventMasks field - use MPI3_EVENT_ values ****/ 4582d1d418eSSumit Saxena 4592d1d418eSSumit Saxena /***************************************************************************** 4602d1d418eSSumit Saxena * Event Notification Reply Message * 4612d1d418eSSumit Saxena ****************************************************************************/ 4622d1d418eSSumit Saxena typedef struct _MPI3_EVENT_NOTIFICATION_REPLY 4632d1d418eSSumit Saxena { 4642d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 4652d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 4662d1d418eSSumit Saxena U8 Function; /* 0x03 */ 4672d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 4682d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 4692d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 4702d1d418eSSumit Saxena U16 IOCUseOnly08; /* 0x08 */ 4712d1d418eSSumit Saxena U16 IOCStatus; /* 0x0A */ 4722d1d418eSSumit Saxena U32 IOCLogInfo; /* 0x0C */ 4732d1d418eSSumit Saxena U8 EventDataLength; /* 0x10 */ 4742d1d418eSSumit Saxena U8 Event; /* 0x11 */ 4752d1d418eSSumit Saxena U16 IOCChangeCount; /* 0x12 */ 4762d1d418eSSumit Saxena U32 EventContext; /* 0x14 */ 4772d1d418eSSumit Saxena U32 EventData[1]; /* 0x18 */ 4782d1d418eSSumit Saxena } MPI3_EVENT_NOTIFICATION_REPLY, MPI3_POINTER PTR_MPI3_EVENT_NOTIFICATION_REPLY, 4792d1d418eSSumit Saxena Mpi3EventNotificationReply_t, MPI3_POINTER pMpi3EventNotificationReply_t; 4802d1d418eSSumit Saxena 4812d1d418eSSumit Saxena /**** Defines for the MsgFlags field ****/ 4822d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_MASK (0x01) 4832d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_REQUIRED (0x01) 4842d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_NOT_REQUIRED (0x00) 4852d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_MASK (0x02) 4862d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_ORIGINAL (0x00) 4872d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_REPLAY (0x02) 4882d1d418eSSumit Saxena 4892d1d418eSSumit Saxena /**** Defines for the Event field - use MPI3_EVENT_ values ****/ 4902d1d418eSSumit Saxena 4912d1d418eSSumit Saxena 4922d1d418eSSumit Saxena /***************************************************************************** 4932d1d418eSSumit Saxena * GPIO Interrupt Event * 4942d1d418eSSumit Saxena ****************************************************************************/ 4952d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_GPIO_INTERRUPT 4962d1d418eSSumit Saxena { 4972d1d418eSSumit Saxena U8 GPIONum; /* 0x00 */ 4982d1d418eSSumit Saxena U8 Reserved01[3]; /* 0x01 */ 4992d1d418eSSumit Saxena } MPI3_EVENT_DATA_GPIO_INTERRUPT, MPI3_POINTER PTR_MPI3_EVENT_DATA_GPIO_INTERRUPT, 5002d1d418eSSumit Saxena Mpi3EventDataGpioInterrupt_t, MPI3_POINTER pMpi3EventDataGpioInterrupt_t; 5012d1d418eSSumit Saxena 5022d1d418eSSumit Saxena 5032d1d418eSSumit Saxena /***************************************************************************** 5042d1d418eSSumit Saxena * Cable Management Event * 5052d1d418eSSumit Saxena ****************************************************************************/ 5062d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_CABLE_MANAGEMENT 5072d1d418eSSumit Saxena { 5082d1d418eSSumit Saxena U32 ActiveCablePowerRequirement; /* 0x00 */ 5092d1d418eSSumit Saxena U8 Status; /* 0x04 */ 5102d1d418eSSumit Saxena U8 ReceptacleID; /* 0x05 */ 5112d1d418eSSumit Saxena U16 Reserved06; /* 0x06 */ 5122d1d418eSSumit Saxena } MPI3_EVENT_DATA_CABLE_MANAGEMENT, MPI3_POINTER PTR_MPI3_EVENT_DATA_CABLE_MANAGEMENT, 5132d1d418eSSumit Saxena Mpi3EventDataCableManagement_t, MPI3_POINTER pMpi3EventDataCableManagement_t; 5142d1d418eSSumit Saxena 5152d1d418eSSumit Saxena /**** Defines for the ActiveCablePowerRequirement field ****/ 5162d1d418eSSumit Saxena #define MPI3_EVENT_CABLE_MGMT_ACT_CABLE_PWR_INVALID (0xFFFFFFFF) 5172d1d418eSSumit Saxena 5182d1d418eSSumit Saxena /**** Defines for the Status field ****/ 5192d1d418eSSumit Saxena #define MPI3_EVENT_CABLE_MGMT_STATUS_INSUFFICIENT_POWER (0x00) 5202d1d418eSSumit Saxena #define MPI3_EVENT_CABLE_MGMT_STATUS_PRESENT (0x01) 5212d1d418eSSumit Saxena #define MPI3_EVENT_CABLE_MGMT_STATUS_DEGRADED (0x02) 5222d1d418eSSumit Saxena 5232d1d418eSSumit Saxena 5242d1d418eSSumit Saxena /***************************************************************************** 5252d1d418eSSumit Saxena * Event Ack Request Message * 5262d1d418eSSumit Saxena ****************************************************************************/ 5272d1d418eSSumit Saxena typedef struct _MPI3_EVENT_ACK_REQUEST 5282d1d418eSSumit Saxena { 5292d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 5302d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 5312d1d418eSSumit Saxena U8 Function; /* 0x03 */ 5322d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 5332d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 5342d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 5352d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 5362d1d418eSSumit Saxena U16 Reserved0A; /* 0x0A */ 5372d1d418eSSumit Saxena U8 Event; /* 0x0C */ 5382d1d418eSSumit Saxena U8 Reserved0D[3]; /* 0x0D */ 5392d1d418eSSumit Saxena U32 EventContext; /* 0x10 */ 5402d1d418eSSumit Saxena } MPI3_EVENT_ACK_REQUEST, MPI3_POINTER PTR_MPI3_EVENT_ACK_REQUEST, 5412d1d418eSSumit Saxena Mpi3EventAckRequest_t, MPI3_POINTER pMpi3EventAckRequest_t; 5422d1d418eSSumit Saxena 5432d1d418eSSumit Saxena /**** Defines for the Event field - use MPI3_EVENT_ values ****/ 5442d1d418eSSumit Saxena 5452d1d418eSSumit Saxena 5462d1d418eSSumit Saxena /***************************************************************************** 5472d1d418eSSumit Saxena * Prepare for Reset Event * 5482d1d418eSSumit Saxena ****************************************************************************/ 5492d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_PREPARE_FOR_RESET 5502d1d418eSSumit Saxena { 5512d1d418eSSumit Saxena U8 ReasonCode; /* 0x00 */ 5522d1d418eSSumit Saxena U8 Reserved01; /* 0x01 */ 5532d1d418eSSumit Saxena U16 Reserved02; /* 0x02 */ 5542d1d418eSSumit Saxena } MPI3_EVENT_DATA_PREPARE_FOR_RESET, MPI3_POINTER PTR_MPI3_EVENT_DATA_PREPARE_FOR_RESET, 5552d1d418eSSumit Saxena Mpi3EventDataPrepareForReset_t, MPI3_POINTER pMpi3EventDataPrepareForReset_t; 5562d1d418eSSumit Saxena 5572d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/ 5582d1d418eSSumit Saxena #define MPI3_EVENT_PREPARE_RESET_RC_START (0x01) 5592d1d418eSSumit Saxena #define MPI3_EVENT_PREPARE_RESET_RC_ABORT (0x02) 5602d1d418eSSumit Saxena 5612d1d418eSSumit Saxena 5622d1d418eSSumit Saxena /***************************************************************************** 5632d1d418eSSumit Saxena * Component Image Activation Start Event * 5642d1d418eSSumit Saxena ****************************************************************************/ 5652d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION 5662d1d418eSSumit Saxena { 5672d1d418eSSumit Saxena U32 Reserved00; /* 0x00 */ 5682d1d418eSSumit Saxena } MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION, MPI3_POINTER PTR_MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION, 5692d1d418eSSumit Saxena Mpi3EventDataCompImageActivation_t, MPI3_POINTER pMpi3EventDataCompImageActivation_t; 5702d1d418eSSumit Saxena 5712d1d418eSSumit Saxena /***************************************************************************** 5722d1d418eSSumit Saxena * Device Added Event * 5732d1d418eSSumit Saxena ****************************************************************************/ 5742d1d418eSSumit Saxena /* 5752d1d418eSSumit Saxena * The Device Added Event Data is exactly the same as Device Page 0 data 5762d1d418eSSumit Saxena * (including the Configuration Page header). So, please use/refer to 5772d1d418eSSumit Saxena * MPI3_DEVICE_PAGE0 structure for Device Added Event data. 5782d1d418eSSumit Saxena */ 5792d1d418eSSumit Saxena 5802d1d418eSSumit Saxena /**************************************************************************** 5812d1d418eSSumit Saxena * Device Info Changed Event * 5822d1d418eSSumit Saxena ****************************************************************************/ 5832d1d418eSSumit Saxena /* 5842d1d418eSSumit Saxena * The Device Info Changed Event Data is exactly the same as Device Page 0 data 5852d1d418eSSumit Saxena * (including the Configuration Page header). So, please use/refer to 5862d1d418eSSumit Saxena * MPI3_DEVICE_PAGE0 structure for Device Added Event data. 5872d1d418eSSumit Saxena */ 5882d1d418eSSumit Saxena 5892d1d418eSSumit Saxena /***************************************************************************** 5902d1d418eSSumit Saxena * Device Status Change Event * 5912d1d418eSSumit Saxena ****************************************************************************/ 5922d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE 5932d1d418eSSumit Saxena { 5942d1d418eSSumit Saxena U16 TaskTag; /* 0x00 */ 5952d1d418eSSumit Saxena U8 ReasonCode; /* 0x02 */ 5962d1d418eSSumit Saxena U8 IOUnitPort; /* 0x03 */ 5972d1d418eSSumit Saxena U16 ParentDevHandle; /* 0x04 */ 5982d1d418eSSumit Saxena U16 DevHandle; /* 0x06 */ 5992d1d418eSSumit Saxena U64 WWID; /* 0x08 */ 6002d1d418eSSumit Saxena U8 LUN[8]; /* 0x10 */ 6012d1d418eSSumit Saxena } MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE, 6022d1d418eSSumit Saxena Mpi3EventDataDeviceStatusChange_t, MPI3_POINTER pMpi3EventDataDeviceStatusChange_t; 6032d1d418eSSumit Saxena 6042d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/ 6052d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_MOVED (0x01) 6062d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_HIDDEN (0x02) 6072d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_NOT_HIDDEN (0x03) 6082d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_ASYNC_NOTIFICATION (0x04) 6092d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_INT_DEVICE_RESET_STRT (0x20) 6102d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_INT_DEVICE_RESET_CMP (0x21) 6112d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_INT_TASK_ABORT_STRT (0x22) 6122d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_INT_TASK_ABORT_CMP (0x23) 6132d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_INT_IT_NEXUS_RESET_STRT (0x24) 6142d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_INT_IT_NEXUS_RESET_CMP (0x25) 6152d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_PCIE_HOT_RESET_FAILED (0x30) 6162d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_EXPANDER_REDUCED_FUNC_STRT (0x40) 6172d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_EXPANDER_REDUCED_FUNC_CMP (0x41) 6182d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_VD_NOT_RESPONDING (0x50) 6192d1d418eSSumit Saxena 6202d1d418eSSumit Saxena /***************************************************************************** 6212d1d418eSSumit Saxena * Energy Pack Change Event * 6222d1d418eSSumit Saxena ****************************************************************************/ 6232d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_ENERGY_PACK_CHANGE 6242d1d418eSSumit Saxena { 6252d1d418eSSumit Saxena U32 Reserved00; /* 0x00 */ 6262d1d418eSSumit Saxena U16 ShutdownTimeout; /* 0x04 */ 6272d1d418eSSumit Saxena U16 Reserved06; /* 0x06 */ 6282d1d418eSSumit Saxena } MPI3_EVENT_DATA_ENERGY_PACK_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_ENERGY_PACK_CHANGE, 6292d1d418eSSumit Saxena Mpi3EventDataEnergyPackChange_t, MPI3_POINTER pMpi3EventDataEnergyPackChange_t; 6302d1d418eSSumit Saxena 6312d1d418eSSumit Saxena /***************************************************************************** 6322d1d418eSSumit Saxena * SAS Discovery Event * 6332d1d418eSSumit Saxena ****************************************************************************/ 6342d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_DISCOVERY 6352d1d418eSSumit Saxena { 6362d1d418eSSumit Saxena U8 Flags; /* 0x00 */ 6372d1d418eSSumit Saxena U8 ReasonCode; /* 0x01 */ 6382d1d418eSSumit Saxena U8 IOUnitPort; /* 0x02 */ 6392d1d418eSSumit Saxena U8 Reserved03; /* 0x03 */ 6402d1d418eSSumit Saxena U32 DiscoveryStatus; /* 0x04 */ 6412d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_DISCOVERY, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_DISCOVERY, 6422d1d418eSSumit Saxena Mpi3EventDataSasDiscovery_t, MPI3_POINTER pMpi3EventDataSasDiscovery_t; 6432d1d418eSSumit Saxena 6442d1d418eSSumit Saxena /**** Defines for the Flags field ****/ 6452d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISC_FLAGS_DEVICE_CHANGE (0x02) 6462d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISC_FLAGS_IN_PROGRESS (0x01) 6472d1d418eSSumit Saxena 6482d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/ 6492d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISC_RC_STARTED (0x01) 6502d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISC_RC_COMPLETED (0x02) 6512d1d418eSSumit Saxena 6522d1d418eSSumit Saxena /**** Defines for the DiscoveryStatus field ****/ 6532d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MAX_ENCLOSURES_EXCEED (0x80000000) 6542d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MAX_EXPANDERS_EXCEED (0x40000000) 6552d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MAX_DEVICES_EXCEED (0x20000000) 6562d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MAX_TOPO_PHYS_EXCEED (0x10000000) 6572d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_INVALID_CEI (0x00010000) 6582d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_FECEI_MISMATCH (0x00008000) 6592d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MULTIPLE_DEVICES_IN_SLOT (0x00004000) 6602d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_NECEI_MISMATCH (0x00002000) 6612d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_TOO_MANY_SLOTS (0x00001000) 6622d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_EXP_MULTI_SUBTRACTIVE (0x00000800) 6632d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MULTI_PORT_DOMAIN (0x00000400) 6642d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_TABLE_TO_SUBTRACTIVE_LINK (0x00000200) 6652d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_UNSUPPORTED_DEVICE (0x00000100) 6662d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_TABLE_LINK (0x00000080) 6672d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_SUBTRACTIVE_LINK (0x00000040) 6682d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_SMP_CRC_ERROR (0x00000020) 6692d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_SMP_FUNCTION_FAILED (0x00000010) 6702d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_SMP_TIMEOUT (0x00000008) 6712d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MULTIPLE_PORTS (0x00000004) 6722d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_INVALID_SAS_ADDRESS (0x00000002) 6732d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_LOOP_DETECTED (0x00000001) 6742d1d418eSSumit Saxena 6752d1d418eSSumit Saxena 6762d1d418eSSumit Saxena /***************************************************************************** 6772d1d418eSSumit Saxena * SAS Broadcast Primitive Event * 6782d1d418eSSumit Saxena ****************************************************************************/ 6792d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE 6802d1d418eSSumit Saxena { 6812d1d418eSSumit Saxena U8 PhyNum; /* 0x00 */ 6822d1d418eSSumit Saxena U8 IOUnitPort; /* 0x01 */ 6832d1d418eSSumit Saxena U8 PortWidth; /* 0x02 */ 6842d1d418eSSumit Saxena U8 Primitive; /* 0x03 */ 6852d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, 6862d1d418eSSumit Saxena Mpi3EventDataSasBroadcastPrimitive_t, MPI3_POINTER pMpi3EventDataSasBroadcastPrimitive_t; 6872d1d418eSSumit Saxena 6882d1d418eSSumit Saxena /**** Defines for the Primitive field ****/ 6892d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE (0x01) 6902d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_SES (0x02) 6912d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_EXPANDER (0x03) 6922d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04) 6932d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_RESERVED3 (0x05) 6942d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_RESERVED4 (0x06) 6952d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE0_RESERVED (0x07) 6962d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE1_RESERVED (0x08) 6972d1d418eSSumit Saxena 6982d1d418eSSumit Saxena 6992d1d418eSSumit Saxena /***************************************************************************** 7002d1d418eSSumit Saxena * SAS Notify Primitive Event * 7012d1d418eSSumit Saxena ****************************************************************************/ 7022d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE 7032d1d418eSSumit Saxena { 7042d1d418eSSumit Saxena U8 PhyNum; /* 0x00 */ 7052d1d418eSSumit Saxena U8 IOUnitPort; /* 0x01 */ 7062d1d418eSSumit Saxena U8 Reserved02; /* 0x02 */ 7072d1d418eSSumit Saxena U8 Primitive; /* 0x03 */ 7082d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE, 7092d1d418eSSumit Saxena Mpi3EventDataSasNotifyPrimitive_t, MPI3_POINTER pMpi3EventDataSasNotifyPrimitive_t; 7102d1d418eSSumit Saxena 7112d1d418eSSumit Saxena /**** Defines for the Primitive field ****/ 7122d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_PRIMITIVE_ENABLE_SPINUP (0x01) 7132d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_PRIMITIVE_POWER_LOSS_EXPECTED (0x02) 7142d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_PRIMITIVE_RESERVED1 (0x03) 7152d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_PRIMITIVE_RESERVED2 (0x04) 7162d1d418eSSumit Saxena 7172d1d418eSSumit Saxena 7182d1d418eSSumit Saxena /***************************************************************************** 7192d1d418eSSumit Saxena * SAS Topology Change List Event * 7202d1d418eSSumit Saxena ****************************************************************************/ 7212d1d418eSSumit Saxena #ifndef MPI3_EVENT_SAS_TOPO_PHY_COUNT 7222d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_COUNT (1) 7232d1d418eSSumit Saxena #endif /* MPI3_EVENT_SAS_TOPO_PHY_COUNT */ 7242d1d418eSSumit Saxena 7252d1d418eSSumit Saxena typedef struct _MPI3_EVENT_SAS_TOPO_PHY_ENTRY 7262d1d418eSSumit Saxena { 7272d1d418eSSumit Saxena U16 AttachedDevHandle; /* 0x00 */ 7282d1d418eSSumit Saxena U8 LinkRate; /* 0x02 */ 729*baabb919SChandrakanth patil U8 PhyStatus; /* 0x03 */ 7302d1d418eSSumit Saxena } MPI3_EVENT_SAS_TOPO_PHY_ENTRY, MPI3_POINTER PTR_MPI3_EVENT_SAS_TOPO_PHY_ENTRY, 7312d1d418eSSumit Saxena Mpi3EventSasTopoPhyEntry_t, MPI3_POINTER pMpi3EventSasTopoPhyEntry_t; 7322d1d418eSSumit Saxena 7332d1d418eSSumit Saxena /**** Defines for the LinkRate field ****/ 7342d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_CURRENT_MASK (0xF0) 7352d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_CURRENT_SHIFT (4) 7362d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_PREV_MASK (0x0F) 7372d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_PREV_SHIFT (0) 7382d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE (0x00) 7392d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_PHY_DISABLED (0x01) 7402d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED (0x02) 7412d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE (0x03) 7422d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_PORT_SELECTOR (0x04) 7432d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS (0x05) 7442d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY (0x06) 7452d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_RATE_6_0 (0x0A) 7462d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_RATE_12_0 (0x0B) 7472d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_RATE_22_5 (0x0C) 7482d1d418eSSumit Saxena 7492d1d418eSSumit Saxena /**** Defines for the PhyStatus field ****/ 7502d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_MASK (0xC0) 7512d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_SHIFT (6) 7522d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_ACCESSIBLE (0x00) 7532d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_NO_EXIST (0x40) 7542d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_VACANT (0x80) 7552d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_RC_MASK (0x0F) 7562d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_RC_TARG_NOT_RESPONDING (0x02) 7572d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_RC_PHY_CHANGED (0x03) 7582d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_RC_NO_CHANGE (0x04) 7592d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_RC_DELAY_NOT_RESPONDING (0x05) 7602d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_RC_RESPONDING (0x06) 7612d1d418eSSumit Saxena 7622d1d418eSSumit Saxena 7632d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST 7642d1d418eSSumit Saxena { 7652d1d418eSSumit Saxena U16 EnclosureHandle; /* 0x00 */ 7662d1d418eSSumit Saxena U16 ExpanderDevHandle; /* 0x02 */ 7672d1d418eSSumit Saxena U8 NumPhys; /* 0x04 */ 7682d1d418eSSumit Saxena U8 Reserved05[3]; /* 0x05 */ 7692d1d418eSSumit Saxena U8 NumEntries; /* 0x08 */ 7702d1d418eSSumit Saxena U8 StartPhyNum; /* 0x09 */ 7712d1d418eSSumit Saxena U8 ExpStatus; /* 0x0A */ 7722d1d418eSSumit Saxena U8 IOUnitPort; /* 0x0B */ 7732d1d418eSSumit Saxena MPI3_EVENT_SAS_TOPO_PHY_ENTRY PhyEntry[MPI3_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C */ 7742d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, 7752d1d418eSSumit Saxena Mpi3EventDataSasTopologyChangeList_t, MPI3_POINTER pMpi3EventDataSasTopologyChangeList_t; 7762d1d418eSSumit Saxena 7772d1d418eSSumit Saxena /**** Defines for the ExpStatus field ****/ 7782d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_ES_NO_EXPANDER (0x00) 7792d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_ES_NOT_RESPONDING (0x02) 7802d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_ES_RESPONDING (0x03) 7812d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING (0x04) 7822d1d418eSSumit Saxena 7832d1d418eSSumit Saxena /***************************************************************************** 7842d1d418eSSumit Saxena * SAS PHY Counter Event * 7852d1d418eSSumit Saxena ****************************************************************************/ 7862d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_PHY_COUNTER 7872d1d418eSSumit Saxena { 7882d1d418eSSumit Saxena U64 TimeStamp; /* 0x00 */ 7892d1d418eSSumit Saxena U32 Reserved08; /* 0x08 */ 7902d1d418eSSumit Saxena U8 PhyEventCode; /* 0x0C */ 7912d1d418eSSumit Saxena U8 PhyNum; /* 0x0D */ 7922d1d418eSSumit Saxena U16 Reserved0E; /* 0x0E */ 7932d1d418eSSumit Saxena U32 PhyEventInfo; /* 0x10 */ 7942d1d418eSSumit Saxena U8 CounterType; /* 0x14 */ 7952d1d418eSSumit Saxena U8 ThresholdWindow; /* 0x15 */ 7962d1d418eSSumit Saxena U8 TimeUnits; /* 0x16 */ 7972d1d418eSSumit Saxena U8 Reserved17; /* 0x17 */ 7982d1d418eSSumit Saxena U32 EventThreshold; /* 0x18 */ 7992d1d418eSSumit Saxena U16 ThresholdFlags; /* 0x1C */ 8002d1d418eSSumit Saxena U16 Reserved1E; /* 0x1E */ 8012d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_PHY_COUNTER, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_PHY_COUNTER, 8022d1d418eSSumit Saxena Mpi3EventDataSasPhyCounter_t, MPI3_POINTER pMpi3EventDataSasPhyCounter_t; 8032d1d418eSSumit Saxena 8042d1d418eSSumit Saxena /**** Defines for the PhyEventCode field - use MPI3_SASPHY3_EVENT_CODE_ defines ****/ 8052d1d418eSSumit Saxena 8062d1d418eSSumit Saxena /**** Defines for the CounterType field - use MPI3_SASPHY3_COUNTER_TYPE_ defines ****/ 8072d1d418eSSumit Saxena 8082d1d418eSSumit Saxena /**** Defines for the TimeUnits field - use MPI3_SASPHY3_TIME_UNITS_ defines ****/ 8092d1d418eSSumit Saxena 8102d1d418eSSumit Saxena /**** Defines for the ThresholdFlags field - use MPI3_SASPHY3_TFLAGS_ defines ****/ 8112d1d418eSSumit Saxena 8122d1d418eSSumit Saxena 8132d1d418eSSumit Saxena /***************************************************************************** 8142d1d418eSSumit Saxena * SAS Device Discovery Error Event * 8152d1d418eSSumit Saxena ****************************************************************************/ 8162d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR 8172d1d418eSSumit Saxena { 8182d1d418eSSumit Saxena U16 DevHandle; /* 0x00 */ 8192d1d418eSSumit Saxena U8 ReasonCode; /* 0x02 */ 8202d1d418eSSumit Saxena U8 IOUnitPort; /* 0x03 */ 8212d1d418eSSumit Saxena U32 Reserved04; /* 0x04 */ 8222d1d418eSSumit Saxena U64 SASAddress; /* 0x08 */ 8232d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR, 8242d1d418eSSumit Saxena Mpi3EventDataSasDeviceDiscErr_t, MPI3_POINTER pMpi3EventDataSasDeviceDiscErr_t; 8252d1d418eSSumit Saxena 8262d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/ 8272d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISC_ERR_RC_SMP_FAILED (0x01) 8282d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISC_ERR_RC_SMP_TIMEOUT (0x02) 8292d1d418eSSumit Saxena 8302d1d418eSSumit Saxena /***************************************************************************** 8312d1d418eSSumit Saxena * PCIe Enumeration Event * 8322d1d418eSSumit Saxena ****************************************************************************/ 8332d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_PCIE_ENUMERATION 8342d1d418eSSumit Saxena { 8352d1d418eSSumit Saxena U8 Flags; /* 0x00 */ 8362d1d418eSSumit Saxena U8 ReasonCode; /* 0x01 */ 8372d1d418eSSumit Saxena U8 IOUnitPort; /* 0x02 */ 8382d1d418eSSumit Saxena U8 Reserved03; /* 0x03 */ 8392d1d418eSSumit Saxena U32 EnumerationStatus; /* 0x04 */ 8402d1d418eSSumit Saxena } MPI3_EVENT_DATA_PCIE_ENUMERATION, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_ENUMERATION, 8412d1d418eSSumit Saxena Mpi3EventDataPcieEnumeration_t, MPI3_POINTER pMpi3EventDataPcieEnumeration_t; 8422d1d418eSSumit Saxena 8432d1d418eSSumit Saxena /**** Defines for the Flags field ****/ 8442d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_FLAGS_DEVICE_CHANGE (0x02) 8452d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_FLAGS_IN_PROGRESS (0x01) 8462d1d418eSSumit Saxena 8472d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/ 8482d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_RC_STARTED (0x01) 8492d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_RC_COMPLETED (0x02) 8502d1d418eSSumit Saxena 8512d1d418eSSumit Saxena /**** Defines for the EnumerationStatus field ****/ 8522d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_ES_MAX_SWITCH_DEPTH_EXCEED (0x80000000) 8532d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_ES_MAX_SWITCHES_EXCEED (0x40000000) 8542d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_ES_MAX_DEVICES_EXCEED (0x20000000) 8552d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_ES_RESOURCES_EXHAUSTED (0x10000000) 8562d1d418eSSumit Saxena 8572d1d418eSSumit Saxena 8582d1d418eSSumit Saxena /***************************************************************************** 8592d1d418eSSumit Saxena * PCIe Topology Change List Event * 8602d1d418eSSumit Saxena ****************************************************************************/ 8612d1d418eSSumit Saxena #ifndef MPI3_EVENT_PCIE_TOPO_PORT_COUNT 8622d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PORT_COUNT (1) 8632d1d418eSSumit Saxena #endif /* MPI3_EVENT_PCIE_TOPO_PORT_COUNT */ 8642d1d418eSSumit Saxena 8652d1d418eSSumit Saxena typedef struct _MPI3_EVENT_PCIE_TOPO_PORT_ENTRY 8662d1d418eSSumit Saxena { 8672d1d418eSSumit Saxena U16 AttachedDevHandle; /* 0x00 */ 8682d1d418eSSumit Saxena U8 PortStatus; /* 0x02 */ 8692d1d418eSSumit Saxena U8 Reserved03; /* 0x03 */ 8702d1d418eSSumit Saxena U8 CurrentPortInfo; /* 0x04 */ 8712d1d418eSSumit Saxena U8 Reserved05; /* 0x05 */ 8722d1d418eSSumit Saxena U8 PreviousPortInfo; /* 0x06 */ 8732d1d418eSSumit Saxena U8 Reserved07; /* 0x07 */ 8742d1d418eSSumit Saxena } MPI3_EVENT_PCIE_TOPO_PORT_ENTRY, MPI3_POINTER PTR_MPI3_EVENT_PCIE_TOPO_PORT_ENTRY, 8752d1d418eSSumit Saxena Mpi3EventPcieTopoPortEntry_t, MPI3_POINTER pMpi3EventPcieTopoPortEntry_t; 8762d1d418eSSumit Saxena 8772d1d418eSSumit Saxena /**** Defines for the PortStatus field ****/ 8782d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PS_NOT_RESPONDING (0x02) 8792d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PS_PORT_CHANGED (0x03) 8802d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PS_NO_CHANGE (0x04) 8812d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PS_DELAY_NOT_RESPONDING (0x05) 8822d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PS_RESPONDING (0x06) 8832d1d418eSSumit Saxena 8842d1d418eSSumit Saxena /**** Defines for the CurrentPortInfo and PreviousPortInfo field ****/ 8852d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_MASK (0xF0) 8862d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_UNKNOWN (0x00) 8872d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_1 (0x10) 8882d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_2 (0x20) 8892d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_4 (0x30) 8902d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_8 (0x40) 8912d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_16 (0x50) 8922d1d418eSSumit Saxena 8932d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_MASK (0x0F) 8942d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_UNKNOWN (0x00) 8952d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_DISABLED (0x01) 8962d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_2_5 (0x02) 8972d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_5_0 (0x03) 8982d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_8_0 (0x04) 8992d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_16_0 (0x05) 9002d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_32_0 (0x06) 9012d1d418eSSumit Saxena 9022d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST 9032d1d418eSSumit Saxena { 9042d1d418eSSumit Saxena U16 EnclosureHandle; /* 0x00 */ 9052d1d418eSSumit Saxena U16 SwitchDevHandle; /* 0x02 */ 9062d1d418eSSumit Saxena U8 NumPorts; /* 0x04 */ 9072d1d418eSSumit Saxena U8 Reserved05[3]; /* 0x05 */ 9082d1d418eSSumit Saxena U8 NumEntries; /* 0x08 */ 9092d1d418eSSumit Saxena U8 StartPortNum; /* 0x09 */ 9102d1d418eSSumit Saxena U8 SwitchStatus; /* 0x0A */ 9112d1d418eSSumit Saxena U8 IOUnitPort; /* 0x0B */ 9122d1d418eSSumit Saxena U32 Reserved0C; /* 0x0C */ 9132d1d418eSSumit Saxena MPI3_EVENT_PCIE_TOPO_PORT_ENTRY PortEntry[MPI3_EVENT_PCIE_TOPO_PORT_COUNT]; /* 0x10 */ 9142d1d418eSSumit Saxena } MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST, 9152d1d418eSSumit Saxena Mpi3EventDataPcieTopologyChangeList_t, MPI3_POINTER pMpi3EventDataPcieTopologyChangeList_t; 9162d1d418eSSumit Saxena 9172d1d418eSSumit Saxena /**** Defines for the SwitchStatus field ****/ 9182d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_SS_NO_PCIE_SWITCH (0x00) 9192d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_SS_NOT_RESPONDING (0x02) 9202d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_SS_RESPONDING (0x03) 9212d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_SS_DELAY_NOT_RESPONDING (0x04) 9222d1d418eSSumit Saxena 9232d1d418eSSumit Saxena /***************************************************************************** 9242d1d418eSSumit Saxena * PCIe Error Threshold Event * 9252d1d418eSSumit Saxena ****************************************************************************/ 9262d1d418eSSumit Saxena 9272d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD 9282d1d418eSSumit Saxena { 9292d1d418eSSumit Saxena U64 Timestamp; /* 0x00 */ 9302d1d418eSSumit Saxena U8 ReasonCode; /* 0x08 */ 9312d1d418eSSumit Saxena U8 Port; /* 0x09 */ 9322d1d418eSSumit Saxena U16 SwitchDevHandle; /* 0x0A */ 9332d1d418eSSumit Saxena U8 Error; /* 0x0C */ 9342d1d418eSSumit Saxena U8 Action; /* 0x0D */ 9352d1d418eSSumit Saxena U16 ThresholdCount; /* 0x0E */ 9362d1d418eSSumit Saxena U16 AttachedDevHandle; /* 0x10 */ 9372d1d418eSSumit Saxena U16 Reserved12; /* 0x12 */ 9382d1d418eSSumit Saxena U32 Reserved14; /* 0x14 */ 9392d1d418eSSumit Saxena } MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD, 9402d1d418eSSumit Saxena Mpi3EventDataPcieErrorThreshold_t, MPI3_POINTER pMpi3EventDataPcieErrorThreshold_t; 9412d1d418eSSumit Saxena 9422d1d418eSSumit Saxena 9432d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/ 9442d1d418eSSumit Saxena #define MPI3_EVENT_PCI_ERROR_RC_THRESHOLD_EXCEEDED (0x00) 9452d1d418eSSumit Saxena #define MPI3_EVENT_PCI_ERROR_RC_ESCALATION (0x01) 9462d1d418eSSumit Saxena 9472d1d418eSSumit Saxena /**** Defines for the Error field - use MPI3_PCIEIOUNIT3_ERROR_ values ****/ 9482d1d418eSSumit Saxena 9492d1d418eSSumit Saxena /**** Defines for the Action field - use MPI3_PCIEIOUNIT3_ACTION_ values ****/ 9502d1d418eSSumit Saxena 9512d1d418eSSumit Saxena /**************************************************************************** 9522d1d418eSSumit Saxena * Enclosure Device Added Event * 9532d1d418eSSumit Saxena ****************************************************************************/ 9542d1d418eSSumit Saxena /* 9552d1d418eSSumit Saxena * The Enclosure Device Added Event Data is exactly the same as Enclosure 9562d1d418eSSumit Saxena * Page 0 data (including the Configuration Page header). So, please 9572d1d418eSSumit Saxena * use/refer to MPI3_ENCLOSURE_PAGE0 structure for Enclosure Device Added 9582d1d418eSSumit Saxena * Event data. 9592d1d418eSSumit Saxena */ 9602d1d418eSSumit Saxena 9612d1d418eSSumit Saxena /**************************************************************************** 9622d1d418eSSumit Saxena * Enclosure Device Changed Event * 9632d1d418eSSumit Saxena ****************************************************************************/ 9642d1d418eSSumit Saxena /* 9652d1d418eSSumit Saxena * The Enclosure Device Change Event Data is exactly the same as Enclosure 9662d1d418eSSumit Saxena * Page 0 data (including the Configuration Page header). So, please 9672d1d418eSSumit Saxena * use/refer to MPI3_ENCLOSURE_PAGE0 structure for Enclosure Device Change 9682d1d418eSSumit Saxena * Event data. 9692d1d418eSSumit Saxena */ 9702d1d418eSSumit Saxena 9712d1d418eSSumit Saxena /***************************************************************************** 9722d1d418eSSumit Saxena * SAS Initiator Device Status Change Event * 9732d1d418eSSumit Saxena ****************************************************************************/ 9742d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE 9752d1d418eSSumit Saxena { 9762d1d418eSSumit Saxena U8 ReasonCode; /* 0x00 */ 9772d1d418eSSumit Saxena U8 IOUnitPort; /* 0x01 */ 9782d1d418eSSumit Saxena U16 DevHandle; /* 0x02 */ 9792d1d418eSSumit Saxena U32 Reserved04; /* 0x04 */ 9802d1d418eSSumit Saxena U64 SASAddress; /* 0x08 */ 9812d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, 9822d1d418eSSumit Saxena Mpi3EventDataSasInitDevStatusChange_t, MPI3_POINTER pMpi3EventDataSasInitDevStatusChange_t; 9832d1d418eSSumit Saxena 9842d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/ 9852d1d418eSSumit Saxena #define MPI3_EVENT_SAS_INIT_RC_ADDED (0x01) 9862d1d418eSSumit Saxena #define MPI3_EVENT_SAS_INIT_RC_NOT_RESPONDING (0x02) 9872d1d418eSSumit Saxena 9882d1d418eSSumit Saxena 9892d1d418eSSumit Saxena /***************************************************************************** 9902d1d418eSSumit Saxena * SAS Initiator Device Table Overflow Event * 9912d1d418eSSumit Saxena ****************************************************************************/ 9922d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW 9932d1d418eSSumit Saxena { 9942d1d418eSSumit Saxena U16 MaxInit; /* 0x00 */ 9952d1d418eSSumit Saxena U16 CurrentInit; /* 0x02 */ 9962d1d418eSSumit Saxena U32 Reserved04; /* 0x04 */ 9972d1d418eSSumit Saxena U64 SASAddress; /* 0x08 */ 9982d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, 9992d1d418eSSumit Saxena Mpi3EventDataSasInitTableOverflow_t, MPI3_POINTER pMpi3EventDataSasInitTableOverflow_t; 10002d1d418eSSumit Saxena 10012d1d418eSSumit Saxena 10022d1d418eSSumit Saxena /***************************************************************************** 10032d1d418eSSumit Saxena * Hard Reset Received Event * 10042d1d418eSSumit Saxena ****************************************************************************/ 10052d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_HARD_RESET_RECEIVED 10062d1d418eSSumit Saxena { 10072d1d418eSSumit Saxena U8 Reserved00; /* 0x00 */ 10082d1d418eSSumit Saxena U8 IOUnitPort; /* 0x01 */ 10092d1d418eSSumit Saxena U16 Reserved02; /* 0x02 */ 10102d1d418eSSumit Saxena } MPI3_EVENT_DATA_HARD_RESET_RECEIVED, MPI3_POINTER PTR_MPI3_EVENT_DATA_HARD_RESET_RECEIVED, 10112d1d418eSSumit Saxena Mpi3EventDataHardResetReceived_t, MPI3_POINTER pMpi3EventDataHardResetReceived_t; 10122d1d418eSSumit Saxena 10132d1d418eSSumit Saxena 10142d1d418eSSumit Saxena /***************************************************************************** 10152d1d418eSSumit Saxena * Diagnostic Tool Events * 10162d1d418eSSumit Saxena *****************************************************************************/ 10172d1d418eSSumit Saxena 10182d1d418eSSumit Saxena /***************************************************************************** 10192d1d418eSSumit Saxena * Diagnostic Buffer Status Change Event * 10202d1d418eSSumit Saxena *****************************************************************************/ 10212d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE 10222d1d418eSSumit Saxena { 10232d1d418eSSumit Saxena U8 Type; /* 0x00 */ 10242d1d418eSSumit Saxena U8 ReasonCode; /* 0x01 */ 10252d1d418eSSumit Saxena U16 Reserved02; /* 0x02 */ 10262d1d418eSSumit Saxena U32 Reserved04; /* 0x04 */ 10272d1d418eSSumit Saxena } MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE, 10282d1d418eSSumit Saxena Mpi3EventDataDiagBufferStatusChange_t, MPI3_POINTER pMpi3EventDataDiagBufferStatusChange_t; 10292d1d418eSSumit Saxena 10302d1d418eSSumit Saxena /**** Defines for the Type field - use MPI3_DIAG_BUFFER_TYPE_ values ****/ 10312d1d418eSSumit Saxena 10322d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/ 10332d1d418eSSumit Saxena #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RELEASED (0x01) 10342d1d418eSSumit Saxena #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_PAUSED (0x02) 10352d1d418eSSumit Saxena #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RESUMED (0x03) 10362d1d418eSSumit Saxena 10372d1d418eSSumit Saxena /***************************************************************************** 10382d1d418eSSumit Saxena * Persistent Event Logs * 10392d1d418eSSumit Saxena ****************************************************************************/ 10402d1d418eSSumit Saxena 10412d1d418eSSumit Saxena /**** Definitions for the Locale field ****/ 10422d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_NON_BLOCKING_BOOT_EVENT (0x0200) 10432d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_BLOCKING_BOOT_EVENT (0x0100) 10442d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_PCIE (0x0080) 10452d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_CONFIGURATION (0x0040) 10462d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_CONTROLER (0x0020) 10472d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_SAS (0x0010) 10482d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_EPACK (0x0008) 10492d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_ENCLOSURE (0x0004) 10502d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_PD (0x0002) 10512d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_VD (0x0001) 10522d1d418eSSumit Saxena 10532d1d418eSSumit Saxena /**** Definitions for the Class field ****/ 10542d1d418eSSumit Saxena #define MPI3_PEL_CLASS_DEBUG (0x00) 10552d1d418eSSumit Saxena #define MPI3_PEL_CLASS_PROGRESS (0x01) 10562d1d418eSSumit Saxena #define MPI3_PEL_CLASS_INFORMATIONAL (0x02) 10572d1d418eSSumit Saxena #define MPI3_PEL_CLASS_WARNING (0x03) 10582d1d418eSSumit Saxena #define MPI3_PEL_CLASS_CRITICAL (0x04) 10592d1d418eSSumit Saxena #define MPI3_PEL_CLASS_FATAL (0x05) 10602d1d418eSSumit Saxena #define MPI3_PEL_CLASS_FAULT (0x06) 10612d1d418eSSumit Saxena 10622d1d418eSSumit Saxena /**** Definitions for the ClearType field ****/ 10632d1d418eSSumit Saxena #define MPI3_PEL_CLEARTYPE_CLEAR (0x00) 10642d1d418eSSumit Saxena 10652d1d418eSSumit Saxena /**** Definitions for the WaitTime field ****/ 10662d1d418eSSumit Saxena #define MPI3_PEL_WAITTIME_INFINITE_WAIT (0x00) 10672d1d418eSSumit Saxena 10682d1d418eSSumit Saxena /**** Definitions for the Action field ****/ 10692d1d418eSSumit Saxena #define MPI3_PEL_ACTION_GET_SEQNUM (0x01) 10702d1d418eSSumit Saxena #define MPI3_PEL_ACTION_MARK_CLEAR (0x02) 10712d1d418eSSumit Saxena #define MPI3_PEL_ACTION_GET_LOG (0x03) 10722d1d418eSSumit Saxena #define MPI3_PEL_ACTION_GET_COUNT (0x04) 10732d1d418eSSumit Saxena #define MPI3_PEL_ACTION_WAIT (0x05) 10742d1d418eSSumit Saxena #define MPI3_PEL_ACTION_ABORT (0x06) 10752d1d418eSSumit Saxena #define MPI3_PEL_ACTION_GET_PRINT_STRINGS (0x07) 10762d1d418eSSumit Saxena #define MPI3_PEL_ACTION_ACKNOWLEDGE (0x08) 10772d1d418eSSumit Saxena 10782d1d418eSSumit Saxena /**** Definitions for the LogStatus field ****/ 10792d1d418eSSumit Saxena #define MPI3_PEL_STATUS_SUCCESS (0x00) 10802d1d418eSSumit Saxena #define MPI3_PEL_STATUS_NOT_FOUND (0x01) 10812d1d418eSSumit Saxena #define MPI3_PEL_STATUS_ABORTED (0x02) 10822d1d418eSSumit Saxena #define MPI3_PEL_STATUS_NOT_READY (0x03) 10832d1d418eSSumit Saxena 10842d1d418eSSumit Saxena /**************************************************************************** 10852d1d418eSSumit Saxena * PEL Sequence Numbers * 10862d1d418eSSumit Saxena ****************************************************************************/ 10872d1d418eSSumit Saxena typedef struct _MPI3_PEL_SEQ 10882d1d418eSSumit Saxena { 10892d1d418eSSumit Saxena U32 Newest; /* 0x00 */ 10902d1d418eSSumit Saxena U32 Oldest; /* 0x04 */ 10912d1d418eSSumit Saxena U32 Clear; /* 0x08 */ 10922d1d418eSSumit Saxena U32 Shutdown; /* 0x0C */ 10932d1d418eSSumit Saxena U32 Boot; /* 0x10 */ 10942d1d418eSSumit Saxena U32 LastAcknowledged; /* 0x14 */ 10952d1d418eSSumit Saxena } MPI3_PEL_SEQ, MPI3_POINTER PTR_MPI3_PEL_SEQ, 10962d1d418eSSumit Saxena Mpi3PELSeq_t, MPI3_POINTER pMpi3PELSeq_t; 10972d1d418eSSumit Saxena 10982d1d418eSSumit Saxena /**************************************************************************** 10992d1d418eSSumit Saxena * PEL Entry * 11002d1d418eSSumit Saxena ****************************************************************************/ 11012d1d418eSSumit Saxena 11022d1d418eSSumit Saxena typedef struct _MPI3_PEL_ENTRY 11032d1d418eSSumit Saxena { 11042d1d418eSSumit Saxena U64 TimeStamp; /* 0x00 */ 11052d1d418eSSumit Saxena U32 SequenceNumber; /* 0x08 */ 11062d1d418eSSumit Saxena U16 LogCode; /* 0x0C */ 11072d1d418eSSumit Saxena U16 ArgType; /* 0x0E */ 11082d1d418eSSumit Saxena U16 Locale; /* 0x10 */ 11092d1d418eSSumit Saxena U8 Class; /* 0x12 */ 11102d1d418eSSumit Saxena U8 Flags; /* 0x13 */ 11112d1d418eSSumit Saxena U8 ExtNum; /* 0x14 */ 11122d1d418eSSumit Saxena U8 NumExts; /* 0x15 */ 11132d1d418eSSumit Saxena U8 ArgDataSize; /* 0x16 */ 11142d1d418eSSumit Saxena U8 FixedFormatStringsSize; /* 0x17 */ 11152d1d418eSSumit Saxena U32 Reserved18[2]; /* 0x18 */ 11162d1d418eSSumit Saxena U32 PELInfo[24]; /* 0x20 - 0x7F */ 11172d1d418eSSumit Saxena } MPI3_PEL_ENTRY, MPI3_POINTER PTR_MPI3_PEL_ENTRY, 11182d1d418eSSumit Saxena Mpi3PELEntry_t, MPI3_POINTER pMpi3PELEntry_t; 11192d1d418eSSumit Saxena 11202d1d418eSSumit Saxena 11212d1d418eSSumit Saxena /**** Definitions for the Flags field ****/ 11222d1d418eSSumit Saxena 11232d1d418eSSumit Saxena #define MPI3_PEL_FLAGS_COMPLETE_RESET_NEEDED (0x02) 11242d1d418eSSumit Saxena #define MPI3_PEL_FLAGS_ACK_NEEDED (0x01) 11252d1d418eSSumit Saxena 11262d1d418eSSumit Saxena /**************************************************************************** 11272d1d418eSSumit Saxena * PEL Event List * 11282d1d418eSSumit Saxena ****************************************************************************/ 11292d1d418eSSumit Saxena typedef struct _MPI3_PEL_LIST 11302d1d418eSSumit Saxena { 11312d1d418eSSumit Saxena U32 LogCount; /* 0x00 */ 11322d1d418eSSumit Saxena U32 Reserved04; /* 0x04 */ 11332d1d418eSSumit Saxena MPI3_PEL_ENTRY Entry[1]; /* 0x08 */ /* variable length */ 11342d1d418eSSumit Saxena } MPI3_PEL_LIST, MPI3_POINTER PTR_MPI3_PEL_LIST, 11352d1d418eSSumit Saxena Mpi3PELList_t, MPI3_POINTER pMpi3PELList_t; 11362d1d418eSSumit Saxena 11372d1d418eSSumit Saxena /**************************************************************************** 11382d1d418eSSumit Saxena * PEL Count Data * 11392d1d418eSSumit Saxena ****************************************************************************/ 11402d1d418eSSumit Saxena typedef U32 MPI3_PEL_LOG_COUNT, MPI3_POINTER PTR_MPI3_PEL_LOG_COUNT, 11412d1d418eSSumit Saxena Mpi3PELLogCount_t, MPI3_POINTER pMpi3PELLogCount_t; 11422d1d418eSSumit Saxena 11432d1d418eSSumit Saxena /**************************************************************************** 11442d1d418eSSumit Saxena * PEL Arg Map * 11452d1d418eSSumit Saxena ****************************************************************************/ 11462d1d418eSSumit Saxena typedef struct _MPI3_PEL_ARG_MAP 11472d1d418eSSumit Saxena { 11482d1d418eSSumit Saxena U8 ArgType; /* 0x00 */ 11492d1d418eSSumit Saxena U8 Length; /* 0x01 */ 11502d1d418eSSumit Saxena U16 StartLocation; /* 0x02 */ 11512d1d418eSSumit Saxena } MPI3_PEL_ARG_MAP, MPI3_POINTER PTR_MPI3_PEL_ARG_MAP, 11522d1d418eSSumit Saxena Mpi3PELArgMap_t, MPI3_POINTER pMpi3PELArgMap_t; 11532d1d418eSSumit Saxena 11542d1d418eSSumit Saxena /**** Definitions for the ArgType field ****/ 11552d1d418eSSumit Saxena #define MPI3_PEL_ARG_MAP_ARG_TYPE_APPEND_STRING (0x00) 11562d1d418eSSumit Saxena #define MPI3_PEL_ARG_MAP_ARG_TYPE_INTEGER (0x01) 11572d1d418eSSumit Saxena #define MPI3_PEL_ARG_MAP_ARG_TYPE_STRING (0x02) 11582d1d418eSSumit Saxena #define MPI3_PEL_ARG_MAP_ARG_TYPE_BIT_FIELD (0x03) 11592d1d418eSSumit Saxena 11602d1d418eSSumit Saxena 11612d1d418eSSumit Saxena /**************************************************************************** 11622d1d418eSSumit Saxena * PEL Print String * 11632d1d418eSSumit Saxena ****************************************************************************/ 11642d1d418eSSumit Saxena typedef struct _MPI3_PEL_PRINT_STRING 11652d1d418eSSumit Saxena { 11662d1d418eSSumit Saxena U16 LogCode; /* 0x00 */ 11672d1d418eSSumit Saxena U16 StringLength; /* 0x02 */ 11682d1d418eSSumit Saxena U8 NumArgMap; /* 0x04 */ 11692d1d418eSSumit Saxena U8 Reserved05[3]; /* 0x05 */ 11702d1d418eSSumit Saxena MPI3_PEL_ARG_MAP ArgMap[1]; /* 0x08 */ /* variable length */ 11712d1d418eSSumit Saxena /* FormatString - offset must be calculated */ /* variable length */ 11722d1d418eSSumit Saxena } MPI3_PEL_PRINT_STRING, MPI3_POINTER PTR_MPI3_PEL_PRINT_STRING, 11732d1d418eSSumit Saxena Mpi3PELPrintString_t, MPI3_POINTER pMpi3PELPrintString_t; 11742d1d418eSSumit Saxena 11752d1d418eSSumit Saxena /**************************************************************************** 11762d1d418eSSumit Saxena * PEL Print String List * 11772d1d418eSSumit Saxena ****************************************************************************/ 11782d1d418eSSumit Saxena typedef struct _MPI3_PEL_PRINT_STRING_LIST 11792d1d418eSSumit Saxena { 11802d1d418eSSumit Saxena U32 NumPrintStrings; /* 0x00 */ 11812d1d418eSSumit Saxena U32 ResidualBytesRemain; /* 0x04 */ 11822d1d418eSSumit Saxena U32 Reserved08[2]; /* 0x08 */ 11832d1d418eSSumit Saxena MPI3_PEL_PRINT_STRING PrintString[1]; /* 0x10 */ /* variable length */ 11842d1d418eSSumit Saxena } MPI3_PEL_PRINT_STRING_LIST, MPI3_POINTER PTR_MPI3_PEL_PRINT_STRING_LIST, 11852d1d418eSSumit Saxena Mpi3PELPrintStringList_t, MPI3_POINTER pMpi3PELPrintStringList_t; 11862d1d418eSSumit Saxena 11872d1d418eSSumit Saxena 11882d1d418eSSumit Saxena /**************************************************************************** 11892d1d418eSSumit Saxena * PEL Request Msg - generic to allow header decoding * 11902d1d418eSSumit Saxena ****************************************************************************/ 11912d1d418eSSumit Saxena #ifndef MPI3_PEL_ACTION_SPECIFIC_MAX 11922d1d418eSSumit Saxena #define MPI3_PEL_ACTION_SPECIFIC_MAX (1) 11932d1d418eSSumit Saxena #endif /* MPI3_PEL_ACTION_SPECIFIC_MAX */ 11942d1d418eSSumit Saxena 11952d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQUEST 11962d1d418eSSumit Saxena { 11972d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 11982d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 11992d1d418eSSumit Saxena U8 Function; /* 0x03 */ 12002d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 12012d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 12022d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 12032d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 12042d1d418eSSumit Saxena U8 Action; /* 0x0A */ 12052d1d418eSSumit Saxena U8 Reserved0B; /* 0x0B */ 12062d1d418eSSumit Saxena U32 ActionSpecific[MPI3_PEL_ACTION_SPECIFIC_MAX]; /* 0x0C */ /* variable length */ 12072d1d418eSSumit Saxena } MPI3_PEL_REQUEST, MPI3_POINTER PTR_MPI3_PEL_REQUEST, 12082d1d418eSSumit Saxena Mpi3PELRequest_t, MPI3_POINTER pMpi3PELRequest_t; 12092d1d418eSSumit Saxena 12102d1d418eSSumit Saxena /**************************************************************************** 12112d1d418eSSumit Saxena * PEL ACTION Get Sequence Nembers * 12122d1d418eSSumit Saxena ****************************************************************************/ 12132d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS 12142d1d418eSSumit Saxena { 12152d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 12162d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 12172d1d418eSSumit Saxena U8 Function; /* 0x03 */ 12182d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 12192d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 12202d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 12212d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 12222d1d418eSSumit Saxena U8 Action; /* 0x0A */ 12232d1d418eSSumit Saxena U8 Reserved0B; /* 0x0B */ 12242d1d418eSSumit Saxena U32 Reserved0C[5]; /* 0x0C */ 12252d1d418eSSumit Saxena MPI3_SGE_UNION SGL; /* 0x20 */ 12262d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS, 12272d1d418eSSumit Saxena Mpi3PELReqActionGetSequenceNumbers_t, MPI3_POINTER pMpi3PELReqActionGetSequenceNumbers_t; 12282d1d418eSSumit Saxena 12292d1d418eSSumit Saxena /**************************************************************************** 12302d1d418eSSumit Saxena * PEL ACTION Clear Log * 12312d1d418eSSumit Saxena ****************************************************************************/ 12322d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER 12332d1d418eSSumit Saxena { 12342d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 12352d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 12362d1d418eSSumit Saxena U8 Function; /* 0x03 */ 12372d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 12382d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 12392d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 12402d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 12412d1d418eSSumit Saxena U8 Action; /* 0x0A */ 12422d1d418eSSumit Saxena U8 Reserved0B; /* 0x0B */ 12432d1d418eSSumit Saxena U8 ClearType; /* 0x0C */ 12442d1d418eSSumit Saxena U8 Reserved0D[3]; /* 0x0D */ 12452d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER, 12462d1d418eSSumit Saxena Mpi3PELReqActionClearLogMMarker_t, MPI3_POINTER pMpi3PELReqActionClearLogMMarker_t; 12472d1d418eSSumit Saxena 12482d1d418eSSumit Saxena /**************************************************************************** 12492d1d418eSSumit Saxena * PEL ACTION Get Log * 12502d1d418eSSumit Saxena ****************************************************************************/ 12512d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_GET_LOG 12522d1d418eSSumit Saxena { 12532d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 12542d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 12552d1d418eSSumit Saxena U8 Function; /* 0x03 */ 12562d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 12572d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 12582d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 12592d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 12602d1d418eSSumit Saxena U8 Action; /* 0x0A */ 12612d1d418eSSumit Saxena U8 Reserved0B; /* 0x0B */ 12622d1d418eSSumit Saxena U32 StartingSequenceNumber; /* 0x0C */ 12632d1d418eSSumit Saxena U16 Locale; /* 0x10 */ 12642d1d418eSSumit Saxena U8 Class; /* 0x12 */ 12652d1d418eSSumit Saxena U8 Reserved13; /* 0x13 */ 12662d1d418eSSumit Saxena U32 Reserved14[3]; /* 0x14 */ 12672d1d418eSSumit Saxena MPI3_SGE_UNION SGL; /* 0x20 */ 12682d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_GET_LOG, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_LOG, 12692d1d418eSSumit Saxena Mpi3PELReqActionGetLog_t, MPI3_POINTER pMpi3PELReqActionGetLog_t; 12702d1d418eSSumit Saxena 12712d1d418eSSumit Saxena /**************************************************************************** 12722d1d418eSSumit Saxena * PEL ACTION Get Count * 12732d1d418eSSumit Saxena ****************************************************************************/ 12742d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_GET_COUNT 12752d1d418eSSumit Saxena { 12762d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 12772d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 12782d1d418eSSumit Saxena U8 Function; /* 0x03 */ 12792d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 12802d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 12812d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 12822d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 12832d1d418eSSumit Saxena U8 Action; /* 0x0A */ 12842d1d418eSSumit Saxena U8 Reserved0B; /* 0x0B */ 12852d1d418eSSumit Saxena U32 StartingSequenceNumber; /* 0x0C */ 12862d1d418eSSumit Saxena U16 Locale; /* 0x10 */ 12872d1d418eSSumit Saxena U8 Class; /* 0x12 */ 12882d1d418eSSumit Saxena U8 Reserved13; /* 0x13 */ 12892d1d418eSSumit Saxena U32 Reserved14[3]; /* 0x14 */ 12902d1d418eSSumit Saxena MPI3_SGE_UNION SGL; /* 0x20 */ 12912d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_GET_COUNT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_COUNT, 12922d1d418eSSumit Saxena Mpi3PELReqActionGetCount_t, MPI3_POINTER pMpi3PELReqActionGetCount_t; 12932d1d418eSSumit Saxena 12942d1d418eSSumit Saxena /**************************************************************************** 12952d1d418eSSumit Saxena * PEL ACTION Wait * 12962d1d418eSSumit Saxena ****************************************************************************/ 12972d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_WAIT 12982d1d418eSSumit Saxena { 12992d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 13002d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 13012d1d418eSSumit Saxena U8 Function; /* 0x03 */ 13022d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 13032d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 13042d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 13052d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 13062d1d418eSSumit Saxena U8 Action; /* 0x0A */ 13072d1d418eSSumit Saxena U8 Reserved0B; /* 0x0B */ 13082d1d418eSSumit Saxena U32 StartingSequenceNumber; /* 0x0C */ 13092d1d418eSSumit Saxena U16 Locale; /* 0x10 */ 13102d1d418eSSumit Saxena U8 Class; /* 0x12 */ 13112d1d418eSSumit Saxena U8 Reserved13; /* 0x13 */ 13122d1d418eSSumit Saxena U16 WaitTime; /* 0x14 */ 13132d1d418eSSumit Saxena U16 Reserved16; /* 0x16 */ 13142d1d418eSSumit Saxena U32 Reserved18[2]; /* 0x18 */ 13152d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_WAIT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_WAIT, 13162d1d418eSSumit Saxena Mpi3PELReqActionWait_t, MPI3_POINTER pMpi3PELReqActionWait_t; 13172d1d418eSSumit Saxena 13182d1d418eSSumit Saxena /**************************************************************************** 13192d1d418eSSumit Saxena * PEL ACTION Abort * 13202d1d418eSSumit Saxena ****************************************************************************/ 13212d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_ABORT 13222d1d418eSSumit Saxena { 13232d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 13242d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 13252d1d418eSSumit Saxena U8 Function; /* 0x03 */ 13262d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 13272d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 13282d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 13292d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 13302d1d418eSSumit Saxena U8 Action; /* 0x0A */ 13312d1d418eSSumit Saxena U8 Reserved0B; /* 0x0B */ 13322d1d418eSSumit Saxena U32 Reserved0C; /* 0x0C */ 13332d1d418eSSumit Saxena U16 AbortHostTag; /* 0x10 */ 13342d1d418eSSumit Saxena U16 Reserved12; /* 0x12 */ 13352d1d418eSSumit Saxena U32 Reserved14; /* 0x14 */ 13362d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_ABORT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_ABORT, 13372d1d418eSSumit Saxena Mpi3PELReqActionAbort_t, MPI3_POINTER pMpi3PELReqActionAbort_t; 13382d1d418eSSumit Saxena 13392d1d418eSSumit Saxena /**************************************************************************** 13402d1d418eSSumit Saxena * PEL ACTION Get Print Strings * 13412d1d418eSSumit Saxena ****************************************************************************/ 13422d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS 13432d1d418eSSumit Saxena { 13442d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 13452d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 13462d1d418eSSumit Saxena U8 Function; /* 0x03 */ 13472d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 13482d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 13492d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 13502d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 13512d1d418eSSumit Saxena U8 Action; /* 0x0A */ 13522d1d418eSSumit Saxena U8 Reserved0B; /* 0x0B */ 13532d1d418eSSumit Saxena U32 Reserved0C; /* 0x0C */ 13542d1d418eSSumit Saxena U16 StartLogCode; /* 0x10 */ 13552d1d418eSSumit Saxena U16 Reserved12; /* 0x12 */ 13562d1d418eSSumit Saxena U32 Reserved14[3]; /* 0x14 */ 13572d1d418eSSumit Saxena MPI3_SGE_UNION SGL; /* 0x20 */ 13582d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS, 13592d1d418eSSumit Saxena Mpi3PELReqActionGetPrintStrings_t, MPI3_POINTER pMpi3PELReqActionGetPrintStrings_t; 13602d1d418eSSumit Saxena 13612d1d418eSSumit Saxena /**************************************************************************** 13622d1d418eSSumit Saxena * PEL ACTION Acknowledge * 13632d1d418eSSumit Saxena ****************************************************************************/ 13642d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_ACKNOWLEDGE 13652d1d418eSSumit Saxena { 13662d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 13672d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 13682d1d418eSSumit Saxena U8 Function; /* 0x03 */ 13692d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 13702d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 13712d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 13722d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 13732d1d418eSSumit Saxena U8 Action; /* 0x0A */ 13742d1d418eSSumit Saxena U8 Reserved0B; /* 0x0B */ 13752d1d418eSSumit Saxena U32 SequenceNumber; /* 0x0C */ 13762d1d418eSSumit Saxena U32 Reserved10; /* 0x10 */ 13772d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_ACKNOWLEDGE, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_ACKNOWLEDGE, 13782d1d418eSSumit Saxena Mpi3PELReqActionAcknowledge_t, MPI3_POINTER pMpi3PELReqActionAcknowledge_t; 13792d1d418eSSumit Saxena 13802d1d418eSSumit Saxena /**** Definitions for the MsgFlags field ****/ 13812d1d418eSSumit Saxena #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_MASK (0x03) 13822d1d418eSSumit Saxena #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_NO_GUIDANCE (0x00) 13832d1d418eSSumit Saxena #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_CONTINUE_OP (0x01) 13842d1d418eSSumit Saxena #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_TRANSITION_TO_FAULT (0x02) 13852d1d418eSSumit Saxena 13862d1d418eSSumit Saxena /**************************************************************************** 13872d1d418eSSumit Saxena * PEL Reply * 13882d1d418eSSumit Saxena ****************************************************************************/ 13892d1d418eSSumit Saxena typedef struct _MPI3_PEL_REPLY 13902d1d418eSSumit Saxena { 13912d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 13922d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 13932d1d418eSSumit Saxena U8 Function; /* 0x03 */ 13942d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 13952d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 13962d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 13972d1d418eSSumit Saxena U16 IOCUseOnly08; /* 0x08 */ 13982d1d418eSSumit Saxena U16 IOCStatus; /* 0x0A */ 13992d1d418eSSumit Saxena U32 IOCLogInfo; /* 0x0C */ 14002d1d418eSSumit Saxena U8 Action; /* 0x10 */ 14012d1d418eSSumit Saxena U8 Reserved11; /* 0x11 */ 14022d1d418eSSumit Saxena U16 Reserved12; /* 0x12 */ 14032d1d418eSSumit Saxena U16 PELogStatus; /* 0x14 */ 14042d1d418eSSumit Saxena U16 Reserved16; /* 0x16 */ 14052d1d418eSSumit Saxena U32 TransferLength; /* 0x18 */ 14062d1d418eSSumit Saxena } MPI3_PEL_REPLY, MPI3_POINTER PTR_MPI3_PEL_REPLY, 14072d1d418eSSumit Saxena Mpi3PELReply_t, MPI3_POINTER pMpi3PELReply_t; 14082d1d418eSSumit Saxena 14092d1d418eSSumit Saxena 14102d1d418eSSumit Saxena /***************************************************************************** 14112d1d418eSSumit Saxena * Component Image Download * 14122d1d418eSSumit Saxena ****************************************************************************/ 14132d1d418eSSumit Saxena typedef struct _MPI3_CI_DOWNLOAD_REQUEST 14142d1d418eSSumit Saxena { 14152d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 14162d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 14172d1d418eSSumit Saxena U8 Function; /* 0x03 */ 14182d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 14192d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 14202d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 14212d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 14222d1d418eSSumit Saxena U8 Action; /* 0x0A */ 14232d1d418eSSumit Saxena U8 Reserved0B; /* 0x0B */ 14242d1d418eSSumit Saxena U32 Signature1; /* 0x0C */ 14252d1d418eSSumit Saxena U32 TotalImageSize; /* 0x10 */ 14262d1d418eSSumit Saxena U32 ImageOffset; /* 0x14 */ 14272d1d418eSSumit Saxena U32 SegmentSize; /* 0x18 */ 14282d1d418eSSumit Saxena U32 Reserved1C; /* 0x1C */ 14292d1d418eSSumit Saxena MPI3_SGE_UNION SGL; /* 0x20 */ 14302d1d418eSSumit Saxena } MPI3_CI_DOWNLOAD_REQUEST, MPI3_POINTER PTR_MPI3_CI_DOWNLOAD_REQUEST, 14312d1d418eSSumit Saxena Mpi3CIDownloadRequest_t, MPI3_POINTER pMpi3CIDownloadRequest_t; 14322d1d418eSSumit Saxena 14332d1d418eSSumit Saxena /**** Definitions for the MsgFlags field ****/ 14342d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_LAST_SEGMENT (0x80) 14352d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_FORCE_FMC_ENABLE (0x40) 14362d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_SIGNED_NVDATA (0x20) 14372d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_MASK (0x03) 14382d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_FAST (0x00) 14392d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_MEDIUM (0x01) 14402d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_SLOW (0x02) 14412d1d418eSSumit Saxena 14422d1d418eSSumit Saxena /**** Definitions for the Action field ****/ 14432d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_ACTION_DOWNLOAD (0x01) 14442d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_ACTION_ONLINE_ACTIVATION (0x02) 14452d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_ACTION_OFFLINE_ACTIVATION (0x03) 14462d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_ACTION_GET_STATUS (0x04) 14472d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_ACTION_CANCEL_OFFLINE_ACTIVATION (0x05) 14482d1d418eSSumit Saxena 14492d1d418eSSumit Saxena typedef struct _MPI3_CI_DOWNLOAD_REPLY 14502d1d418eSSumit Saxena { 14512d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 14522d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 14532d1d418eSSumit Saxena U8 Function; /* 0x03 */ 14542d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 14552d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 14562d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 14572d1d418eSSumit Saxena U16 IOCUseOnly08; /* 0x08 */ 14582d1d418eSSumit Saxena U16 IOCStatus; /* 0x0A */ 14592d1d418eSSumit Saxena U32 IOCLogInfo; /* 0x0C */ 14602d1d418eSSumit Saxena U8 Flags; /* 0x10 */ 14612d1d418eSSumit Saxena U8 CacheDirty; /* 0x11 */ 14622d1d418eSSumit Saxena U8 PendingCount; /* 0x12 */ 14632d1d418eSSumit Saxena U8 Reserved13; /* 0x13 */ 14642d1d418eSSumit Saxena } MPI3_CI_DOWNLOAD_REPLY, MPI3_POINTER PTR_MPI3_CI_DOWNLOAD_REPLY, 14652d1d418eSSumit Saxena Mpi3CIDownloadReply_t, MPI3_POINTER pMpi3CIDownloadReply_t; 14662d1d418eSSumit Saxena 14672d1d418eSSumit Saxena /**** Definitions for the Flags field ****/ 14682d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_DOWNLOAD_IN_PROGRESS (0x80) 14692d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_FAILURE (0x40) 14702d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_OFFLINE_ACTIVATION_REQUIRED (0x20) 14712d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_KEY_UPDATE_PENDING (0x10) 14722d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_MASK (0x0E) 14732d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_NOT_NEEDED (0x00) 14742d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_AWAITING (0x02) 14752d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_ONLINE_PENDING (0x04) 14762d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_OFFLINE_PENDING (0x06) 14772d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_COMPATIBLE (0x01) 14782d1d418eSSumit Saxena 14792d1d418eSSumit Saxena /***************************************************************************** 14802d1d418eSSumit Saxena * Component Image Upload * 14812d1d418eSSumit Saxena ****************************************************************************/ 14822d1d418eSSumit Saxena typedef struct _MPI3_CI_UPLOAD_REQUEST 14832d1d418eSSumit Saxena { 14842d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 14852d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 14862d1d418eSSumit Saxena U8 Function; /* 0x03 */ 14872d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 14882d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 14892d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 14902d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 14912d1d418eSSumit Saxena U16 Reserved0A; /* 0x0A */ 14922d1d418eSSumit Saxena U32 Signature1; /* 0x0C */ 14932d1d418eSSumit Saxena U32 Reserved10; /* 0x10 */ 14942d1d418eSSumit Saxena U32 ImageOffset; /* 0x14 */ 14952d1d418eSSumit Saxena U32 SegmentSize; /* 0x18 */ 14962d1d418eSSumit Saxena U32 Reserved1C; /* 0x1C */ 14972d1d418eSSumit Saxena MPI3_SGE_UNION SGL; /* 0x20 */ 14982d1d418eSSumit Saxena } MPI3_CI_UPLOAD_REQUEST, MPI3_POINTER PTR_MPI3_CI_UPLOAD_REQUEST, 14992d1d418eSSumit Saxena Mpi3CIUploadRequest_t, MPI3_POINTER pMpi3CIUploadRequest_t; 15002d1d418eSSumit Saxena 15012d1d418eSSumit Saxena /**** Defines for the MsgFlags field ****/ 15022d1d418eSSumit Saxena #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_MASK (0x01) 15032d1d418eSSumit Saxena #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_PRIMARY (0x00) 15042d1d418eSSumit Saxena #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_SECONDARY (0x01) 15052d1d418eSSumit Saxena #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_MASK (0x02) 15062d1d418eSSumit Saxena #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_FLASH (0x00) 15072d1d418eSSumit Saxena #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_EXECUTABLE (0x02) 15082d1d418eSSumit Saxena 15092d1d418eSSumit Saxena /**** Defines for Signature1 field - use MPI3_IMAGE_HEADER_SIGNATURE1_ defines */ 15102d1d418eSSumit Saxena 15112d1d418eSSumit Saxena /***************************************************************************** 15122d1d418eSSumit Saxena * IO Unit Control * 15132d1d418eSSumit Saxena ****************************************************************************/ 15142d1d418eSSumit Saxena 15152d1d418eSSumit Saxena /**** Definitions for the Operation field ****/ 15162d1d418eSSumit Saxena #define MPI3_CTRL_OP_FORCE_FULL_DISCOVERY (0x01) 15172d1d418eSSumit Saxena #define MPI3_CTRL_OP_LOOKUP_MAPPING (0x02) 15182d1d418eSSumit Saxena #define MPI3_CTRL_OP_UPDATE_TIMESTAMP (0x04) 15192d1d418eSSumit Saxena #define MPI3_CTRL_OP_GET_TIMESTAMP (0x05) 15202d1d418eSSumit Saxena #define MPI3_CTRL_OP_GET_IOC_CHANGE_COUNT (0x06) 15212d1d418eSSumit Saxena #define MPI3_CTRL_OP_CHANGE_PROFILE (0x07) 15222d1d418eSSumit Saxena #define MPI3_CTRL_OP_REMOVE_DEVICE (0x10) 15232d1d418eSSumit Saxena #define MPI3_CTRL_OP_CLOSE_PERSISTENT_CONNECTION (0x11) 15242d1d418eSSumit Saxena #define MPI3_CTRL_OP_HIDDEN_ACK (0x12) 15252d1d418eSSumit Saxena #define MPI3_CTRL_OP_CLEAR_DEVICE_COUNTERS (0x13) 15262d1d418eSSumit Saxena #define MPI3_CTRL_OP_SEND_SAS_PRIMITIVE (0x20) 15272d1d418eSSumit Saxena #define MPI3_CTRL_OP_SAS_PHY_CONTROL (0x21) 15282d1d418eSSumit Saxena #define MPI3_CTRL_OP_READ_INTERNAL_BUS (0x23) 15292d1d418eSSumit Saxena #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS (0x24) 15302d1d418eSSumit Saxena #define MPI3_CTRL_OP_PCIE_LINK_CONTROL (0x30) 15312d1d418eSSumit Saxena 15322d1d418eSSumit Saxena /**** Depending on the Operation selected, the various ParamX fields *****/ 15332d1d418eSSumit Saxena /**** contain defined data values. These indexes help identify those values *****/ 15342d1d418eSSumit Saxena #define MPI3_CTRL_OP_LOOKUP_MAPPING_PARAM8_LOOKUP_METHOD_INDEX (0x00) 15352d1d418eSSumit Saxena #define MPI3_CTRL_OP_UPDATE_TIMESTAMP_PARAM64_TIMESTAMP_INDEX (0x00) 15362d1d418eSSumit Saxena #define MPI3_CTRL_OP_CHANGE_PROFILE_PARAM8_PROFILE_ID_INDEX (0x00) 15372d1d418eSSumit Saxena #define MPI3_CTRL_OP_REMOVE_DEVICE_PARAM16_DEVHANDLE_INDEX (0x00) 15382d1d418eSSumit Saxena #define MPI3_CTRL_OP_CLOSE_PERSIST_CONN_PARAM16_DEVHANDLE_INDEX (0x00) 15392d1d418eSSumit Saxena #define MPI3_CTRL_OP_HIDDEN_ACK_PARAM16_DEVHANDLE_INDEX (0x00) 15402d1d418eSSumit Saxena #define MPI3_CTRL_OP_CLEAR_DEVICE_COUNTERS_PARAM16_DEVHANDLE_INDEX (0x00) 15412d1d418eSSumit Saxena #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM8_PHY_INDEX (0x00) 15422d1d418eSSumit Saxena #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM8_PRIMSEQ_INDEX (0x01) 15432d1d418eSSumit Saxena #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM32_PRIMITIVE_INDEX (0x00) 15442d1d418eSSumit Saxena #define MPI3_CTRL_OP_SAS_PHY_CONTROL_PARAM8_ACTION_INDEX (0x00) 15452d1d418eSSumit Saxena #define MPI3_CTRL_OP_SAS_PHY_CONTROL_PARAM8_PHY_INDEX (0x01) 15462d1d418eSSumit Saxena #define MPI3_CTRL_OP_READ_INTERNAL_BUS_PARAM64_ADDRESS_INDEX (0x00) 15472d1d418eSSumit Saxena #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS_PARAM64_ADDRESS_INDEX (0x00) 15482d1d418eSSumit Saxena #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS_PARAM32_VALUE_INDEX (0x00) 15492d1d418eSSumit Saxena #define MPI3_CTRL_OP_PCIE_LINK_CONTROL_PARAM8_ACTION_INDEX (0x00) 15502d1d418eSSumit Saxena #define MPI3_CTRL_OP_PCIE_LINK_CONTROL_PARAM8_LINK_INDEX (0x01) 15512d1d418eSSumit Saxena 15522d1d418eSSumit Saxena /**** Definitions for the LookupMethod field in LOOKUP_MAPPING reqs ****/ 15532d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_WWID_ADDRESS (0x01) 15542d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_ENCLOSURE_SLOT (0x02) 15552d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03) 15562d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_PERSISTENT_ID (0x04) 15572d1d418eSSumit Saxena 15582d1d418eSSumit Saxena /**** Definitions for IoUnitControl Lookup Mapping Method Parameters ****/ 15592d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_WWIDADDR_PARAM16_DEVH_INDEX (0) 15602d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_WWIDADDR_PARAM64_WWID_INDEX (0) 15612d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_ENCLSLOT_PARAM16_SLOTNUM_INDEX (0) 15622d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_ENCLSLOT_PARAM64_ENCLOSURELID_INDEX (0) 15632d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_SASDEVNAME_PARAM16_DEVH_INDEX (0) 15642d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_SASDEVNAME_PARAM64_DEVNAME_INDEX (0) 15652d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_PERSISTID_PARAM16_DEVH_INDEX (0) 15662d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_PERSISTID_PARAM16_PERSISTENT_ID_INDEX (1) 15672d1d418eSSumit Saxena 15682d1d418eSSumit Saxena /*** Definitions for IoUnitControl Reply fields ****/ 15692d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_VALUE16_DEVH_INDEX (0) 15702d1d418eSSumit Saxena #define MPI3_CTRL_GET_TIMESTAMP_VALUE64_TIMESTAMP_INDEX (0) 15712d1d418eSSumit Saxena #define MPI3_CTRL_GET_IOC_CHANGE_COUNT_VALUE16_CHANGECOUNT_INDEX (0) 15722d1d418eSSumit Saxena #define MPI3_CTRL_READ_INTERNAL_BUS_VALUE32_VALUE_INDEX (0) 15732d1d418eSSumit Saxena 15742d1d418eSSumit Saxena /**** Definitions for the PrimSeq field in SEND_SAS_PRIMITIVE reqs ****/ 15752d1d418eSSumit Saxena #define MPI3_CTRL_PRIMFLAGS_SINGLE (0x01) 15762d1d418eSSumit Saxena #define MPI3_CTRL_PRIMFLAGS_TRIPLE (0x03) 15772d1d418eSSumit Saxena #define MPI3_CTRL_PRIMFLAGS_REDUNDANT (0x06) 15782d1d418eSSumit Saxena 15792d1d418eSSumit Saxena /**** Definitions for the Action field in PCIE_LINK_CONTROL and SAS_PHY_CONTROL reqs ****/ 15802d1d418eSSumit Saxena #define MPI3_CTRL_ACTION_NOP (0x00) 15812d1d418eSSumit Saxena #define MPI3_CTRL_ACTION_LINK_RESET (0x01) 15822d1d418eSSumit Saxena #define MPI3_CTRL_ACTION_HARD_RESET (0x02) 15832d1d418eSSumit Saxena #define MPI3_CTRL_ACTION_CLEAR_ERROR_LOG (0x05) 15842d1d418eSSumit Saxena 15852d1d418eSSumit Saxena typedef struct _MPI3_IOUNIT_CONTROL_REQUEST 15862d1d418eSSumit Saxena { 15872d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 15882d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 15892d1d418eSSumit Saxena U8 Function; /* 0x03 */ 15902d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 15912d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 15922d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 15932d1d418eSSumit Saxena U16 ChangeCount; /* 0x08 */ 15942d1d418eSSumit Saxena U8 Reserved0A; /* 0x0A */ 15952d1d418eSSumit Saxena U8 Operation; /* 0x0B */ 15962d1d418eSSumit Saxena U32 Reserved0C; /* 0x0C */ 15972d1d418eSSumit Saxena U64 Param64[2]; /* 0x10 */ 15982d1d418eSSumit Saxena U32 Param32[4]; /* 0x20 */ 15992d1d418eSSumit Saxena U16 Param16[4]; /* 0x30 */ 16002d1d418eSSumit Saxena U8 Param8[8]; /* 0x38 */ 16012d1d418eSSumit Saxena } MPI3_IOUNIT_CONTROL_REQUEST, MPI3_POINTER PTR_MPI3_IOUNIT_CONTROL_REQUEST, 16022d1d418eSSumit Saxena Mpi3IoUnitControlRequest_t, MPI3_POINTER pMpi3IoUnitControlRequest_t; 16032d1d418eSSumit Saxena 16042d1d418eSSumit Saxena 16052d1d418eSSumit Saxena typedef struct _MPI3_IOUNIT_CONTROL_REPLY 16062d1d418eSSumit Saxena { 16072d1d418eSSumit Saxena U16 HostTag; /* 0x00 */ 16082d1d418eSSumit Saxena U8 IOCUseOnly02; /* 0x02 */ 16092d1d418eSSumit Saxena U8 Function; /* 0x03 */ 16102d1d418eSSumit Saxena U16 IOCUseOnly04; /* 0x04 */ 16112d1d418eSSumit Saxena U8 IOCUseOnly06; /* 0x06 */ 16122d1d418eSSumit Saxena U8 MsgFlags; /* 0x07 */ 16132d1d418eSSumit Saxena U16 IOCUseOnly08; /* 0x08 */ 16142d1d418eSSumit Saxena U16 IOCStatus; /* 0x0A */ 16152d1d418eSSumit Saxena U32 IOCLogInfo; /* 0x0C */ 16162d1d418eSSumit Saxena U64 Value64[2]; /* 0x10 */ 16172d1d418eSSumit Saxena U32 Value32[4]; /* 0x20 */ 16182d1d418eSSumit Saxena U16 Value16[4]; /* 0x30 */ 16192d1d418eSSumit Saxena U8 Value8[8]; /* 0x38 */ 16202d1d418eSSumit Saxena } MPI3_IOUNIT_CONTROL_REPLY, MPI3_POINTER PTR_MPI3_IOUNIT_CONTROL_REPLY, 16212d1d418eSSumit Saxena Mpi3IoUnitControlReply_t, MPI3_POINTER pMpi3IoUnitControlReply_t; 16222d1d418eSSumit Saxena 16232d1d418eSSumit Saxena #endif /* MPI30_IOC_H */ 16242d1d418eSSumit Saxena 16252d1d418eSSumit Saxena 1626