1592ffb21SWarner Losh /*
2592ffb21SWarner Losh * Copyright © 1997-2003 by The XFree86 Project, Inc.
3592ffb21SWarner Losh * Copyright © 2007 Dave Airlie
4592ffb21SWarner Losh * Copyright © 2007-2008 Intel Corporation
5592ffb21SWarner Losh * Jesse Barnes <jesse.barnes@intel.com>
6592ffb21SWarner Losh * Copyright 2005-2006 Luc Verhaegen
7592ffb21SWarner Losh * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
8592ffb21SWarner Losh *
9592ffb21SWarner Losh * Permission is hereby granted, free of charge, to any person obtaining a
10592ffb21SWarner Losh * copy of this software and associated documentation files (the "Software"),
11592ffb21SWarner Losh * to deal in the Software without restriction, including without limitation
12592ffb21SWarner Losh * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13592ffb21SWarner Losh * and/or sell copies of the Software, and to permit persons to whom the
14592ffb21SWarner Losh * Software is furnished to do so, subject to the following conditions:
15592ffb21SWarner Losh *
16592ffb21SWarner Losh * The above copyright notice and this permission notice shall be included in
17592ffb21SWarner Losh * all copies or substantial portions of the Software.
18592ffb21SWarner Losh *
19592ffb21SWarner Losh * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20592ffb21SWarner Losh * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21592ffb21SWarner Losh * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22592ffb21SWarner Losh * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23592ffb21SWarner Losh * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24592ffb21SWarner Losh * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25592ffb21SWarner Losh * OTHER DEALINGS IN THE SOFTWARE.
26592ffb21SWarner Losh *
27592ffb21SWarner Losh * Except as contained in this notice, the name of the copyright holder(s)
28592ffb21SWarner Losh * and author(s) shall not be used in advertising or otherwise to promote
29592ffb21SWarner Losh * the sale, use or other dealings in this Software without prior written
30592ffb21SWarner Losh * authorization from the copyright holder(s) and author(s).
31592ffb21SWarner Losh */
32592ffb21SWarner Losh
33592ffb21SWarner Losh #include <sys/cdefs.h>
34592ffb21SWarner Losh #include <dev/drm2/drmP.h>
35592ffb21SWarner Losh #include <dev/drm2/drm_crtc.h>
36592ffb21SWarner Losh
37592ffb21SWarner Losh /**
38592ffb21SWarner Losh * drm_mode_debug_printmodeline - debug print a mode
39592ffb21SWarner Losh * @dev: DRM device
40592ffb21SWarner Losh * @mode: mode to print
41592ffb21SWarner Losh *
42592ffb21SWarner Losh * LOCKING:
43592ffb21SWarner Losh * None.
44592ffb21SWarner Losh *
45592ffb21SWarner Losh * Describe @mode using DRM_DEBUG.
46592ffb21SWarner Losh */
drm_mode_debug_printmodeline(const struct drm_display_mode * mode)47592ffb21SWarner Losh void drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
48592ffb21SWarner Losh {
49592ffb21SWarner Losh DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
50592ffb21SWarner Losh "0x%x 0x%x\n",
51592ffb21SWarner Losh mode->base.id, mode->name, mode->vrefresh, mode->clock,
52592ffb21SWarner Losh mode->hdisplay, mode->hsync_start,
53592ffb21SWarner Losh mode->hsync_end, mode->htotal,
54592ffb21SWarner Losh mode->vdisplay, mode->vsync_start,
55592ffb21SWarner Losh mode->vsync_end, mode->vtotal, mode->type, mode->flags);
56592ffb21SWarner Losh }
57592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_debug_printmodeline);
58592ffb21SWarner Losh
59592ffb21SWarner Losh /**
60592ffb21SWarner Losh * drm_cvt_mode -create a modeline based on CVT algorithm
61592ffb21SWarner Losh * @dev: DRM device
62592ffb21SWarner Losh * @hdisplay: hdisplay size
63592ffb21SWarner Losh * @vdisplay: vdisplay size
64592ffb21SWarner Losh * @vrefresh : vrefresh rate
65592ffb21SWarner Losh * @reduced : Whether the GTF calculation is simplified
66592ffb21SWarner Losh * @interlaced:Whether the interlace is supported
67592ffb21SWarner Losh *
68592ffb21SWarner Losh * LOCKING:
69592ffb21SWarner Losh * none.
70592ffb21SWarner Losh *
71592ffb21SWarner Losh * return the modeline based on CVT algorithm
72592ffb21SWarner Losh *
73592ffb21SWarner Losh * This function is called to generate the modeline based on CVT algorithm
74592ffb21SWarner Losh * according to the hdisplay, vdisplay, vrefresh.
75592ffb21SWarner Losh * It is based from the VESA(TM) Coordinated Video Timing Generator by
76592ffb21SWarner Losh * Graham Loveridge April 9, 2003 available at
77592ffb21SWarner Losh * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
78592ffb21SWarner Losh *
79592ffb21SWarner Losh * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
80592ffb21SWarner Losh * What I have done is to translate it by using integer calculation.
81592ffb21SWarner Losh */
82592ffb21SWarner Losh #define HV_FACTOR 1000
drm_cvt_mode(struct drm_device * dev,int hdisplay,int vdisplay,int vrefresh,bool reduced,bool interlaced,bool margins)83592ffb21SWarner Losh struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
84592ffb21SWarner Losh int vdisplay, int vrefresh,
85592ffb21SWarner Losh bool reduced, bool interlaced, bool margins)
86592ffb21SWarner Losh {
87592ffb21SWarner Losh /* 1) top/bottom margin size (% of height) - default: 1.8, */
88592ffb21SWarner Losh #define CVT_MARGIN_PERCENTAGE 18
89592ffb21SWarner Losh /* 2) character cell horizontal granularity (pixels) - default 8 */
90592ffb21SWarner Losh #define CVT_H_GRANULARITY 8
91592ffb21SWarner Losh /* 3) Minimum vertical porch (lines) - default 3 */
92592ffb21SWarner Losh #define CVT_MIN_V_PORCH 3
93592ffb21SWarner Losh /* 4) Minimum number of vertical back porch lines - default 6 */
94592ffb21SWarner Losh #define CVT_MIN_V_BPORCH 6
95592ffb21SWarner Losh /* Pixel Clock step (kHz) */
96592ffb21SWarner Losh #define CVT_CLOCK_STEP 250
97592ffb21SWarner Losh struct drm_display_mode *drm_mode;
98592ffb21SWarner Losh unsigned int vfieldrate, hperiod;
99592ffb21SWarner Losh int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
100592ffb21SWarner Losh int interlace;
101592ffb21SWarner Losh
102592ffb21SWarner Losh /* allocate the drm_display_mode structure. If failure, we will
103592ffb21SWarner Losh * return directly
104592ffb21SWarner Losh */
105592ffb21SWarner Losh drm_mode = drm_mode_create(dev);
106592ffb21SWarner Losh if (!drm_mode)
107592ffb21SWarner Losh return NULL;
108592ffb21SWarner Losh
109592ffb21SWarner Losh /* the CVT default refresh rate is 60Hz */
110592ffb21SWarner Losh if (!vrefresh)
111592ffb21SWarner Losh vrefresh = 60;
112592ffb21SWarner Losh
113592ffb21SWarner Losh /* the required field fresh rate */
114592ffb21SWarner Losh if (interlaced)
115592ffb21SWarner Losh vfieldrate = vrefresh * 2;
116592ffb21SWarner Losh else
117592ffb21SWarner Losh vfieldrate = vrefresh;
118592ffb21SWarner Losh
119592ffb21SWarner Losh /* horizontal pixels */
120592ffb21SWarner Losh hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
121592ffb21SWarner Losh
122592ffb21SWarner Losh /* determine the left&right borders */
123592ffb21SWarner Losh hmargin = 0;
124592ffb21SWarner Losh if (margins) {
125592ffb21SWarner Losh hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
126592ffb21SWarner Losh hmargin -= hmargin % CVT_H_GRANULARITY;
127592ffb21SWarner Losh }
128592ffb21SWarner Losh /* find the total active pixels */
129592ffb21SWarner Losh drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
130592ffb21SWarner Losh
131592ffb21SWarner Losh /* find the number of lines per field */
132592ffb21SWarner Losh if (interlaced)
133592ffb21SWarner Losh vdisplay_rnd = vdisplay / 2;
134592ffb21SWarner Losh else
135592ffb21SWarner Losh vdisplay_rnd = vdisplay;
136592ffb21SWarner Losh
137592ffb21SWarner Losh /* find the top & bottom borders */
138592ffb21SWarner Losh vmargin = 0;
139592ffb21SWarner Losh if (margins)
140592ffb21SWarner Losh vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
141592ffb21SWarner Losh
142592ffb21SWarner Losh drm_mode->vdisplay = vdisplay + 2 * vmargin;
143592ffb21SWarner Losh
144592ffb21SWarner Losh /* Interlaced */
145592ffb21SWarner Losh if (interlaced)
146592ffb21SWarner Losh interlace = 1;
147592ffb21SWarner Losh else
148592ffb21SWarner Losh interlace = 0;
149592ffb21SWarner Losh
150592ffb21SWarner Losh /* Determine VSync Width from aspect ratio */
151592ffb21SWarner Losh if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
152592ffb21SWarner Losh vsync = 4;
153592ffb21SWarner Losh else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
154592ffb21SWarner Losh vsync = 5;
155592ffb21SWarner Losh else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
156592ffb21SWarner Losh vsync = 6;
157592ffb21SWarner Losh else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
158592ffb21SWarner Losh vsync = 7;
159592ffb21SWarner Losh else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
160592ffb21SWarner Losh vsync = 7;
161592ffb21SWarner Losh else /* custom */
162592ffb21SWarner Losh vsync = 10;
163592ffb21SWarner Losh
164592ffb21SWarner Losh if (!reduced) {
165592ffb21SWarner Losh /* simplify the GTF calculation */
166592ffb21SWarner Losh /* 4) Minimum time of vertical sync + back porch interval (µs)
167592ffb21SWarner Losh * default 550.0
168592ffb21SWarner Losh */
169592ffb21SWarner Losh int tmp1, tmp2;
170592ffb21SWarner Losh #define CVT_MIN_VSYNC_BP 550
171592ffb21SWarner Losh /* 3) Nominal HSync width (% of line period) - default 8 */
172592ffb21SWarner Losh #define CVT_HSYNC_PERCENTAGE 8
173592ffb21SWarner Losh unsigned int hblank_percentage;
174*42278fc2SJohn Baldwin int vsyncandback_porch, hblank;
175592ffb21SWarner Losh
176592ffb21SWarner Losh /* estimated the horizontal period */
177592ffb21SWarner Losh tmp1 = HV_FACTOR * 1000000 -
178592ffb21SWarner Losh CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
179592ffb21SWarner Losh tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
180592ffb21SWarner Losh interlace;
181592ffb21SWarner Losh hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
182592ffb21SWarner Losh
183592ffb21SWarner Losh tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
184592ffb21SWarner Losh /* 9. Find number of lines in sync + backporch */
185592ffb21SWarner Losh if (tmp1 < (vsync + CVT_MIN_V_PORCH))
186592ffb21SWarner Losh vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
187592ffb21SWarner Losh else
188592ffb21SWarner Losh vsyncandback_porch = tmp1;
189592ffb21SWarner Losh drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
190592ffb21SWarner Losh vsyncandback_porch + CVT_MIN_V_PORCH;
191592ffb21SWarner Losh /* 5) Definition of Horizontal blanking time limitation */
192592ffb21SWarner Losh /* Gradient (%/kHz) - default 600 */
193592ffb21SWarner Losh #define CVT_M_FACTOR 600
194592ffb21SWarner Losh /* Offset (%) - default 40 */
195592ffb21SWarner Losh #define CVT_C_FACTOR 40
196592ffb21SWarner Losh /* Blanking time scaling factor - default 128 */
197592ffb21SWarner Losh #define CVT_K_FACTOR 128
198592ffb21SWarner Losh /* Scaling factor weighting - default 20 */
199592ffb21SWarner Losh #define CVT_J_FACTOR 20
200592ffb21SWarner Losh #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
201592ffb21SWarner Losh #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
202592ffb21SWarner Losh CVT_J_FACTOR)
203592ffb21SWarner Losh /* 12. Find ideal blanking duty cycle from formula */
204592ffb21SWarner Losh hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
205592ffb21SWarner Losh hperiod / 1000;
206592ffb21SWarner Losh /* 13. Blanking time */
207592ffb21SWarner Losh if (hblank_percentage < 20 * HV_FACTOR)
208592ffb21SWarner Losh hblank_percentage = 20 * HV_FACTOR;
209592ffb21SWarner Losh hblank = drm_mode->hdisplay * hblank_percentage /
210592ffb21SWarner Losh (100 * HV_FACTOR - hblank_percentage);
211592ffb21SWarner Losh hblank -= hblank % (2 * CVT_H_GRANULARITY);
212592ffb21SWarner Losh /* 14. find the total pixes per line */
213592ffb21SWarner Losh drm_mode->htotal = drm_mode->hdisplay + hblank;
214592ffb21SWarner Losh drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
215592ffb21SWarner Losh drm_mode->hsync_start = drm_mode->hsync_end -
216592ffb21SWarner Losh (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
217592ffb21SWarner Losh drm_mode->hsync_start += CVT_H_GRANULARITY -
218592ffb21SWarner Losh drm_mode->hsync_start % CVT_H_GRANULARITY;
219592ffb21SWarner Losh /* fill the Vsync values */
220592ffb21SWarner Losh drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
221592ffb21SWarner Losh drm_mode->vsync_end = drm_mode->vsync_start + vsync;
222592ffb21SWarner Losh } else {
223592ffb21SWarner Losh /* Reduced blanking */
224592ffb21SWarner Losh /* Minimum vertical blanking interval time (µs)- default 460 */
225592ffb21SWarner Losh #define CVT_RB_MIN_VBLANK 460
226592ffb21SWarner Losh /* Fixed number of clocks for horizontal sync */
227592ffb21SWarner Losh #define CVT_RB_H_SYNC 32
228592ffb21SWarner Losh /* Fixed number of clocks for horizontal blanking */
229592ffb21SWarner Losh #define CVT_RB_H_BLANK 160
230592ffb21SWarner Losh /* Fixed number of lines for vertical front porch - default 3*/
231592ffb21SWarner Losh #define CVT_RB_VFPORCH 3
232592ffb21SWarner Losh int vbilines;
233592ffb21SWarner Losh int tmp1, tmp2;
234592ffb21SWarner Losh /* 8. Estimate Horizontal period. */
235592ffb21SWarner Losh tmp1 = HV_FACTOR * 1000000 -
236592ffb21SWarner Losh CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
237592ffb21SWarner Losh tmp2 = vdisplay_rnd + 2 * vmargin;
238592ffb21SWarner Losh hperiod = tmp1 / (tmp2 * vfieldrate);
239592ffb21SWarner Losh /* 9. Find number of lines in vertical blanking */
240592ffb21SWarner Losh vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
241592ffb21SWarner Losh /* 10. Check if vertical blanking is sufficient */
242592ffb21SWarner Losh if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
243592ffb21SWarner Losh vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
244592ffb21SWarner Losh /* 11. Find total number of lines in vertical field */
245592ffb21SWarner Losh drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
246592ffb21SWarner Losh /* 12. Find total number of pixels in a line */
247592ffb21SWarner Losh drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
248592ffb21SWarner Losh /* Fill in HSync values */
249592ffb21SWarner Losh drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
250592ffb21SWarner Losh drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
251592ffb21SWarner Losh /* Fill in VSync values */
252592ffb21SWarner Losh drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
253592ffb21SWarner Losh drm_mode->vsync_end = drm_mode->vsync_start + vsync;
254592ffb21SWarner Losh }
255592ffb21SWarner Losh /* 15/13. Find pixel clock frequency (kHz for xf86) */
256592ffb21SWarner Losh drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
257592ffb21SWarner Losh drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
258592ffb21SWarner Losh /* 18/16. Find actual vertical frame frequency */
259592ffb21SWarner Losh /* ignore - just set the mode flag for interlaced */
260592ffb21SWarner Losh if (interlaced) {
261592ffb21SWarner Losh drm_mode->vtotal *= 2;
262592ffb21SWarner Losh drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
263592ffb21SWarner Losh }
264592ffb21SWarner Losh /* Fill the mode line name */
265592ffb21SWarner Losh drm_mode_set_name(drm_mode);
266592ffb21SWarner Losh if (reduced)
267592ffb21SWarner Losh drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
268592ffb21SWarner Losh DRM_MODE_FLAG_NVSYNC);
269592ffb21SWarner Losh else
270592ffb21SWarner Losh drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
271592ffb21SWarner Losh DRM_MODE_FLAG_NHSYNC);
272592ffb21SWarner Losh
273592ffb21SWarner Losh return drm_mode;
274592ffb21SWarner Losh }
275592ffb21SWarner Losh EXPORT_SYMBOL(drm_cvt_mode);
276592ffb21SWarner Losh
277592ffb21SWarner Losh /**
278592ffb21SWarner Losh * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
279592ffb21SWarner Losh *
280592ffb21SWarner Losh * @dev :drm device
281592ffb21SWarner Losh * @hdisplay :hdisplay size
282592ffb21SWarner Losh * @vdisplay :vdisplay size
283592ffb21SWarner Losh * @vrefresh :vrefresh rate.
284592ffb21SWarner Losh * @interlaced :whether the interlace is supported
285592ffb21SWarner Losh * @margins :desired margin size
286592ffb21SWarner Losh * @GTF_[MCKJ] :extended GTF formula parameters
287592ffb21SWarner Losh *
288592ffb21SWarner Losh * LOCKING.
289592ffb21SWarner Losh * none.
290592ffb21SWarner Losh *
291592ffb21SWarner Losh * return the modeline based on full GTF algorithm.
292592ffb21SWarner Losh *
293592ffb21SWarner Losh * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
294592ffb21SWarner Losh * in here multiplied by two. For a C of 40, pass in 80.
295592ffb21SWarner Losh */
296592ffb21SWarner Losh struct drm_display_mode *
drm_gtf_mode_complex(struct drm_device * dev,int hdisplay,int vdisplay,int vrefresh,bool interlaced,int margins,int GTF_M,int GTF_2C,int GTF_K,int GTF_2J)297592ffb21SWarner Losh drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
298592ffb21SWarner Losh int vrefresh, bool interlaced, int margins,
299592ffb21SWarner Losh int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
300592ffb21SWarner Losh { /* 1) top/bottom margin size (% of height) - default: 1.8, */
301592ffb21SWarner Losh #define GTF_MARGIN_PERCENTAGE 18
302592ffb21SWarner Losh /* 2) character cell horizontal granularity (pixels) - default 8 */
303592ffb21SWarner Losh #define GTF_CELL_GRAN 8
304592ffb21SWarner Losh /* 3) Minimum vertical porch (lines) - default 3 */
305592ffb21SWarner Losh #define GTF_MIN_V_PORCH 1
306592ffb21SWarner Losh /* width of vsync in lines */
307592ffb21SWarner Losh #define V_SYNC_RQD 3
308592ffb21SWarner Losh /* width of hsync as % of total line */
309592ffb21SWarner Losh #define H_SYNC_PERCENT 8
310592ffb21SWarner Losh /* min time of vsync + back porch (microsec) */
311592ffb21SWarner Losh #define MIN_VSYNC_PLUS_BP 550
312592ffb21SWarner Losh /* C' and M' are part of the Blanking Duty Cycle computation */
313592ffb21SWarner Losh #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
314592ffb21SWarner Losh #define GTF_M_PRIME (GTF_K * GTF_M / 256)
315592ffb21SWarner Losh struct drm_display_mode *drm_mode;
316592ffb21SWarner Losh unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
317592ffb21SWarner Losh int top_margin, bottom_margin;
318592ffb21SWarner Losh int interlace;
319592ffb21SWarner Losh unsigned int hfreq_est;
320*42278fc2SJohn Baldwin int vsync_plus_bp;
321*42278fc2SJohn Baldwin unsigned int vtotal_lines;
322592ffb21SWarner Losh int left_margin, right_margin;
323592ffb21SWarner Losh unsigned int total_active_pixels, ideal_duty_cycle;
324592ffb21SWarner Losh unsigned int hblank, total_pixels, pixel_freq;
325592ffb21SWarner Losh int hsync, hfront_porch, vodd_front_porch_lines;
326592ffb21SWarner Losh unsigned int tmp1, tmp2;
327592ffb21SWarner Losh
328592ffb21SWarner Losh drm_mode = drm_mode_create(dev);
329592ffb21SWarner Losh if (!drm_mode)
330592ffb21SWarner Losh return NULL;
331592ffb21SWarner Losh
332592ffb21SWarner Losh /* 1. In order to give correct results, the number of horizontal
333592ffb21SWarner Losh * pixels requested is first processed to ensure that it is divisible
334592ffb21SWarner Losh * by the character size, by rounding it to the nearest character
335592ffb21SWarner Losh * cell boundary:
336592ffb21SWarner Losh */
337592ffb21SWarner Losh hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
338592ffb21SWarner Losh hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
339592ffb21SWarner Losh
340592ffb21SWarner Losh /* 2. If interlace is requested, the number of vertical lines assumed
341592ffb21SWarner Losh * by the calculation must be halved, as the computation calculates
342592ffb21SWarner Losh * the number of vertical lines per field.
343592ffb21SWarner Losh */
344592ffb21SWarner Losh if (interlaced)
345592ffb21SWarner Losh vdisplay_rnd = vdisplay / 2;
346592ffb21SWarner Losh else
347592ffb21SWarner Losh vdisplay_rnd = vdisplay;
348592ffb21SWarner Losh
349592ffb21SWarner Losh /* 3. Find the frame rate required: */
350592ffb21SWarner Losh if (interlaced)
351592ffb21SWarner Losh vfieldrate_rqd = vrefresh * 2;
352592ffb21SWarner Losh else
353592ffb21SWarner Losh vfieldrate_rqd = vrefresh;
354592ffb21SWarner Losh
355592ffb21SWarner Losh /* 4. Find number of lines in Top margin: */
356592ffb21SWarner Losh top_margin = 0;
357592ffb21SWarner Losh if (margins)
358592ffb21SWarner Losh top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
359592ffb21SWarner Losh 1000;
360592ffb21SWarner Losh /* 5. Find number of lines in bottom margin: */
361592ffb21SWarner Losh bottom_margin = top_margin;
362592ffb21SWarner Losh
363592ffb21SWarner Losh /* 6. If interlace is required, then set variable interlace: */
364592ffb21SWarner Losh if (interlaced)
365592ffb21SWarner Losh interlace = 1;
366592ffb21SWarner Losh else
367592ffb21SWarner Losh interlace = 0;
368592ffb21SWarner Losh
369592ffb21SWarner Losh /* 7. Estimate the Horizontal frequency */
370592ffb21SWarner Losh {
371592ffb21SWarner Losh tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
372592ffb21SWarner Losh tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
373592ffb21SWarner Losh 2 + interlace;
374592ffb21SWarner Losh hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
375592ffb21SWarner Losh }
376592ffb21SWarner Losh
377592ffb21SWarner Losh /* 8. Find the number of lines in V sync + back porch */
378592ffb21SWarner Losh /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
379592ffb21SWarner Losh vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
380592ffb21SWarner Losh vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
381592ffb21SWarner Losh /* 10. Find the total number of lines in Vertical field period: */
382592ffb21SWarner Losh vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
383592ffb21SWarner Losh vsync_plus_bp + GTF_MIN_V_PORCH;
384592ffb21SWarner Losh
385592ffb21SWarner Losh /* 15. Find number of pixels in left margin: */
386592ffb21SWarner Losh if (margins)
387592ffb21SWarner Losh left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
388592ffb21SWarner Losh 1000;
389592ffb21SWarner Losh else
390592ffb21SWarner Losh left_margin = 0;
391592ffb21SWarner Losh
392592ffb21SWarner Losh /* 16.Find number of pixels in right margin: */
393592ffb21SWarner Losh right_margin = left_margin;
394592ffb21SWarner Losh /* 17.Find total number of active pixels in image and left and right */
395592ffb21SWarner Losh total_active_pixels = hdisplay_rnd + left_margin + right_margin;
396592ffb21SWarner Losh /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
397592ffb21SWarner Losh ideal_duty_cycle = GTF_C_PRIME * 1000 -
398592ffb21SWarner Losh (GTF_M_PRIME * 1000000 / hfreq_est);
399592ffb21SWarner Losh /* 19.Find the number of pixels in the blanking time to the nearest
400592ffb21SWarner Losh * double character cell: */
401592ffb21SWarner Losh hblank = total_active_pixels * ideal_duty_cycle /
402592ffb21SWarner Losh (100000 - ideal_duty_cycle);
403592ffb21SWarner Losh hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
404592ffb21SWarner Losh hblank = hblank * 2 * GTF_CELL_GRAN;
405592ffb21SWarner Losh /* 20.Find total number of pixels: */
406592ffb21SWarner Losh total_pixels = total_active_pixels + hblank;
407592ffb21SWarner Losh /* 21.Find pixel clock frequency: */
408592ffb21SWarner Losh pixel_freq = total_pixels * hfreq_est / 1000;
409592ffb21SWarner Losh /* Stage 1 computations are now complete; I should really pass
410592ffb21SWarner Losh * the results to another function and do the Stage 2 computations,
411592ffb21SWarner Losh * but I only need a few more values so I'll just append the
412592ffb21SWarner Losh * computations here for now */
413592ffb21SWarner Losh /* 17. Find the number of pixels in the horizontal sync period: */
414592ffb21SWarner Losh hsync = H_SYNC_PERCENT * total_pixels / 100;
415592ffb21SWarner Losh hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
416592ffb21SWarner Losh hsync = hsync * GTF_CELL_GRAN;
417592ffb21SWarner Losh /* 18. Find the number of pixels in horizontal front porch period */
418592ffb21SWarner Losh hfront_porch = hblank / 2 - hsync;
419592ffb21SWarner Losh /* 36. Find the number of lines in the odd front porch period: */
420592ffb21SWarner Losh vodd_front_porch_lines = GTF_MIN_V_PORCH ;
421592ffb21SWarner Losh
422592ffb21SWarner Losh /* finally, pack the results in the mode struct */
423592ffb21SWarner Losh drm_mode->hdisplay = hdisplay_rnd;
424592ffb21SWarner Losh drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
425592ffb21SWarner Losh drm_mode->hsync_end = drm_mode->hsync_start + hsync;
426592ffb21SWarner Losh drm_mode->htotal = total_pixels;
427592ffb21SWarner Losh drm_mode->vdisplay = vdisplay_rnd;
428592ffb21SWarner Losh drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
429592ffb21SWarner Losh drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
430592ffb21SWarner Losh drm_mode->vtotal = vtotal_lines;
431592ffb21SWarner Losh
432592ffb21SWarner Losh drm_mode->clock = pixel_freq;
433592ffb21SWarner Losh
434592ffb21SWarner Losh if (interlaced) {
435592ffb21SWarner Losh drm_mode->vtotal *= 2;
436592ffb21SWarner Losh drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
437592ffb21SWarner Losh }
438592ffb21SWarner Losh
439592ffb21SWarner Losh drm_mode_set_name(drm_mode);
440592ffb21SWarner Losh if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
441592ffb21SWarner Losh drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
442592ffb21SWarner Losh else
443592ffb21SWarner Losh drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
444592ffb21SWarner Losh
445592ffb21SWarner Losh return drm_mode;
446592ffb21SWarner Losh }
447592ffb21SWarner Losh EXPORT_SYMBOL(drm_gtf_mode_complex);
448592ffb21SWarner Losh
449592ffb21SWarner Losh /**
450592ffb21SWarner Losh * drm_gtf_mode - create the modeline based on GTF algorithm
451592ffb21SWarner Losh *
452592ffb21SWarner Losh * @dev :drm device
453592ffb21SWarner Losh * @hdisplay :hdisplay size
454592ffb21SWarner Losh * @vdisplay :vdisplay size
455592ffb21SWarner Losh * @vrefresh :vrefresh rate.
456592ffb21SWarner Losh * @interlaced :whether the interlace is supported
457592ffb21SWarner Losh * @margins :whether the margin is supported
458592ffb21SWarner Losh *
459592ffb21SWarner Losh * LOCKING.
460592ffb21SWarner Losh * none.
461592ffb21SWarner Losh *
462592ffb21SWarner Losh * return the modeline based on GTF algorithm
463592ffb21SWarner Losh *
464592ffb21SWarner Losh * This function is to create the modeline based on the GTF algorithm.
465592ffb21SWarner Losh * Generalized Timing Formula is derived from:
466592ffb21SWarner Losh * GTF Spreadsheet by Andy Morrish (1/5/97)
467592ffb21SWarner Losh * available at http://www.vesa.org
468592ffb21SWarner Losh *
469592ffb21SWarner Losh * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
470592ffb21SWarner Losh * What I have done is to translate it by using integer calculation.
471592ffb21SWarner Losh * I also refer to the function of fb_get_mode in the file of
472592ffb21SWarner Losh * drivers/video/fbmon.c
473592ffb21SWarner Losh *
474592ffb21SWarner Losh * Standard GTF parameters:
475592ffb21SWarner Losh * M = 600
476592ffb21SWarner Losh * C = 40
477592ffb21SWarner Losh * K = 128
478592ffb21SWarner Losh * J = 20
479592ffb21SWarner Losh */
480592ffb21SWarner Losh struct drm_display_mode *
drm_gtf_mode(struct drm_device * dev,int hdisplay,int vdisplay,int vrefresh,bool lace,int margins)481592ffb21SWarner Losh drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
482592ffb21SWarner Losh bool lace, int margins)
483592ffb21SWarner Losh {
484592ffb21SWarner Losh return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,
485592ffb21SWarner Losh margins, 600, 40 * 2, 128, 20 * 2);
486592ffb21SWarner Losh }
487592ffb21SWarner Losh EXPORT_SYMBOL(drm_gtf_mode);
488592ffb21SWarner Losh
489592ffb21SWarner Losh /**
490592ffb21SWarner Losh * drm_mode_set_name - set the name on a mode
491592ffb21SWarner Losh * @mode: name will be set in this mode
492592ffb21SWarner Losh *
493592ffb21SWarner Losh * LOCKING:
494592ffb21SWarner Losh * None.
495592ffb21SWarner Losh *
496592ffb21SWarner Losh * Set the name of @mode to a standard format.
497592ffb21SWarner Losh */
drm_mode_set_name(struct drm_display_mode * mode)498592ffb21SWarner Losh void drm_mode_set_name(struct drm_display_mode *mode)
499592ffb21SWarner Losh {
500592ffb21SWarner Losh bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
501592ffb21SWarner Losh
502592ffb21SWarner Losh snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
503592ffb21SWarner Losh mode->hdisplay, mode->vdisplay,
504592ffb21SWarner Losh interlaced ? "i" : "");
505592ffb21SWarner Losh }
506592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_set_name);
507592ffb21SWarner Losh
508592ffb21SWarner Losh /**
509592ffb21SWarner Losh * drm_mode_list_concat - move modes from one list to another
510592ffb21SWarner Losh * @head: source list
511592ffb21SWarner Losh * @new: dst list
512592ffb21SWarner Losh *
513592ffb21SWarner Losh * LOCKING:
514592ffb21SWarner Losh * Caller must ensure both lists are locked.
515592ffb21SWarner Losh *
516592ffb21SWarner Losh * Move all the modes from @head to @new.
517592ffb21SWarner Losh */
drm_mode_list_concat(struct list_head * head,struct list_head * new)518592ffb21SWarner Losh void drm_mode_list_concat(struct list_head *head, struct list_head *new)
519592ffb21SWarner Losh {
520592ffb21SWarner Losh
521592ffb21SWarner Losh struct list_head *entry, *tmp;
522592ffb21SWarner Losh
523592ffb21SWarner Losh list_for_each_safe(entry, tmp, head) {
524592ffb21SWarner Losh list_move_tail(entry, new);
525592ffb21SWarner Losh }
526592ffb21SWarner Losh }
527592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_list_concat);
528592ffb21SWarner Losh
529592ffb21SWarner Losh /**
530592ffb21SWarner Losh * drm_mode_width - get the width of a mode
531592ffb21SWarner Losh * @mode: mode
532592ffb21SWarner Losh *
533592ffb21SWarner Losh * LOCKING:
534592ffb21SWarner Losh * None.
535592ffb21SWarner Losh *
536592ffb21SWarner Losh * Return @mode's width (hdisplay) value.
537592ffb21SWarner Losh *
538592ffb21SWarner Losh * FIXME: is this needed?
539592ffb21SWarner Losh *
540592ffb21SWarner Losh * RETURNS:
541592ffb21SWarner Losh * @mode->hdisplay
542592ffb21SWarner Losh */
drm_mode_width(const struct drm_display_mode * mode)543592ffb21SWarner Losh int drm_mode_width(const struct drm_display_mode *mode)
544592ffb21SWarner Losh {
545592ffb21SWarner Losh return mode->hdisplay;
546592ffb21SWarner Losh
547592ffb21SWarner Losh }
548592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_width);
549592ffb21SWarner Losh
550592ffb21SWarner Losh /**
551592ffb21SWarner Losh * drm_mode_height - get the height of a mode
552592ffb21SWarner Losh * @mode: mode
553592ffb21SWarner Losh *
554592ffb21SWarner Losh * LOCKING:
555592ffb21SWarner Losh * None.
556592ffb21SWarner Losh *
557592ffb21SWarner Losh * Return @mode's height (vdisplay) value.
558592ffb21SWarner Losh *
559592ffb21SWarner Losh * FIXME: is this needed?
560592ffb21SWarner Losh *
561592ffb21SWarner Losh * RETURNS:
562592ffb21SWarner Losh * @mode->vdisplay
563592ffb21SWarner Losh */
drm_mode_height(const struct drm_display_mode * mode)564592ffb21SWarner Losh int drm_mode_height(const struct drm_display_mode *mode)
565592ffb21SWarner Losh {
566592ffb21SWarner Losh return mode->vdisplay;
567592ffb21SWarner Losh }
568592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_height);
569592ffb21SWarner Losh
570592ffb21SWarner Losh /** drm_mode_hsync - get the hsync of a mode
571592ffb21SWarner Losh * @mode: mode
572592ffb21SWarner Losh *
573592ffb21SWarner Losh * LOCKING:
574592ffb21SWarner Losh * None.
575592ffb21SWarner Losh *
576592ffb21SWarner Losh * Return @modes's hsync rate in kHz, rounded to the nearest int.
577592ffb21SWarner Losh */
drm_mode_hsync(const struct drm_display_mode * mode)578592ffb21SWarner Losh int drm_mode_hsync(const struct drm_display_mode *mode)
579592ffb21SWarner Losh {
580592ffb21SWarner Losh unsigned int calc_val;
581592ffb21SWarner Losh
582592ffb21SWarner Losh if (mode->hsync)
583592ffb21SWarner Losh return mode->hsync;
584592ffb21SWarner Losh
585592ffb21SWarner Losh if (mode->htotal < 0)
586592ffb21SWarner Losh return 0;
587592ffb21SWarner Losh
588592ffb21SWarner Losh calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
589592ffb21SWarner Losh calc_val += 500; /* round to 1000Hz */
590592ffb21SWarner Losh calc_val /= 1000; /* truncate to kHz */
591592ffb21SWarner Losh
592592ffb21SWarner Losh return calc_val;
593592ffb21SWarner Losh }
594592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_hsync);
595592ffb21SWarner Losh
596592ffb21SWarner Losh /**
597592ffb21SWarner Losh * drm_mode_vrefresh - get the vrefresh of a mode
598592ffb21SWarner Losh * @mode: mode
599592ffb21SWarner Losh *
600592ffb21SWarner Losh * LOCKING:
601592ffb21SWarner Losh * None.
602592ffb21SWarner Losh *
603592ffb21SWarner Losh * Return @mode's vrefresh rate in Hz or calculate it if necessary.
604592ffb21SWarner Losh *
605592ffb21SWarner Losh * FIXME: why is this needed? shouldn't vrefresh be set already?
606592ffb21SWarner Losh *
607592ffb21SWarner Losh * RETURNS:
608592ffb21SWarner Losh * Vertical refresh rate. It will be the result of actual value plus 0.5.
609592ffb21SWarner Losh * If it is 70.288, it will return 70Hz.
610592ffb21SWarner Losh * If it is 59.6, it will return 60Hz.
611592ffb21SWarner Losh */
drm_mode_vrefresh(const struct drm_display_mode * mode)612592ffb21SWarner Losh int drm_mode_vrefresh(const struct drm_display_mode *mode)
613592ffb21SWarner Losh {
614592ffb21SWarner Losh int refresh = 0;
615592ffb21SWarner Losh unsigned int calc_val;
616592ffb21SWarner Losh
617592ffb21SWarner Losh if (mode->vrefresh > 0)
618592ffb21SWarner Losh refresh = mode->vrefresh;
619592ffb21SWarner Losh else if (mode->htotal > 0 && mode->vtotal > 0) {
620592ffb21SWarner Losh int vtotal;
621592ffb21SWarner Losh vtotal = mode->vtotal;
622592ffb21SWarner Losh /* work out vrefresh the value will be x1000 */
623592ffb21SWarner Losh calc_val = (mode->clock * 1000);
624592ffb21SWarner Losh calc_val /= mode->htotal;
625592ffb21SWarner Losh refresh = (calc_val + vtotal / 2) / vtotal;
626592ffb21SWarner Losh
627592ffb21SWarner Losh if (mode->flags & DRM_MODE_FLAG_INTERLACE)
628592ffb21SWarner Losh refresh *= 2;
629592ffb21SWarner Losh if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
630592ffb21SWarner Losh refresh /= 2;
631592ffb21SWarner Losh if (mode->vscan > 1)
632592ffb21SWarner Losh refresh /= mode->vscan;
633592ffb21SWarner Losh }
634592ffb21SWarner Losh return refresh;
635592ffb21SWarner Losh }
636592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_vrefresh);
637592ffb21SWarner Losh
638592ffb21SWarner Losh /**
639592ffb21SWarner Losh * drm_mode_set_crtcinfo - set CRTC modesetting parameters
640592ffb21SWarner Losh * @p: mode
641592ffb21SWarner Losh * @adjust_flags: unused? (FIXME)
642592ffb21SWarner Losh *
643592ffb21SWarner Losh * LOCKING:
644592ffb21SWarner Losh * None.
645592ffb21SWarner Losh *
646592ffb21SWarner Losh * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
647592ffb21SWarner Losh */
drm_mode_set_crtcinfo(struct drm_display_mode * p,int adjust_flags)648592ffb21SWarner Losh void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
649592ffb21SWarner Losh {
650592ffb21SWarner Losh if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
651592ffb21SWarner Losh return;
652592ffb21SWarner Losh
653592ffb21SWarner Losh p->crtc_hdisplay = p->hdisplay;
654592ffb21SWarner Losh p->crtc_hsync_start = p->hsync_start;
655592ffb21SWarner Losh p->crtc_hsync_end = p->hsync_end;
656592ffb21SWarner Losh p->crtc_htotal = p->htotal;
657592ffb21SWarner Losh p->crtc_hskew = p->hskew;
658592ffb21SWarner Losh p->crtc_vdisplay = p->vdisplay;
659592ffb21SWarner Losh p->crtc_vsync_start = p->vsync_start;
660592ffb21SWarner Losh p->crtc_vsync_end = p->vsync_end;
661592ffb21SWarner Losh p->crtc_vtotal = p->vtotal;
662592ffb21SWarner Losh
663592ffb21SWarner Losh if (p->flags & DRM_MODE_FLAG_INTERLACE) {
664592ffb21SWarner Losh if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
665592ffb21SWarner Losh p->crtc_vdisplay /= 2;
666592ffb21SWarner Losh p->crtc_vsync_start /= 2;
667592ffb21SWarner Losh p->crtc_vsync_end /= 2;
668592ffb21SWarner Losh p->crtc_vtotal /= 2;
669592ffb21SWarner Losh }
670592ffb21SWarner Losh }
671592ffb21SWarner Losh
672592ffb21SWarner Losh if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
673592ffb21SWarner Losh p->crtc_vdisplay *= 2;
674592ffb21SWarner Losh p->crtc_vsync_start *= 2;
675592ffb21SWarner Losh p->crtc_vsync_end *= 2;
676592ffb21SWarner Losh p->crtc_vtotal *= 2;
677592ffb21SWarner Losh }
678592ffb21SWarner Losh
679592ffb21SWarner Losh if (p->vscan > 1) {
680592ffb21SWarner Losh p->crtc_vdisplay *= p->vscan;
681592ffb21SWarner Losh p->crtc_vsync_start *= p->vscan;
682592ffb21SWarner Losh p->crtc_vsync_end *= p->vscan;
683592ffb21SWarner Losh p->crtc_vtotal *= p->vscan;
684592ffb21SWarner Losh }
685592ffb21SWarner Losh
686592ffb21SWarner Losh p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
687592ffb21SWarner Losh p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
688592ffb21SWarner Losh p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
689592ffb21SWarner Losh p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
690592ffb21SWarner Losh }
691592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_set_crtcinfo);
692592ffb21SWarner Losh
693592ffb21SWarner Losh
694592ffb21SWarner Losh /**
695592ffb21SWarner Losh * drm_mode_copy - copy the mode
696592ffb21SWarner Losh * @dst: mode to overwrite
697592ffb21SWarner Losh * @src: mode to copy
698592ffb21SWarner Losh *
699592ffb21SWarner Losh * LOCKING:
700592ffb21SWarner Losh * None.
701592ffb21SWarner Losh *
702592ffb21SWarner Losh * Copy an existing mode into another mode, preserving the object id
703592ffb21SWarner Losh * of the destination mode.
704592ffb21SWarner Losh */
drm_mode_copy(struct drm_display_mode * dst,const struct drm_display_mode * src)705592ffb21SWarner Losh void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
706592ffb21SWarner Losh {
707592ffb21SWarner Losh int id = dst->base.id;
708592ffb21SWarner Losh
709592ffb21SWarner Losh *dst = *src;
710592ffb21SWarner Losh dst->base.id = id;
711592ffb21SWarner Losh INIT_LIST_HEAD(&dst->head);
712592ffb21SWarner Losh }
713592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_copy);
714592ffb21SWarner Losh
715592ffb21SWarner Losh /**
716592ffb21SWarner Losh * drm_mode_duplicate - allocate and duplicate an existing mode
717592ffb21SWarner Losh * @m: mode to duplicate
718592ffb21SWarner Losh *
719592ffb21SWarner Losh * LOCKING:
720592ffb21SWarner Losh * None.
721592ffb21SWarner Losh *
722592ffb21SWarner Losh * Just allocate a new mode, copy the existing mode into it, and return
723592ffb21SWarner Losh * a pointer to it. Used to create new instances of established modes.
724592ffb21SWarner Losh */
drm_mode_duplicate(struct drm_device * dev,const struct drm_display_mode * mode)725592ffb21SWarner Losh struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
726592ffb21SWarner Losh const struct drm_display_mode *mode)
727592ffb21SWarner Losh {
728592ffb21SWarner Losh struct drm_display_mode *nmode;
729592ffb21SWarner Losh
730592ffb21SWarner Losh nmode = drm_mode_create(dev);
731592ffb21SWarner Losh if (!nmode)
732592ffb21SWarner Losh return NULL;
733592ffb21SWarner Losh
734592ffb21SWarner Losh drm_mode_copy(nmode, mode);
735592ffb21SWarner Losh
736592ffb21SWarner Losh return nmode;
737592ffb21SWarner Losh }
738592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_duplicate);
739592ffb21SWarner Losh
740592ffb21SWarner Losh /**
741592ffb21SWarner Losh * drm_mode_equal - test modes for equality
742592ffb21SWarner Losh * @mode1: first mode
743592ffb21SWarner Losh * @mode2: second mode
744592ffb21SWarner Losh *
745592ffb21SWarner Losh * LOCKING:
746592ffb21SWarner Losh * None.
747592ffb21SWarner Losh *
748592ffb21SWarner Losh * Check to see if @mode1 and @mode2 are equivalent.
749592ffb21SWarner Losh *
750592ffb21SWarner Losh * RETURNS:
751592ffb21SWarner Losh * True if the modes are equal, false otherwise.
752592ffb21SWarner Losh */
drm_mode_equal(const struct drm_display_mode * mode1,const struct drm_display_mode * mode2)753592ffb21SWarner Losh bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
754592ffb21SWarner Losh {
755592ffb21SWarner Losh /* do clock check convert to PICOS so fb modes get matched
756592ffb21SWarner Losh * the same */
757592ffb21SWarner Losh if (mode1->clock && mode2->clock) {
758592ffb21SWarner Losh if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
759592ffb21SWarner Losh return false;
760592ffb21SWarner Losh } else if (mode1->clock != mode2->clock)
761592ffb21SWarner Losh return false;
762592ffb21SWarner Losh
763592ffb21SWarner Losh if (mode1->hdisplay == mode2->hdisplay &&
764592ffb21SWarner Losh mode1->hsync_start == mode2->hsync_start &&
765592ffb21SWarner Losh mode1->hsync_end == mode2->hsync_end &&
766592ffb21SWarner Losh mode1->htotal == mode2->htotal &&
767592ffb21SWarner Losh mode1->hskew == mode2->hskew &&
768592ffb21SWarner Losh mode1->vdisplay == mode2->vdisplay &&
769592ffb21SWarner Losh mode1->vsync_start == mode2->vsync_start &&
770592ffb21SWarner Losh mode1->vsync_end == mode2->vsync_end &&
771592ffb21SWarner Losh mode1->vtotal == mode2->vtotal &&
772592ffb21SWarner Losh mode1->vscan == mode2->vscan &&
773592ffb21SWarner Losh mode1->flags == mode2->flags)
774592ffb21SWarner Losh return true;
775592ffb21SWarner Losh
776592ffb21SWarner Losh return false;
777592ffb21SWarner Losh }
778592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_equal);
779592ffb21SWarner Losh
780592ffb21SWarner Losh /**
781592ffb21SWarner Losh * drm_mode_validate_size - make sure modes adhere to size constraints
782592ffb21SWarner Losh * @dev: DRM device
783592ffb21SWarner Losh * @mode_list: list of modes to check
784592ffb21SWarner Losh * @maxX: maximum width
785592ffb21SWarner Losh * @maxY: maximum height
786592ffb21SWarner Losh * @maxPitch: max pitch
787592ffb21SWarner Losh *
788592ffb21SWarner Losh * LOCKING:
789592ffb21SWarner Losh * Caller must hold a lock protecting @mode_list.
790592ffb21SWarner Losh *
791592ffb21SWarner Losh * The DRM device (@dev) has size and pitch limits. Here we validate the
792592ffb21SWarner Losh * modes we probed for @dev against those limits and set their status as
793592ffb21SWarner Losh * necessary.
794592ffb21SWarner Losh */
drm_mode_validate_size(struct drm_device * dev,struct list_head * mode_list,int maxX,int maxY,int maxPitch)795592ffb21SWarner Losh void drm_mode_validate_size(struct drm_device *dev,
796592ffb21SWarner Losh struct list_head *mode_list,
797592ffb21SWarner Losh int maxX, int maxY, int maxPitch)
798592ffb21SWarner Losh {
799592ffb21SWarner Losh struct drm_display_mode *mode;
800592ffb21SWarner Losh
801592ffb21SWarner Losh list_for_each_entry(mode, mode_list, head) {
802592ffb21SWarner Losh if (maxPitch > 0 && mode->hdisplay > maxPitch)
803592ffb21SWarner Losh mode->status = MODE_BAD_WIDTH;
804592ffb21SWarner Losh
805592ffb21SWarner Losh if (maxX > 0 && mode->hdisplay > maxX)
806592ffb21SWarner Losh mode->status = MODE_VIRTUAL_X;
807592ffb21SWarner Losh
808592ffb21SWarner Losh if (maxY > 0 && mode->vdisplay > maxY)
809592ffb21SWarner Losh mode->status = MODE_VIRTUAL_Y;
810592ffb21SWarner Losh }
811592ffb21SWarner Losh }
812592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_validate_size);
813592ffb21SWarner Losh
814592ffb21SWarner Losh /**
815592ffb21SWarner Losh * drm_mode_validate_clocks - validate modes against clock limits
816592ffb21SWarner Losh * @dev: DRM device
817592ffb21SWarner Losh * @mode_list: list of modes to check
818592ffb21SWarner Losh * @min: minimum clock rate array
819592ffb21SWarner Losh * @max: maximum clock rate array
820592ffb21SWarner Losh * @n_ranges: number of clock ranges (size of arrays)
821592ffb21SWarner Losh *
822592ffb21SWarner Losh * LOCKING:
823592ffb21SWarner Losh * Caller must hold a lock protecting @mode_list.
824592ffb21SWarner Losh *
825592ffb21SWarner Losh * Some code may need to check a mode list against the clock limits of the
826592ffb21SWarner Losh * device in question. This function walks the mode list, testing to make
827592ffb21SWarner Losh * sure each mode falls within a given range (defined by @min and @max
828592ffb21SWarner Losh * arrays) and sets @mode->status as needed.
829592ffb21SWarner Losh */
drm_mode_validate_clocks(struct drm_device * dev,struct list_head * mode_list,int * min,int * max,int n_ranges)830592ffb21SWarner Losh void drm_mode_validate_clocks(struct drm_device *dev,
831592ffb21SWarner Losh struct list_head *mode_list,
832592ffb21SWarner Losh int *min, int *max, int n_ranges)
833592ffb21SWarner Losh {
834592ffb21SWarner Losh struct drm_display_mode *mode;
835592ffb21SWarner Losh int i;
836592ffb21SWarner Losh
837592ffb21SWarner Losh list_for_each_entry(mode, mode_list, head) {
838592ffb21SWarner Losh bool good = false;
839592ffb21SWarner Losh for (i = 0; i < n_ranges; i++) {
840592ffb21SWarner Losh if (mode->clock >= min[i] && mode->clock <= max[i]) {
841592ffb21SWarner Losh good = true;
842592ffb21SWarner Losh break;
843592ffb21SWarner Losh }
844592ffb21SWarner Losh }
845592ffb21SWarner Losh if (!good)
846592ffb21SWarner Losh mode->status = MODE_CLOCK_RANGE;
847592ffb21SWarner Losh }
848592ffb21SWarner Losh }
849592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_validate_clocks);
850592ffb21SWarner Losh
851592ffb21SWarner Losh /**
852592ffb21SWarner Losh * drm_mode_prune_invalid - remove invalid modes from mode list
853592ffb21SWarner Losh * @dev: DRM device
854592ffb21SWarner Losh * @mode_list: list of modes to check
855592ffb21SWarner Losh * @verbose: be verbose about it
856592ffb21SWarner Losh *
857592ffb21SWarner Losh * LOCKING:
858592ffb21SWarner Losh * Caller must hold a lock protecting @mode_list.
859592ffb21SWarner Losh *
860592ffb21SWarner Losh * Once mode list generation is complete, a caller can use this routine to
861592ffb21SWarner Losh * remove invalid modes from a mode list. If any of the modes have a
862592ffb21SWarner Losh * status other than %MODE_OK, they are removed from @mode_list and freed.
863592ffb21SWarner Losh */
drm_mode_prune_invalid(struct drm_device * dev,struct list_head * mode_list,bool verbose)864592ffb21SWarner Losh void drm_mode_prune_invalid(struct drm_device *dev,
865592ffb21SWarner Losh struct list_head *mode_list, bool verbose)
866592ffb21SWarner Losh {
867592ffb21SWarner Losh struct drm_display_mode *mode, *t;
868592ffb21SWarner Losh
869592ffb21SWarner Losh list_for_each_entry_safe(mode, t, mode_list, head) {
870592ffb21SWarner Losh if (mode->status != MODE_OK) {
871592ffb21SWarner Losh list_del(&mode->head);
872592ffb21SWarner Losh if (verbose) {
873592ffb21SWarner Losh drm_mode_debug_printmodeline(mode);
874592ffb21SWarner Losh DRM_DEBUG_KMS("Not using %s mode %d\n",
875592ffb21SWarner Losh mode->name, mode->status);
876592ffb21SWarner Losh }
877592ffb21SWarner Losh drm_mode_destroy(dev, mode);
878592ffb21SWarner Losh }
879592ffb21SWarner Losh }
880592ffb21SWarner Losh }
881592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_prune_invalid);
882592ffb21SWarner Losh
883592ffb21SWarner Losh /**
884592ffb21SWarner Losh * drm_mode_compare - compare modes for favorability
885592ffb21SWarner Losh * @priv: unused
886592ffb21SWarner Losh * @lh_a: list_head for first mode
887592ffb21SWarner Losh * @lh_b: list_head for second mode
888592ffb21SWarner Losh *
889592ffb21SWarner Losh * LOCKING:
890592ffb21SWarner Losh * None.
891592ffb21SWarner Losh *
892592ffb21SWarner Losh * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
893592ffb21SWarner Losh * which is better.
894592ffb21SWarner Losh *
895592ffb21SWarner Losh * RETURNS:
896592ffb21SWarner Losh * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
897592ffb21SWarner Losh * positive if @lh_b is better than @lh_a.
898592ffb21SWarner Losh */
drm_mode_compare(void * priv,struct list_head * lh_a,struct list_head * lh_b)899592ffb21SWarner Losh static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
900592ffb21SWarner Losh {
901592ffb21SWarner Losh struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
902592ffb21SWarner Losh struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
903592ffb21SWarner Losh int diff;
904592ffb21SWarner Losh
905592ffb21SWarner Losh diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
906592ffb21SWarner Losh ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
907592ffb21SWarner Losh if (diff)
908592ffb21SWarner Losh return diff;
909592ffb21SWarner Losh diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
910592ffb21SWarner Losh if (diff)
911592ffb21SWarner Losh return diff;
912592ffb21SWarner Losh
913592ffb21SWarner Losh diff = b->vrefresh - a->vrefresh;
914592ffb21SWarner Losh if (diff)
915592ffb21SWarner Losh return diff;
916592ffb21SWarner Losh
917592ffb21SWarner Losh diff = b->clock - a->clock;
918592ffb21SWarner Losh return diff;
919592ffb21SWarner Losh }
920592ffb21SWarner Losh
921592ffb21SWarner Losh /**
922592ffb21SWarner Losh * drm_mode_sort - sort mode list
923592ffb21SWarner Losh * @mode_list: list to sort
924592ffb21SWarner Losh *
925592ffb21SWarner Losh * LOCKING:
926592ffb21SWarner Losh * Caller must hold a lock protecting @mode_list.
927592ffb21SWarner Losh *
928592ffb21SWarner Losh * Sort @mode_list by favorability, putting good modes first.
929592ffb21SWarner Losh */
drm_mode_sort(struct list_head * mode_list)930592ffb21SWarner Losh void drm_mode_sort(struct list_head *mode_list)
931592ffb21SWarner Losh {
932592ffb21SWarner Losh drm_list_sort(NULL, mode_list, drm_mode_compare);
933592ffb21SWarner Losh }
934592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_sort);
935592ffb21SWarner Losh
936592ffb21SWarner Losh /**
937592ffb21SWarner Losh * drm_mode_connector_list_update - update the mode list for the connector
938592ffb21SWarner Losh * @connector: the connector to update
939592ffb21SWarner Losh *
940592ffb21SWarner Losh * LOCKING:
941592ffb21SWarner Losh * Caller must hold a lock protecting @mode_list.
942592ffb21SWarner Losh *
943592ffb21SWarner Losh * This moves the modes from the @connector probed_modes list
944592ffb21SWarner Losh * to the actual mode list. It compares the probed mode against the current
945592ffb21SWarner Losh * list and only adds different modes. All modes unverified after this point
946592ffb21SWarner Losh * will be removed by the prune invalid modes.
947592ffb21SWarner Losh */
drm_mode_connector_list_update(struct drm_connector * connector)948592ffb21SWarner Losh void drm_mode_connector_list_update(struct drm_connector *connector)
949592ffb21SWarner Losh {
950592ffb21SWarner Losh struct drm_display_mode *mode;
951592ffb21SWarner Losh struct drm_display_mode *pmode, *pt;
952592ffb21SWarner Losh int found_it;
953592ffb21SWarner Losh
954592ffb21SWarner Losh list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
955592ffb21SWarner Losh head) {
956592ffb21SWarner Losh found_it = 0;
957592ffb21SWarner Losh /* go through current modes checking for the new probed mode */
958592ffb21SWarner Losh list_for_each_entry(mode, &connector->modes, head) {
959592ffb21SWarner Losh if (drm_mode_equal(pmode, mode)) {
960592ffb21SWarner Losh found_it = 1;
961592ffb21SWarner Losh /* if equal delete the probed mode */
962592ffb21SWarner Losh mode->status = pmode->status;
963592ffb21SWarner Losh /* Merge type bits together */
964592ffb21SWarner Losh mode->type |= pmode->type;
965592ffb21SWarner Losh list_del(&pmode->head);
966592ffb21SWarner Losh drm_mode_destroy(connector->dev, pmode);
967592ffb21SWarner Losh break;
968592ffb21SWarner Losh }
969592ffb21SWarner Losh }
970592ffb21SWarner Losh
971592ffb21SWarner Losh if (!found_it) {
972592ffb21SWarner Losh list_move_tail(&pmode->head, &connector->modes);
973592ffb21SWarner Losh }
974592ffb21SWarner Losh }
975592ffb21SWarner Losh }
976592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_connector_list_update);
977592ffb21SWarner Losh
978592ffb21SWarner Losh /**
979592ffb21SWarner Losh * drm_mode_parse_command_line_for_connector - parse command line for connector
980592ffb21SWarner Losh * @mode_option - per connector mode option
981592ffb21SWarner Losh * @connector - connector to parse line for
982592ffb21SWarner Losh *
983592ffb21SWarner Losh * This parses the connector specific then generic command lines for
984592ffb21SWarner Losh * modes and options to configure the connector.
985592ffb21SWarner Losh *
986592ffb21SWarner Losh * This uses the same parameters as the fb modedb.c, except for extra
987592ffb21SWarner Losh * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
988592ffb21SWarner Losh *
989592ffb21SWarner Losh * enable/enable Digital/disable bit at the end
990592ffb21SWarner Losh */
drm_mode_parse_command_line_for_connector(const char * mode_option,struct drm_connector * connector,struct drm_cmdline_mode * mode)991592ffb21SWarner Losh bool drm_mode_parse_command_line_for_connector(const char *mode_option,
992592ffb21SWarner Losh struct drm_connector *connector,
993592ffb21SWarner Losh struct drm_cmdline_mode *mode)
994592ffb21SWarner Losh {
995592ffb21SWarner Losh const char *name;
996592ffb21SWarner Losh unsigned int namelen;
997592ffb21SWarner Losh bool res_specified = false, bpp_specified = false, refresh_specified = false;
998592ffb21SWarner Losh unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
999592ffb21SWarner Losh bool yres_specified = false, cvt = false, rb = false;
1000592ffb21SWarner Losh bool interlace = false, margins = false, was_digit = false;
1001592ffb21SWarner Losh int i;
1002592ffb21SWarner Losh enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1003592ffb21SWarner Losh
1004592ffb21SWarner Losh #ifdef CONFIG_FB
1005592ffb21SWarner Losh if (!mode_option)
1006592ffb21SWarner Losh mode_option = fb_mode_option;
1007592ffb21SWarner Losh #endif
1008592ffb21SWarner Losh
1009592ffb21SWarner Losh if (!mode_option) {
1010592ffb21SWarner Losh mode->specified = false;
1011592ffb21SWarner Losh return false;
1012592ffb21SWarner Losh }
1013592ffb21SWarner Losh
1014592ffb21SWarner Losh name = mode_option;
1015592ffb21SWarner Losh namelen = strlen(name);
1016592ffb21SWarner Losh for (i = namelen-1; i >= 0; i--) {
1017592ffb21SWarner Losh switch (name[i]) {
1018592ffb21SWarner Losh case '@':
1019592ffb21SWarner Losh if (!refresh_specified && !bpp_specified &&
1020592ffb21SWarner Losh !yres_specified && !cvt && !rb && was_digit) {
1021592ffb21SWarner Losh refresh = simple_strtol(&name[i+1], NULL, 10);
1022592ffb21SWarner Losh refresh_specified = true;
1023592ffb21SWarner Losh was_digit = false;
1024592ffb21SWarner Losh } else
1025592ffb21SWarner Losh goto done;
1026592ffb21SWarner Losh break;
1027592ffb21SWarner Losh case '-':
1028592ffb21SWarner Losh if (!bpp_specified && !yres_specified && !cvt &&
1029592ffb21SWarner Losh !rb && was_digit) {
1030592ffb21SWarner Losh bpp = simple_strtol(&name[i+1], NULL, 10);
1031592ffb21SWarner Losh bpp_specified = true;
1032592ffb21SWarner Losh was_digit = false;
1033592ffb21SWarner Losh } else
1034592ffb21SWarner Losh goto done;
1035592ffb21SWarner Losh break;
1036592ffb21SWarner Losh case 'x':
1037592ffb21SWarner Losh if (!yres_specified && was_digit) {
1038592ffb21SWarner Losh yres = simple_strtol(&name[i+1], NULL, 10);
1039592ffb21SWarner Losh yres_specified = true;
1040592ffb21SWarner Losh was_digit = false;
1041592ffb21SWarner Losh } else
1042592ffb21SWarner Losh goto done;
1043592ffb21SWarner Losh case '0' ... '9':
1044592ffb21SWarner Losh was_digit = true;
1045592ffb21SWarner Losh break;
1046592ffb21SWarner Losh case 'M':
1047592ffb21SWarner Losh if (yres_specified || cvt || was_digit)
1048592ffb21SWarner Losh goto done;
1049592ffb21SWarner Losh cvt = true;
1050592ffb21SWarner Losh break;
1051592ffb21SWarner Losh case 'R':
1052592ffb21SWarner Losh if (yres_specified || cvt || rb || was_digit)
1053592ffb21SWarner Losh goto done;
1054592ffb21SWarner Losh rb = true;
1055592ffb21SWarner Losh break;
1056592ffb21SWarner Losh case 'm':
1057592ffb21SWarner Losh if (cvt || yres_specified || was_digit)
1058592ffb21SWarner Losh goto done;
1059592ffb21SWarner Losh margins = true;
1060592ffb21SWarner Losh break;
1061592ffb21SWarner Losh case 'i':
1062592ffb21SWarner Losh if (cvt || yres_specified || was_digit)
1063592ffb21SWarner Losh goto done;
1064592ffb21SWarner Losh interlace = true;
1065592ffb21SWarner Losh break;
1066592ffb21SWarner Losh case 'e':
1067592ffb21SWarner Losh if (yres_specified || bpp_specified || refresh_specified ||
1068592ffb21SWarner Losh was_digit || (force != DRM_FORCE_UNSPECIFIED))
1069592ffb21SWarner Losh goto done;
1070592ffb21SWarner Losh
1071592ffb21SWarner Losh force = DRM_FORCE_ON;
1072592ffb21SWarner Losh break;
1073592ffb21SWarner Losh case 'D':
1074592ffb21SWarner Losh if (yres_specified || bpp_specified || refresh_specified ||
1075592ffb21SWarner Losh was_digit || (force != DRM_FORCE_UNSPECIFIED))
1076592ffb21SWarner Losh goto done;
1077592ffb21SWarner Losh
1078592ffb21SWarner Losh if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1079592ffb21SWarner Losh (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1080592ffb21SWarner Losh force = DRM_FORCE_ON;
1081592ffb21SWarner Losh else
1082592ffb21SWarner Losh force = DRM_FORCE_ON_DIGITAL;
1083592ffb21SWarner Losh break;
1084592ffb21SWarner Losh case 'd':
1085592ffb21SWarner Losh if (yres_specified || bpp_specified || refresh_specified ||
1086592ffb21SWarner Losh was_digit || (force != DRM_FORCE_UNSPECIFIED))
1087592ffb21SWarner Losh goto done;
1088592ffb21SWarner Losh
1089592ffb21SWarner Losh force = DRM_FORCE_OFF;
1090592ffb21SWarner Losh break;
1091592ffb21SWarner Losh default:
1092592ffb21SWarner Losh goto done;
1093592ffb21SWarner Losh }
1094592ffb21SWarner Losh }
1095592ffb21SWarner Losh
1096592ffb21SWarner Losh if (i < 0 && yres_specified) {
1097592ffb21SWarner Losh char *ch;
1098592ffb21SWarner Losh xres = simple_strtol(name, &ch, 10);
1099592ffb21SWarner Losh if ((ch != NULL) && (*ch == 'x'))
1100592ffb21SWarner Losh res_specified = true;
1101592ffb21SWarner Losh else
1102592ffb21SWarner Losh i = ch - name;
1103592ffb21SWarner Losh } else if (!yres_specified && was_digit) {
1104592ffb21SWarner Losh /* catch mode that begins with digits but has no 'x' */
1105592ffb21SWarner Losh i = 0;
1106592ffb21SWarner Losh }
1107592ffb21SWarner Losh done:
1108592ffb21SWarner Losh if (i >= 0) {
1109592ffb21SWarner Losh DRM_WARNING(
1110592ffb21SWarner Losh "parse error at position %i in video mode '%s'\n",
1111592ffb21SWarner Losh i, name);
1112592ffb21SWarner Losh mode->specified = false;
1113592ffb21SWarner Losh return false;
1114592ffb21SWarner Losh }
1115592ffb21SWarner Losh
1116592ffb21SWarner Losh if (res_specified) {
1117592ffb21SWarner Losh mode->specified = true;
1118592ffb21SWarner Losh mode->xres = xres;
1119592ffb21SWarner Losh mode->yres = yres;
1120592ffb21SWarner Losh }
1121592ffb21SWarner Losh
1122592ffb21SWarner Losh if (refresh_specified) {
1123592ffb21SWarner Losh mode->refresh_specified = true;
1124592ffb21SWarner Losh mode->refresh = refresh;
1125592ffb21SWarner Losh }
1126592ffb21SWarner Losh
1127592ffb21SWarner Losh if (bpp_specified) {
1128592ffb21SWarner Losh mode->bpp_specified = true;
1129592ffb21SWarner Losh mode->bpp = bpp;
1130592ffb21SWarner Losh }
1131592ffb21SWarner Losh mode->rb = rb;
1132592ffb21SWarner Losh mode->cvt = cvt;
1133592ffb21SWarner Losh mode->interlace = interlace;
1134592ffb21SWarner Losh mode->margins = margins;
1135592ffb21SWarner Losh mode->force = force;
1136592ffb21SWarner Losh
1137592ffb21SWarner Losh return true;
1138592ffb21SWarner Losh }
1139592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1140592ffb21SWarner Losh
1141592ffb21SWarner Losh struct drm_display_mode *
drm_mode_create_from_cmdline_mode(struct drm_device * dev,struct drm_cmdline_mode * cmd)1142592ffb21SWarner Losh drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1143592ffb21SWarner Losh struct drm_cmdline_mode *cmd)
1144592ffb21SWarner Losh {
1145592ffb21SWarner Losh struct drm_display_mode *mode;
1146592ffb21SWarner Losh
1147592ffb21SWarner Losh if (cmd->cvt)
1148592ffb21SWarner Losh mode = drm_cvt_mode(dev,
1149592ffb21SWarner Losh cmd->xres, cmd->yres,
1150592ffb21SWarner Losh cmd->refresh_specified ? cmd->refresh : 60,
1151592ffb21SWarner Losh cmd->rb, cmd->interlace,
1152592ffb21SWarner Losh cmd->margins);
1153592ffb21SWarner Losh else
1154592ffb21SWarner Losh mode = drm_gtf_mode(dev,
1155592ffb21SWarner Losh cmd->xres, cmd->yres,
1156592ffb21SWarner Losh cmd->refresh_specified ? cmd->refresh : 60,
1157592ffb21SWarner Losh cmd->interlace,
1158592ffb21SWarner Losh cmd->margins);
1159592ffb21SWarner Losh if (!mode)
1160592ffb21SWarner Losh return NULL;
1161592ffb21SWarner Losh
1162592ffb21SWarner Losh drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1163592ffb21SWarner Losh return mode;
1164592ffb21SWarner Losh }
1165592ffb21SWarner Losh EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);
1166