15bc8125aSAdrian Chadd /*- 2*4d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause 3718cf2ccSPedro F. Giffuni * 45bc8125aSAdrian Chadd * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 55bc8125aSAdrian Chadd * All rights reserved. 65bc8125aSAdrian Chadd * 75bc8125aSAdrian Chadd * Redistribution and use in source and binary forms, with or without 85bc8125aSAdrian Chadd * modification, are permitted provided that the following conditions 95bc8125aSAdrian Chadd * are met: 105bc8125aSAdrian Chadd * 1. Redistributions of source code must retain the above copyright 115bc8125aSAdrian Chadd * notice, this list of conditions and the following disclaimer, 125bc8125aSAdrian Chadd * without modification. 135bc8125aSAdrian Chadd * 2. Redistributions in binary form must reproduce at minimum a disclaimer 145bc8125aSAdrian Chadd * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 155bc8125aSAdrian Chadd * redistribution must be conditioned upon including a substantially 165bc8125aSAdrian Chadd * similar Disclaimer requirement for further binary redistribution. 175bc8125aSAdrian Chadd * 185bc8125aSAdrian Chadd * NO WARRANTY 195bc8125aSAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 205bc8125aSAdrian Chadd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 215bc8125aSAdrian Chadd * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 225bc8125aSAdrian Chadd * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 235bc8125aSAdrian Chadd * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 245bc8125aSAdrian Chadd * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 255bc8125aSAdrian Chadd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 265bc8125aSAdrian Chadd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 275bc8125aSAdrian Chadd * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 285bc8125aSAdrian Chadd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 295bc8125aSAdrian Chadd * THE POSSIBILITY OF SUCH DAMAGES. 305bc8125aSAdrian Chadd */ 315bc8125aSAdrian Chadd #ifndef __IF_ATH_DEBUG_H__ 325bc8125aSAdrian Chadd #define __IF_ATH_DEBUG_H__ 335bc8125aSAdrian Chadd 345bc8125aSAdrian Chadd #ifdef ATH_DEBUG 355bc8125aSAdrian Chadd 365bc8125aSAdrian Chadd enum { 370e22ed0eSAdrian Chadd ATH_DEBUG_XMIT = 0x000000001ULL, /* basic xmit operation */ 380e22ed0eSAdrian Chadd ATH_DEBUG_XMIT_DESC = 0x000000002ULL, /* xmit descriptors */ 390e22ed0eSAdrian Chadd ATH_DEBUG_RECV = 0x000000004ULL, /* basic recv operation */ 400e22ed0eSAdrian Chadd ATH_DEBUG_RECV_DESC = 0x000000008ULL, /* recv descriptors */ 410e22ed0eSAdrian Chadd ATH_DEBUG_RATE = 0x000000010ULL, /* rate control */ 420e22ed0eSAdrian Chadd ATH_DEBUG_RESET = 0x000000020ULL, /* reset processing */ 430e22ed0eSAdrian Chadd ATH_DEBUG_MODE = 0x000000040ULL, /* mode init/setup */ 440e22ed0eSAdrian Chadd ATH_DEBUG_BEACON = 0x000000080ULL, /* beacon handling */ 450e22ed0eSAdrian Chadd ATH_DEBUG_WATCHDOG = 0x000000100ULL, /* watchdog timeout */ 460e22ed0eSAdrian Chadd ATH_DEBUG_INTR = 0x000001000ULL, /* ISR */ 470e22ed0eSAdrian Chadd ATH_DEBUG_TX_PROC = 0x000002000ULL, /* tx ISR proc */ 480e22ed0eSAdrian Chadd ATH_DEBUG_RX_PROC = 0x000004000ULL, /* rx ISR proc */ 490e22ed0eSAdrian Chadd ATH_DEBUG_BEACON_PROC = 0x000008000ULL, /* beacon ISR proc */ 500e22ed0eSAdrian Chadd ATH_DEBUG_CALIBRATE = 0x000010000ULL, /* periodic calibration */ 510e22ed0eSAdrian Chadd ATH_DEBUG_KEYCACHE = 0x000020000ULL, /* key cache management */ 520e22ed0eSAdrian Chadd ATH_DEBUG_STATE = 0x000040000ULL, /* 802.11 state transitions */ 530e22ed0eSAdrian Chadd ATH_DEBUG_NODE = 0x000080000ULL, /* node management */ 540e22ed0eSAdrian Chadd ATH_DEBUG_LED = 0x000100000ULL, /* led management */ 550e22ed0eSAdrian Chadd ATH_DEBUG_FF = 0x000200000ULL, /* fast frames */ 560e22ed0eSAdrian Chadd ATH_DEBUG_DFS = 0x000400000ULL, /* DFS processing */ 570e22ed0eSAdrian Chadd ATH_DEBUG_TDMA = 0x000800000ULL, /* TDMA processing */ 580e22ed0eSAdrian Chadd ATH_DEBUG_TDMA_TIMER = 0x001000000ULL, /* TDMA timer processing */ 590e22ed0eSAdrian Chadd ATH_DEBUG_REGDOMAIN = 0x002000000ULL, /* regulatory processing */ 600e22ed0eSAdrian Chadd ATH_DEBUG_SW_TX = 0x004000000ULL, /* per-packet software TX */ 610e22ed0eSAdrian Chadd ATH_DEBUG_SW_TX_BAW = 0x008000000ULL, /* BAW handling */ 620e22ed0eSAdrian Chadd ATH_DEBUG_SW_TX_CTRL = 0x010000000ULL, /* queue control */ 630e22ed0eSAdrian Chadd ATH_DEBUG_SW_TX_AGGR = 0x020000000ULL, /* aggregate TX */ 640e22ed0eSAdrian Chadd ATH_DEBUG_SW_TX_RETRIES = 0x040000000ULL, /* software TX retries */ 650e22ed0eSAdrian Chadd ATH_DEBUG_FATAL = 0x080000000ULL, /* fatal errors */ 660e22ed0eSAdrian Chadd ATH_DEBUG_SW_TX_BAR = 0x100000000ULL, /* BAR TX */ 676a9f8e0aSAdrian Chadd ATH_DEBUG_EDMA_RX = 0x200000000ULL, /* RX EDMA state */ 68355cae39SAdrian Chadd ATH_DEBUG_SW_TX_FILT = 0x400000000ULL, /* SW TX FF */ 690eb81626SAdrian Chadd ATH_DEBUG_NODE_PWRSAVE = 0x800000000ULL, /* node powersave */ 70216ca234SAdrian Chadd ATH_DEBUG_DIVERSITY = 0x1000000000ULL, /* Diversity logic */ 71f5c30c4eSAdrian Chadd ATH_DEBUG_PWRSAVE = 0x2000000000ULL, 72ee162382SAdrian Chadd ATH_DEBUG_BTCOEX = 0x4000000000ULL, /* BT Coex */ 73e2cf2aa5SAdrian Chadd ATH_DEBUG_QUIETIE = 0x8000000000ULL, /* Quiet time handling */ 746a9f8e0aSAdrian Chadd 750e22ed0eSAdrian Chadd ATH_DEBUG_ANY = 0xffffffffffffffffULL 765bc8125aSAdrian Chadd }; 775bc8125aSAdrian Chadd 7803682514SAdrian Chadd enum { 7903682514SAdrian Chadd ATH_KTR_RXPROC = 0x00000001, 8003682514SAdrian Chadd ATH_KTR_TXPROC = 0x00000002, 8103682514SAdrian Chadd ATH_KTR_TXCOMP = 0x00000004, 8203682514SAdrian Chadd ATH_KTR_SWQ = 0x00000008, 8303682514SAdrian Chadd ATH_KTR_INTERRUPTS = 0x00000010, 8403682514SAdrian Chadd ATH_KTR_ERROR = 0x00000020, 8503682514SAdrian Chadd ATH_KTR_NODE = 0x00000040, 8603682514SAdrian Chadd ATH_KTR_TX = 0x00000080, 8703682514SAdrian Chadd }; 8803682514SAdrian Chadd 8903682514SAdrian Chadd #define ATH_KTR(_sc, _km, _kf, ...) do { \ 9003682514SAdrian Chadd if (sc->sc_ktrdebug & (_km)) \ 9103682514SAdrian Chadd CTR##_kf(KTR_DEV, __VA_ARGS__); \ 9203682514SAdrian Chadd } while (0) 932633dc93SAdrian Chadd 940e22ed0eSAdrian Chadd extern uint64_t ath_debug; 955bc8125aSAdrian Chadd 967a79cebfSGleb Smirnoff #define IFF_DUMPPKTS(sc, m) (sc->sc_debug & (m)) 97ee162382SAdrian Chadd #define DPRINTF(sc, m, ...) do { \ 985bc8125aSAdrian Chadd if (sc->sc_debug & (m)) \ 99ee162382SAdrian Chadd device_printf(sc->sc_dev, __VA_ARGS__); \ 1005bc8125aSAdrian Chadd } while (0) 1015bc8125aSAdrian Chadd #define KEYPRINTF(sc, ix, hk, mac) do { \ 1025bc8125aSAdrian Chadd if (sc->sc_debug & ATH_DEBUG_KEYCACHE) \ 1035bc8125aSAdrian Chadd ath_keyprint(sc, __func__, ix, hk, mac); \ 1045bc8125aSAdrian Chadd } while (0) 1055bc8125aSAdrian Chadd 1065bc8125aSAdrian Chadd extern void ath_printrxbuf(struct ath_softc *, const struct ath_buf *bf, 1075bc8125aSAdrian Chadd u_int ix, int); 1085bc8125aSAdrian Chadd extern void ath_printtxbuf(struct ath_softc *, const struct ath_buf *bf, 1095bc8125aSAdrian Chadd u_int qnum, u_int ix, int done); 11070ee9029SAdrian Chadd extern void ath_printtxstatbuf(struct ath_softc *sc, const struct ath_buf *bf, 11170ee9029SAdrian Chadd const uint32_t *ds, u_int qnum, u_int ix, int done); 1125bc8125aSAdrian Chadd #else /* ATH_DEBUG */ 11303682514SAdrian Chadd #define ATH_KTR(_sc, _km, _kf, ...) do { } while (0) 114ba59181dSJohn Baldwin 1157a79cebfSGleb Smirnoff #define IFF_DUMPPKTS(sc, m) (0) 1165bc8125aSAdrian Chadd #define DPRINTF(sc, m, fmt, ...) do { \ 1175bc8125aSAdrian Chadd (void) sc; \ 1185bc8125aSAdrian Chadd } while (0) 1195bc8125aSAdrian Chadd #define KEYPRINTF(sc, k, ix, mac) do { \ 1205bc8125aSAdrian Chadd (void) sc; \ 1215bc8125aSAdrian Chadd } while (0) 1225bc8125aSAdrian Chadd #endif /* ATH_DEBUG */ 1235bc8125aSAdrian Chadd 1245bc8125aSAdrian Chadd #endif 125