1*c66ec88fSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-only 2*c66ec88fSEmmanuel Vadot/* 3*c66ec88fSEmmanuel Vadot * PS3 Game Console device tree. 4*c66ec88fSEmmanuel Vadot * 5*c66ec88fSEmmanuel Vadot * Copyright (C) 2007 Sony Computer Entertainment Inc. 6*c66ec88fSEmmanuel Vadot * Copyright 2007 Sony Corp. 7*c66ec88fSEmmanuel Vadot */ 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadot/dts-v1/; 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot/ { 12*c66ec88fSEmmanuel Vadot model = "SonyPS3"; 13*c66ec88fSEmmanuel Vadot compatible = "sony,ps3"; 14*c66ec88fSEmmanuel Vadot #size-cells = <2>; 15*c66ec88fSEmmanuel Vadot #address-cells = <2>; 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel Vadot chosen { 18*c66ec88fSEmmanuel Vadot }; 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel Vadot /* 21*c66ec88fSEmmanuel Vadot * We'll get the size of the bootmem block from lv1 after startup, 22*c66ec88fSEmmanuel Vadot * so we'll put a null entry here. 23*c66ec88fSEmmanuel Vadot */ 24*c66ec88fSEmmanuel Vadot 25*c66ec88fSEmmanuel Vadot memory { 26*c66ec88fSEmmanuel Vadot device_type = "memory"; 27*c66ec88fSEmmanuel Vadot reg = <0x00000000 0x00000000 0x00000000 0x00000000>; 28*c66ec88fSEmmanuel Vadot }; 29*c66ec88fSEmmanuel Vadot 30*c66ec88fSEmmanuel Vadot /* 31*c66ec88fSEmmanuel Vadot * The boot cpu is always zero for PS3. 32*c66ec88fSEmmanuel Vadot * 33*c66ec88fSEmmanuel Vadot * dtc expects a clock-frequency and timebase-frequency entries, so 34*c66ec88fSEmmanuel Vadot * we'll put a null entries here. These will be initialized after 35*c66ec88fSEmmanuel Vadot * startup with data from lv1. 36*c66ec88fSEmmanuel Vadot * 37*c66ec88fSEmmanuel Vadot * Seems the only way currently to indicate a processor has multiple 38*c66ec88fSEmmanuel Vadot * threads is with an ibm,ppc-interrupt-server#s entry. We'll put one 39*c66ec88fSEmmanuel Vadot * here so we can bring up both of ours. See smp_setup_cpu_maps(). 40*c66ec88fSEmmanuel Vadot */ 41*c66ec88fSEmmanuel Vadot 42*c66ec88fSEmmanuel Vadot cpus { 43*c66ec88fSEmmanuel Vadot #size-cells = <0>; 44*c66ec88fSEmmanuel Vadot #address-cells = <1>; 45*c66ec88fSEmmanuel Vadot 46*c66ec88fSEmmanuel Vadot cpu@0 { 47*c66ec88fSEmmanuel Vadot device_type = "cpu"; 48*c66ec88fSEmmanuel Vadot reg = <0x00000000>; 49*c66ec88fSEmmanuel Vadot ibm,ppc-interrupt-server#s = <0x0 0x1>; 50*c66ec88fSEmmanuel Vadot clock-frequency = <0>; 51*c66ec88fSEmmanuel Vadot timebase-frequency = <0>; 52*c66ec88fSEmmanuel Vadot i-cache-size = <32768>; 53*c66ec88fSEmmanuel Vadot d-cache-size = <32768>; 54*c66ec88fSEmmanuel Vadot i-cache-line-size = <128>; 55*c66ec88fSEmmanuel Vadot d-cache-line-size = <128>; 56*c66ec88fSEmmanuel Vadot }; 57*c66ec88fSEmmanuel Vadot }; 58*c66ec88fSEmmanuel Vadot}; 59