1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Device tree file for ZII's RPU2 board 4*f126890aSEmmanuel Vadot * 5*f126890aSEmmanuel Vadot * RPU - Remote Peripheral Unit 6*f126890aSEmmanuel Vadot * 7*f126890aSEmmanuel Vadot * Copyright (C) 2019 Zodiac Inflight Innovations 8*f126890aSEmmanuel Vadot */ 9*f126890aSEmmanuel Vadot 10*f126890aSEmmanuel Vadot/dts-v1/; 11*f126890aSEmmanuel Vadot#include <dt-bindings/thermal/thermal.h> 12*f126890aSEmmanuel Vadot#include "imx7d.dtsi" 13*f126890aSEmmanuel Vadot 14*f126890aSEmmanuel Vadot/ { 15*f126890aSEmmanuel Vadot model = "ZII RPU2 Board"; 16*f126890aSEmmanuel Vadot compatible = "zii,imx7d-rpu2", "fsl,imx7d"; 17*f126890aSEmmanuel Vadot 18*f126890aSEmmanuel Vadot chosen { 19*f126890aSEmmanuel Vadot stdout-path = &uart2; 20*f126890aSEmmanuel Vadot }; 21*f126890aSEmmanuel Vadot 22*f126890aSEmmanuel Vadot cs2000_ref: oscillator { 23*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 24*f126890aSEmmanuel Vadot #clock-cells = <0>; 25*f126890aSEmmanuel Vadot clock-frequency = <24576000>; 26*f126890aSEmmanuel Vadot }; 27*f126890aSEmmanuel Vadot 28*f126890aSEmmanuel Vadot cs2000_in_dummy: dummy-oscillator { 29*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 30*f126890aSEmmanuel Vadot #clock-cells = <0>; 31*f126890aSEmmanuel Vadot clock-frequency = <0>; 32*f126890aSEmmanuel Vadot }; 33*f126890aSEmmanuel Vadot 34*f126890aSEmmanuel Vadot gpio-leds { 35*f126890aSEmmanuel Vadot compatible = "gpio-leds"; 36*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_leds_debug>; 37*f126890aSEmmanuel Vadot pinctrl-names = "default"; 38*f126890aSEmmanuel Vadot 39*f126890aSEmmanuel Vadot led-debug { 40*f126890aSEmmanuel Vadot label = "zii:green:debug1"; 41*f126890aSEmmanuel Vadot gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; 42*f126890aSEmmanuel Vadot linux,default-trigger = "heartbeat"; 43*f126890aSEmmanuel Vadot }; 44*f126890aSEmmanuel Vadot }; 45*f126890aSEmmanuel Vadot 46*f126890aSEmmanuel Vadot iio-hwmon { 47*f126890aSEmmanuel Vadot compatible = "iio-hwmon"; 48*f126890aSEmmanuel Vadot io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>, 49*f126890aSEmmanuel Vadot <&adc2 1>; 50*f126890aSEmmanuel Vadot }; 51*f126890aSEmmanuel Vadot 52*f126890aSEmmanuel Vadot reg_can1_stby: regulator-can1-stby { 53*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 54*f126890aSEmmanuel Vadot pinctrl-names = "default"; 55*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_flexcan1_stby>; 56*f126890aSEmmanuel Vadot regulator-name = "can1-3v3"; 57*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 58*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 59*f126890aSEmmanuel Vadot gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; 60*f126890aSEmmanuel Vadot enable-active-high; 61*f126890aSEmmanuel Vadot }; 62*f126890aSEmmanuel Vadot 63*f126890aSEmmanuel Vadot reg_can2_stby: regulator-can2-stby { 64*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 65*f126890aSEmmanuel Vadot pinctrl-names = "default"; 66*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_flexcan2_stby>; 67*f126890aSEmmanuel Vadot regulator-name = "can2-3v3"; 68*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 69*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 70*f126890aSEmmanuel Vadot gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>; 71*f126890aSEmmanuel Vadot enable-active-high; 72*f126890aSEmmanuel Vadot }; 73*f126890aSEmmanuel Vadot 74*f126890aSEmmanuel Vadot reg_vref_1v8: regulator-vref-1v8 { 75*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 76*f126890aSEmmanuel Vadot regulator-name = "vref-1v8"; 77*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 78*f126890aSEmmanuel Vadot regulator-max-microvolt = <1800000>; 79*f126890aSEmmanuel Vadot regulator-always-on; 80*f126890aSEmmanuel Vadot }; 81*f126890aSEmmanuel Vadot 82*f126890aSEmmanuel Vadot reg_3p3v: regulator-3p3v { 83*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 84*f126890aSEmmanuel Vadot regulator-name = "GEN_3V3"; 85*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 86*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 87*f126890aSEmmanuel Vadot regulator-always-on; 88*f126890aSEmmanuel Vadot }; 89*f126890aSEmmanuel Vadot 90*f126890aSEmmanuel Vadot reg_5p0v_main: regulator-5p0v-main { 91*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 92*f126890aSEmmanuel Vadot regulator-name = "5V_MAIN"; 93*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 94*f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 95*f126890aSEmmanuel Vadot regulator-always-on; 96*f126890aSEmmanuel Vadot }; 97*f126890aSEmmanuel Vadot 98*f126890aSEmmanuel Vadot sound1 { 99*f126890aSEmmanuel Vadot compatible = "simple-audio-card"; 100*f126890aSEmmanuel Vadot simple-audio-card,name = "Audio Output 1"; 101*f126890aSEmmanuel Vadot simple-audio-card,format = "i2s"; 102*f126890aSEmmanuel Vadot simple-audio-card,bitclock-master = <&sound1_codec>; 103*f126890aSEmmanuel Vadot simple-audio-card,frame-master = <&sound1_codec>; 104*f126890aSEmmanuel Vadot simple-audio-card,widgets = 105*f126890aSEmmanuel Vadot "Headphone", "Headphone Jack"; 106*f126890aSEmmanuel Vadot simple-audio-card,routing = 107*f126890aSEmmanuel Vadot "Headphone Jack", "HPLEFT", 108*f126890aSEmmanuel Vadot "Headphone Jack", "HPRIGHT", 109*f126890aSEmmanuel Vadot "LEFTIN", "HPL", 110*f126890aSEmmanuel Vadot "RIGHTIN", "HPR"; 111*f126890aSEmmanuel Vadot simple-audio-card,aux-devs = <&hpa1>; 112*f126890aSEmmanuel Vadot 113*f126890aSEmmanuel Vadot simple-audio-card,cpu { 114*f126890aSEmmanuel Vadot sound-dai = <&sai1>; 115*f126890aSEmmanuel Vadot }; 116*f126890aSEmmanuel Vadot 117*f126890aSEmmanuel Vadot sound1_codec: simple-audio-card,codec { 118*f126890aSEmmanuel Vadot sound-dai = <&codec1>; 119*f126890aSEmmanuel Vadot clocks = <&cs2000>; 120*f126890aSEmmanuel Vadot }; 121*f126890aSEmmanuel Vadot }; 122*f126890aSEmmanuel Vadot 123*f126890aSEmmanuel Vadot sound2 { 124*f126890aSEmmanuel Vadot compatible = "simple-audio-card"; 125*f126890aSEmmanuel Vadot simple-audio-card,name = "Audio Output 2"; 126*f126890aSEmmanuel Vadot simple-audio-card,format = "i2s"; 127*f126890aSEmmanuel Vadot simple-audio-card,bitclock-master = <&sound2_codec>; 128*f126890aSEmmanuel Vadot simple-audio-card,frame-master = <&sound2_codec>; 129*f126890aSEmmanuel Vadot simple-audio-card,widgets = 130*f126890aSEmmanuel Vadot "Headphone", "Headphone Jack"; 131*f126890aSEmmanuel Vadot simple-audio-card,routing = 132*f126890aSEmmanuel Vadot "Headphone Jack", "HPLEFT", 133*f126890aSEmmanuel Vadot "Headphone Jack", "HPRIGHT", 134*f126890aSEmmanuel Vadot "LEFTIN", "HPL", 135*f126890aSEmmanuel Vadot "RIGHTIN", "HPR"; 136*f126890aSEmmanuel Vadot simple-audio-card,aux-devs = <&hpa2>; 137*f126890aSEmmanuel Vadot 138*f126890aSEmmanuel Vadot simple-audio-card,cpu { 139*f126890aSEmmanuel Vadot sound-dai = <&sai2>; 140*f126890aSEmmanuel Vadot }; 141*f126890aSEmmanuel Vadot 142*f126890aSEmmanuel Vadot sound2_codec: simple-audio-card,codec { 143*f126890aSEmmanuel Vadot sound-dai = <&codec2>; 144*f126890aSEmmanuel Vadot clocks = <&cs2000>; 145*f126890aSEmmanuel Vadot }; 146*f126890aSEmmanuel Vadot }; 147*f126890aSEmmanuel Vadot 148*f126890aSEmmanuel Vadot sound3 { 149*f126890aSEmmanuel Vadot compatible = "simple-audio-card"; 150*f126890aSEmmanuel Vadot simple-audio-card,name = "Audio Output 3"; 151*f126890aSEmmanuel Vadot simple-audio-card,format = "i2s"; 152*f126890aSEmmanuel Vadot simple-audio-card,bitclock-master = <&sound3_codec>; 153*f126890aSEmmanuel Vadot simple-audio-card,frame-master = <&sound3_codec>; 154*f126890aSEmmanuel Vadot simple-audio-card,widgets = 155*f126890aSEmmanuel Vadot "Headphone", "Headphone Jack"; 156*f126890aSEmmanuel Vadot simple-audio-card,routing = 157*f126890aSEmmanuel Vadot "Headphone Jack", "HPLEFT", 158*f126890aSEmmanuel Vadot "Headphone Jack", "HPRIGHT", 159*f126890aSEmmanuel Vadot "LEFTIN", "HPL", 160*f126890aSEmmanuel Vadot "RIGHTIN", "HPR"; 161*f126890aSEmmanuel Vadot simple-audio-card,aux-devs = <&hpa3>; 162*f126890aSEmmanuel Vadot 163*f126890aSEmmanuel Vadot simple-audio-card,cpu { 164*f126890aSEmmanuel Vadot sound-dai = <&sai3>; 165*f126890aSEmmanuel Vadot }; 166*f126890aSEmmanuel Vadot 167*f126890aSEmmanuel Vadot sound3_codec: simple-audio-card,codec { 168*f126890aSEmmanuel Vadot sound-dai = <&codec3>; 169*f126890aSEmmanuel Vadot clocks = <&cs2000>; 170*f126890aSEmmanuel Vadot }; 171*f126890aSEmmanuel Vadot }; 172*f126890aSEmmanuel Vadot}; 173*f126890aSEmmanuel Vadot 174*f126890aSEmmanuel Vadot&adc1 { 175*f126890aSEmmanuel Vadot vref-supply = <®_vref_1v8>; 176*f126890aSEmmanuel Vadot status = "okay"; 177*f126890aSEmmanuel Vadot}; 178*f126890aSEmmanuel Vadot 179*f126890aSEmmanuel Vadot&adc2 { 180*f126890aSEmmanuel Vadot vref-supply = <®_vref_1v8>; 181*f126890aSEmmanuel Vadot status = "okay"; 182*f126890aSEmmanuel Vadot}; 183*f126890aSEmmanuel Vadot 184*f126890aSEmmanuel Vadot&cpu0 { 185*f126890aSEmmanuel Vadot cpu-supply = <&sw1a_reg>; 186*f126890aSEmmanuel Vadot}; 187*f126890aSEmmanuel Vadot 188*f126890aSEmmanuel Vadot&clks { 189*f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>; 190*f126890aSEmmanuel Vadot assigned-clock-rates = <884736000>; 191*f126890aSEmmanuel Vadot}; 192*f126890aSEmmanuel Vadot 193*f126890aSEmmanuel Vadot&ecspi1 { 194*f126890aSEmmanuel Vadot pinctrl-names = "default"; 195*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ecspi1>; 196*f126890aSEmmanuel Vadot cs-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>; 197*f126890aSEmmanuel Vadot status = "okay"; 198*f126890aSEmmanuel Vadot 199*f126890aSEmmanuel Vadot flash@0 { 200*f126890aSEmmanuel Vadot compatible = "jedec,spi-nor"; 201*f126890aSEmmanuel Vadot spi-max-frequency = <20000000>; 202*f126890aSEmmanuel Vadot reg = <0>; 203*f126890aSEmmanuel Vadot #address-cells = <1>; 204*f126890aSEmmanuel Vadot #size-cells = <1>; 205*f126890aSEmmanuel Vadot }; 206*f126890aSEmmanuel Vadot}; 207*f126890aSEmmanuel Vadot 208*f126890aSEmmanuel Vadot&fec1 { 209*f126890aSEmmanuel Vadot pinctrl-names = "default"; 210*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet1>; 211*f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, 212*f126890aSEmmanuel Vadot <&clks IMX7D_ENET1_TIME_ROOT_CLK>; 213*f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; 214*f126890aSEmmanuel Vadot assigned-clock-rates = <0>, <100000000>; 215*f126890aSEmmanuel Vadot phy-mode = "rgmii"; 216*f126890aSEmmanuel Vadot status = "okay"; 217*f126890aSEmmanuel Vadot 218*f126890aSEmmanuel Vadot fixed-link { 219*f126890aSEmmanuel Vadot speed = <1000>; 220*f126890aSEmmanuel Vadot full-duplex; 221*f126890aSEmmanuel Vadot }; 222*f126890aSEmmanuel Vadot 223*f126890aSEmmanuel Vadot mdio1: mdio { 224*f126890aSEmmanuel Vadot #address-cells = <1>; 225*f126890aSEmmanuel Vadot #size-cells = <0>; 226*f126890aSEmmanuel Vadot status = "okay"; 227*f126890aSEmmanuel Vadot 228*f126890aSEmmanuel Vadot switch: switch@0 { 229*f126890aSEmmanuel Vadot compatible = "marvell,mv88e6085"; 230*f126890aSEmmanuel Vadot pinctrl-names = "default"; 231*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_switch>; 232*f126890aSEmmanuel Vadot reg = <0>; 233*f126890aSEmmanuel Vadot eeprom-length = <512>; 234*f126890aSEmmanuel Vadot interrupt-parent = <&gpio1>; 235*f126890aSEmmanuel Vadot interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 236*f126890aSEmmanuel Vadot interrupt-controller; 237*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 238*f126890aSEmmanuel Vadot 239*f126890aSEmmanuel Vadot ports { 240*f126890aSEmmanuel Vadot #address-cells = <1>; 241*f126890aSEmmanuel Vadot #size-cells = <0>; 242*f126890aSEmmanuel Vadot 243*f126890aSEmmanuel Vadot port@0 { 244*f126890aSEmmanuel Vadot reg = <0>; 245*f126890aSEmmanuel Vadot label = "eth_cu_1000_1"; 246*f126890aSEmmanuel Vadot }; 247*f126890aSEmmanuel Vadot 248*f126890aSEmmanuel Vadot port@1 { 249*f126890aSEmmanuel Vadot reg = <1>; 250*f126890aSEmmanuel Vadot label = "eth_cu_1000_2"; 251*f126890aSEmmanuel Vadot }; 252*f126890aSEmmanuel Vadot 253*f126890aSEmmanuel Vadot port@2 { 254*f126890aSEmmanuel Vadot reg = <2>; 255*f126890aSEmmanuel Vadot label = "pic"; 256*f126890aSEmmanuel Vadot 257*f126890aSEmmanuel Vadot fixed-link { 258*f126890aSEmmanuel Vadot speed = <100>; 259*f126890aSEmmanuel Vadot full-duplex; 260*f126890aSEmmanuel Vadot }; 261*f126890aSEmmanuel Vadot }; 262*f126890aSEmmanuel Vadot 263*f126890aSEmmanuel Vadot port@5 { 264*f126890aSEmmanuel Vadot reg = <5>; 265*f126890aSEmmanuel Vadot label = "cpu"; 266*f126890aSEmmanuel Vadot ethernet = <&fec1>; 267*f126890aSEmmanuel Vadot phy-mode = "rgmii-id"; 268*f126890aSEmmanuel Vadot 269*f126890aSEmmanuel Vadot fixed-link { 270*f126890aSEmmanuel Vadot speed = <1000>; 271*f126890aSEmmanuel Vadot full-duplex; 272*f126890aSEmmanuel Vadot }; 273*f126890aSEmmanuel Vadot }; 274*f126890aSEmmanuel Vadot 275*f126890aSEmmanuel Vadot port@6 { 276*f126890aSEmmanuel Vadot reg = <6>; 277*f126890aSEmmanuel Vadot label = "gigabit_proc"; 278*f126890aSEmmanuel Vadot ethernet = <&fec2>; 279*f126890aSEmmanuel Vadot phy-mode = "rgmii-id"; 280*f126890aSEmmanuel Vadot 281*f126890aSEmmanuel Vadot fixed-link { 282*f126890aSEmmanuel Vadot speed = <1000>; 283*f126890aSEmmanuel Vadot full-duplex; 284*f126890aSEmmanuel Vadot }; 285*f126890aSEmmanuel Vadot }; 286*f126890aSEmmanuel Vadot }; 287*f126890aSEmmanuel Vadot }; 288*f126890aSEmmanuel Vadot }; 289*f126890aSEmmanuel Vadot}; 290*f126890aSEmmanuel Vadot 291*f126890aSEmmanuel Vadot&fec2 { 292*f126890aSEmmanuel Vadot pinctrl-names = "default"; 293*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet2>; 294*f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>, 295*f126890aSEmmanuel Vadot <&clks IMX7D_ENET2_TIME_ROOT_CLK>; 296*f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; 297*f126890aSEmmanuel Vadot assigned-clock-rates = <0>, <100000000>; 298*f126890aSEmmanuel Vadot phy-mode = "rgmii"; 299*f126890aSEmmanuel Vadot fsl,magic-packet; 300*f126890aSEmmanuel Vadot status = "okay"; 301*f126890aSEmmanuel Vadot 302*f126890aSEmmanuel Vadot fixed-link { 303*f126890aSEmmanuel Vadot speed = <1000>; 304*f126890aSEmmanuel Vadot full-duplex; 305*f126890aSEmmanuel Vadot }; 306*f126890aSEmmanuel Vadot}; 307*f126890aSEmmanuel Vadot 308*f126890aSEmmanuel Vadot&flexcan1 { 309*f126890aSEmmanuel Vadot pinctrl-names = "default"; 310*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_flexcan1>; 311*f126890aSEmmanuel Vadot xceiver-supply = <®_can1_stby>; 312*f126890aSEmmanuel Vadot status = "okay"; 313*f126890aSEmmanuel Vadot}; 314*f126890aSEmmanuel Vadot 315*f126890aSEmmanuel Vadot&flexcan2 { 316*f126890aSEmmanuel Vadot pinctrl-names = "default"; 317*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_flexcan2>; 318*f126890aSEmmanuel Vadot xceiver-supply = <®_can2_stby>; 319*f126890aSEmmanuel Vadot status = "okay"; 320*f126890aSEmmanuel Vadot}; 321*f126890aSEmmanuel Vadot 322*f126890aSEmmanuel Vadot&gpio1 { 323*f126890aSEmmanuel Vadot pinctrl-names = "default"; 324*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_gpio1>; 325*f126890aSEmmanuel Vadot 326*f126890aSEmmanuel Vadot gpio-line-names = "", "", "", "", "", "", "", "", 327*f126890aSEmmanuel Vadot "", "", 328*f126890aSEmmanuel Vadot "usb_1_en_b", 329*f126890aSEmmanuel Vadot "usb_2_en_b", 330*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 331*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 332*f126890aSEmmanuel Vadot "", "", "", ""; 333*f126890aSEmmanuel Vadot}; 334*f126890aSEmmanuel Vadot 335*f126890aSEmmanuel Vadot&gpio2 { 336*f126890aSEmmanuel Vadot pinctrl-names = "default"; 337*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_gpio2>; 338*f126890aSEmmanuel Vadot 339*f126890aSEmmanuel Vadot gpio-line-names = "12v_out_en_1", 340*f126890aSEmmanuel Vadot "12v_out_en_2", 341*f126890aSEmmanuel Vadot "12v_out_en_3", 342*f126890aSEmmanuel Vadot "28v_out_en_5", 343*f126890aSEmmanuel Vadot "28v_out_en_1", 344*f126890aSEmmanuel Vadot "28v_out_en_2", 345*f126890aSEmmanuel Vadot "28v_out_en_3", 346*f126890aSEmmanuel Vadot "28v_out_en_4", 347*f126890aSEmmanuel Vadot "", "", 348*f126890aSEmmanuel Vadot "usb_3_en_b", 349*f126890aSEmmanuel Vadot "usb_4_en_b", 350*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 351*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 352*f126890aSEmmanuel Vadot "", "", "", ""; 353*f126890aSEmmanuel Vadot}; 354*f126890aSEmmanuel Vadot 355*f126890aSEmmanuel Vadot&i2c1 { 356*f126890aSEmmanuel Vadot clock-frequency = <100000>; 357*f126890aSEmmanuel Vadot pinctrl-names = "default"; 358*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 359*f126890aSEmmanuel Vadot status = "okay"; 360*f126890aSEmmanuel Vadot 361*f126890aSEmmanuel Vadot pmic: pmic@8 { 362*f126890aSEmmanuel Vadot compatible = "fsl,pfuze3000"; 363*f126890aSEmmanuel Vadot reg = <0x08>; 364*f126890aSEmmanuel Vadot 365*f126890aSEmmanuel Vadot regulators { 366*f126890aSEmmanuel Vadot sw1a_reg: sw1a { 367*f126890aSEmmanuel Vadot regulator-min-microvolt = <700000>; 368*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 369*f126890aSEmmanuel Vadot regulator-boot-on; 370*f126890aSEmmanuel Vadot regulator-always-on; 371*f126890aSEmmanuel Vadot regulator-ramp-delay = <6250>; 372*f126890aSEmmanuel Vadot }; 373*f126890aSEmmanuel Vadot 374*f126890aSEmmanuel Vadot sw1c_reg: sw1b { 375*f126890aSEmmanuel Vadot regulator-min-microvolt = <700000>; 376*f126890aSEmmanuel Vadot regulator-max-microvolt = <1475000>; 377*f126890aSEmmanuel Vadot regulator-boot-on; 378*f126890aSEmmanuel Vadot regulator-always-on; 379*f126890aSEmmanuel Vadot regulator-ramp-delay = <6250>; 380*f126890aSEmmanuel Vadot }; 381*f126890aSEmmanuel Vadot 382*f126890aSEmmanuel Vadot sw2_reg: sw2 { 383*f126890aSEmmanuel Vadot regulator-min-microvolt = <1500000>; 384*f126890aSEmmanuel Vadot regulator-max-microvolt = <1850000>; 385*f126890aSEmmanuel Vadot regulator-boot-on; 386*f126890aSEmmanuel Vadot regulator-always-on; 387*f126890aSEmmanuel Vadot }; 388*f126890aSEmmanuel Vadot 389*f126890aSEmmanuel Vadot sw3a_reg: sw3 { 390*f126890aSEmmanuel Vadot regulator-min-microvolt = <900000>; 391*f126890aSEmmanuel Vadot regulator-max-microvolt = <1650000>; 392*f126890aSEmmanuel Vadot regulator-boot-on; 393*f126890aSEmmanuel Vadot regulator-always-on; 394*f126890aSEmmanuel Vadot }; 395*f126890aSEmmanuel Vadot 396*f126890aSEmmanuel Vadot swbst_reg: swbst { 397*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 398*f126890aSEmmanuel Vadot regulator-max-microvolt = <5150000>; 399*f126890aSEmmanuel Vadot }; 400*f126890aSEmmanuel Vadot 401*f126890aSEmmanuel Vadot snvs_reg: vsnvs { 402*f126890aSEmmanuel Vadot regulator-min-microvolt = <1000000>; 403*f126890aSEmmanuel Vadot regulator-max-microvolt = <3000000>; 404*f126890aSEmmanuel Vadot regulator-boot-on; 405*f126890aSEmmanuel Vadot regulator-always-on; 406*f126890aSEmmanuel Vadot }; 407*f126890aSEmmanuel Vadot 408*f126890aSEmmanuel Vadot vref_reg: vrefddr { 409*f126890aSEmmanuel Vadot regulator-boot-on; 410*f126890aSEmmanuel Vadot regulator-always-on; 411*f126890aSEmmanuel Vadot }; 412*f126890aSEmmanuel Vadot 413*f126890aSEmmanuel Vadot vgen1_reg: vldo1 { 414*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 415*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 416*f126890aSEmmanuel Vadot regulator-always-on; 417*f126890aSEmmanuel Vadot }; 418*f126890aSEmmanuel Vadot 419*f126890aSEmmanuel Vadot vgen2_reg: vldo2 { 420*f126890aSEmmanuel Vadot regulator-min-microvolt = <800000>; 421*f126890aSEmmanuel Vadot regulator-max-microvolt = <1550000>; 422*f126890aSEmmanuel Vadot regulator-always-on; 423*f126890aSEmmanuel Vadot }; 424*f126890aSEmmanuel Vadot 425*f126890aSEmmanuel Vadot vgen3_reg: vccsd { 426*f126890aSEmmanuel Vadot regulator-min-microvolt = <2850000>; 427*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 428*f126890aSEmmanuel Vadot regulator-always-on; 429*f126890aSEmmanuel Vadot }; 430*f126890aSEmmanuel Vadot 431*f126890aSEmmanuel Vadot vgen4_reg: v33 { 432*f126890aSEmmanuel Vadot regulator-min-microvolt = <2850000>; 433*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 434*f126890aSEmmanuel Vadot regulator-always-on; 435*f126890aSEmmanuel Vadot }; 436*f126890aSEmmanuel Vadot 437*f126890aSEmmanuel Vadot vgen5_reg: vldo3 { 438*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 439*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 440*f126890aSEmmanuel Vadot regulator-always-on; 441*f126890aSEmmanuel Vadot }; 442*f126890aSEmmanuel Vadot 443*f126890aSEmmanuel Vadot vgen6_reg: vldo4 { 444*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 445*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 446*f126890aSEmmanuel Vadot regulator-always-on; 447*f126890aSEmmanuel Vadot }; 448*f126890aSEmmanuel Vadot }; 449*f126890aSEmmanuel Vadot }; 450*f126890aSEmmanuel Vadot 451*f126890aSEmmanuel Vadot cs2000: clkgen@4e { 452*f126890aSEmmanuel Vadot compatible = "cirrus,cs2000-cp"; 453*f126890aSEmmanuel Vadot reg = <0x4e>; 454*f126890aSEmmanuel Vadot #clock-cells = <0>; 455*f126890aSEmmanuel Vadot clock-names = "clk_in", "ref_clk"; 456*f126890aSEmmanuel Vadot clocks = <&cs2000_in_dummy>, <&cs2000_ref>; 457*f126890aSEmmanuel Vadot assigned-clocks = <&cs2000>; 458*f126890aSEmmanuel Vadot assigned-clock-rates = <24000000>; 459*f126890aSEmmanuel Vadot }; 460*f126890aSEmmanuel Vadot 461*f126890aSEmmanuel Vadot eeprom@50 { 462*f126890aSEmmanuel Vadot compatible = "atmel,24c04"; 463*f126890aSEmmanuel Vadot reg = <0x50>; 464*f126890aSEmmanuel Vadot }; 465*f126890aSEmmanuel Vadot 466*f126890aSEmmanuel Vadot eeprom@52 { 467*f126890aSEmmanuel Vadot compatible = "atmel,24c04"; 468*f126890aSEmmanuel Vadot reg = <0x52>; 469*f126890aSEmmanuel Vadot }; 470*f126890aSEmmanuel Vadot}; 471*f126890aSEmmanuel Vadot 472*f126890aSEmmanuel Vadot&i2c2 { 473*f126890aSEmmanuel Vadot clock-frequency = <100000>; 474*f126890aSEmmanuel Vadot pinctrl-names = "default"; 475*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c2>; 476*f126890aSEmmanuel Vadot status = "okay"; 477*f126890aSEmmanuel Vadot 478*f126890aSEmmanuel Vadot codec2: codec@18 { 479*f126890aSEmmanuel Vadot compatible = "ti,tlv320dac3100"; 480*f126890aSEmmanuel Vadot pinctrl-names = "default"; 481*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_codec2>; 482*f126890aSEmmanuel Vadot reg = <0x18>; 483*f126890aSEmmanuel Vadot #sound-dai-cells = <0>; 484*f126890aSEmmanuel Vadot HPVDD-supply = <®_3p3v>; 485*f126890aSEmmanuel Vadot SPRVDD-supply = <®_3p3v>; 486*f126890aSEmmanuel Vadot SPLVDD-supply = <®_3p3v>; 487*f126890aSEmmanuel Vadot AVDD-supply = <®_3p3v>; 488*f126890aSEmmanuel Vadot IOVDD-supply = <®_3p3v>; 489*f126890aSEmmanuel Vadot DVDD-supply = <&vgen4_reg>; 490*f126890aSEmmanuel Vadot gpio-reset = <&gpio1 6 GPIO_ACTIVE_LOW>; 491*f126890aSEmmanuel Vadot }; 492*f126890aSEmmanuel Vadot 493*f126890aSEmmanuel Vadot hpa2: amp@60 { 494*f126890aSEmmanuel Vadot compatible = "ti,tpa6130a2"; 495*f126890aSEmmanuel Vadot pinctrl-names = "default"; 496*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_tpa2>; 497*f126890aSEmmanuel Vadot reg = <0x60>; 498*f126890aSEmmanuel Vadot power-gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>; 499*f126890aSEmmanuel Vadot Vdd-supply = <®_5p0v_main>; 500*f126890aSEmmanuel Vadot }; 501*f126890aSEmmanuel Vadot}; 502*f126890aSEmmanuel Vadot 503*f126890aSEmmanuel Vadot&i2c3 { 504*f126890aSEmmanuel Vadot clock-frequency = <100000>; 505*f126890aSEmmanuel Vadot pinctrl-names = "default"; 506*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c3>; 507*f126890aSEmmanuel Vadot status = "okay"; 508*f126890aSEmmanuel Vadot 509*f126890aSEmmanuel Vadot codec3: codec@18 { 510*f126890aSEmmanuel Vadot compatible = "ti,tlv320dac3100"; 511*f126890aSEmmanuel Vadot pinctrl-names = "default"; 512*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_codec3>; 513*f126890aSEmmanuel Vadot reg = <0x18>; 514*f126890aSEmmanuel Vadot #sound-dai-cells = <0>; 515*f126890aSEmmanuel Vadot HPVDD-supply = <®_3p3v>; 516*f126890aSEmmanuel Vadot SPRVDD-supply = <®_3p3v>; 517*f126890aSEmmanuel Vadot SPLVDD-supply = <®_3p3v>; 518*f126890aSEmmanuel Vadot AVDD-supply = <®_3p3v>; 519*f126890aSEmmanuel Vadot IOVDD-supply = <®_3p3v>; 520*f126890aSEmmanuel Vadot DVDD-supply = <&vgen4_reg>; 521*f126890aSEmmanuel Vadot gpio-reset = <&gpio1 7 GPIO_ACTIVE_LOW>; 522*f126890aSEmmanuel Vadot }; 523*f126890aSEmmanuel Vadot 524*f126890aSEmmanuel Vadot hpa3: amp@60 { 525*f126890aSEmmanuel Vadot compatible = "ti,tpa6130a2"; 526*f126890aSEmmanuel Vadot pinctrl-names = "default"; 527*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_tpa3>; 528*f126890aSEmmanuel Vadot reg = <0x60>; 529*f126890aSEmmanuel Vadot power-gpio = <&gpio3 28 GPIO_ACTIVE_HIGH>; 530*f126890aSEmmanuel Vadot Vdd-supply = <®_5p0v_main>; 531*f126890aSEmmanuel Vadot }; 532*f126890aSEmmanuel Vadot}; 533*f126890aSEmmanuel Vadot 534*f126890aSEmmanuel Vadot&i2c4 { 535*f126890aSEmmanuel Vadot clock-frequency = <100000>; 536*f126890aSEmmanuel Vadot pinctrl-names = "default"; 537*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c4>; 538*f126890aSEmmanuel Vadot status = "okay"; 539*f126890aSEmmanuel Vadot 540*f126890aSEmmanuel Vadot codec1: codec@18 { 541*f126890aSEmmanuel Vadot compatible = "ti,tlv320dac3100"; 542*f126890aSEmmanuel Vadot pinctrl-names = "default"; 543*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_codec1>; 544*f126890aSEmmanuel Vadot reg = <0x18>; 545*f126890aSEmmanuel Vadot #sound-dai-cells = <0>; 546*f126890aSEmmanuel Vadot HPVDD-supply = <®_3p3v>; 547*f126890aSEmmanuel Vadot SPRVDD-supply = <®_3p3v>; 548*f126890aSEmmanuel Vadot SPLVDD-supply = <®_3p3v>; 549*f126890aSEmmanuel Vadot AVDD-supply = <®_3p3v>; 550*f126890aSEmmanuel Vadot IOVDD-supply = <®_3p3v>; 551*f126890aSEmmanuel Vadot DVDD-supply = <&vgen4_reg>; 552*f126890aSEmmanuel Vadot gpio-reset = <&gpio1 5 GPIO_ACTIVE_LOW>; 553*f126890aSEmmanuel Vadot }; 554*f126890aSEmmanuel Vadot 555*f126890aSEmmanuel Vadot hpa1: amp@60 { 556*f126890aSEmmanuel Vadot compatible = "ti,tpa6130a2"; 557*f126890aSEmmanuel Vadot pinctrl-names = "default"; 558*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_tpa1>; 559*f126890aSEmmanuel Vadot reg = <0x60>; 560*f126890aSEmmanuel Vadot power-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>; 561*f126890aSEmmanuel Vadot Vdd-supply = <®_5p0v_main>; 562*f126890aSEmmanuel Vadot }; 563*f126890aSEmmanuel Vadot}; 564*f126890aSEmmanuel Vadot 565*f126890aSEmmanuel Vadot&sai1 { 566*f126890aSEmmanuel Vadot pinctrl-names = "default"; 567*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_sai1>; 568*f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>, 569*f126890aSEmmanuel Vadot <&clks IMX7D_SAI1_ROOT_CLK>; 570*f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; 571*f126890aSEmmanuel Vadot assigned-clock-rates = <0>, <36864000>; 572*f126890aSEmmanuel Vadot status = "okay"; 573*f126890aSEmmanuel Vadot}; 574*f126890aSEmmanuel Vadot 575*f126890aSEmmanuel Vadot&sai2 { 576*f126890aSEmmanuel Vadot pinctrl-names = "default"; 577*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_sai2>; 578*f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_SAI2_ROOT_SRC>, 579*f126890aSEmmanuel Vadot <&clks IMX7D_SAI2_ROOT_CLK>; 580*f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; 581*f126890aSEmmanuel Vadot assigned-clock-rates = <0>, <36864000>; 582*f126890aSEmmanuel Vadot status = "okay"; 583*f126890aSEmmanuel Vadot}; 584*f126890aSEmmanuel Vadot 585*f126890aSEmmanuel Vadot&sai3 { 586*f126890aSEmmanuel Vadot pinctrl-names = "default"; 587*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_sai3>; 588*f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_SAI3_ROOT_SRC>, 589*f126890aSEmmanuel Vadot <&clks IMX7D_SAI3_ROOT_CLK>; 590*f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; 591*f126890aSEmmanuel Vadot assigned-clock-rates = <0>, <36864000>; 592*f126890aSEmmanuel Vadot status = "okay"; 593*f126890aSEmmanuel Vadot}; 594*f126890aSEmmanuel Vadot 595*f126890aSEmmanuel Vadot&uart2 { 596*f126890aSEmmanuel Vadot pinctrl-names = "default"; 597*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart2>; 598*f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>; 599*f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; 600*f126890aSEmmanuel Vadot status = "okay"; 601*f126890aSEmmanuel Vadot}; 602*f126890aSEmmanuel Vadot 603*f126890aSEmmanuel Vadot&uart4 { 604*f126890aSEmmanuel Vadot pinctrl-names = "default"; 605*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart4>; 606*f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>; 607*f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; 608*f126890aSEmmanuel Vadot status = "okay"; 609*f126890aSEmmanuel Vadot 610*f126890aSEmmanuel Vadot mcu { 611*f126890aSEmmanuel Vadot compatible = "zii,rave-sp-rdu2"; 612*f126890aSEmmanuel Vadot current-speed = <1000000>; 613*f126890aSEmmanuel Vadot #address-cells = <1>; 614*f126890aSEmmanuel Vadot #size-cells = <1>; 615*f126890aSEmmanuel Vadot 616*f126890aSEmmanuel Vadot watchdog { 617*f126890aSEmmanuel Vadot compatible = "zii,rave-sp-watchdog"; 618*f126890aSEmmanuel Vadot }; 619*f126890aSEmmanuel Vadot 620*f126890aSEmmanuel Vadot eeprom@a3 { 621*f126890aSEmmanuel Vadot compatible = "zii,rave-sp-eeprom"; 622*f126890aSEmmanuel Vadot reg = <0xa3 0x4000>; 623*f126890aSEmmanuel Vadot #address-cells = <1>; 624*f126890aSEmmanuel Vadot #size-cells = <1>; 625*f126890aSEmmanuel Vadot zii,eeprom-name = "main-eeprom"; 626*f126890aSEmmanuel Vadot }; 627*f126890aSEmmanuel Vadot }; 628*f126890aSEmmanuel Vadot}; 629*f126890aSEmmanuel Vadot 630*f126890aSEmmanuel Vadot&usbotg1 { 631*f126890aSEmmanuel Vadot dr_mode = "host"; 632*f126890aSEmmanuel Vadot disable-over-current; 633*f126890aSEmmanuel Vadot status = "okay"; 634*f126890aSEmmanuel Vadot}; 635*f126890aSEmmanuel Vadot 636*f126890aSEmmanuel Vadot&usbotg2 { 637*f126890aSEmmanuel Vadot dr_mode = "host"; 638*f126890aSEmmanuel Vadot disable-over-current; 639*f126890aSEmmanuel Vadot status = "okay"; 640*f126890aSEmmanuel Vadot}; 641*f126890aSEmmanuel Vadot 642*f126890aSEmmanuel Vadot&usdhc1 { 643*f126890aSEmmanuel Vadot pinctrl-names = "default"; 644*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc1>; 645*f126890aSEmmanuel Vadot bus-width = <4>; 646*f126890aSEmmanuel Vadot no-1-8-v; 647*f126890aSEmmanuel Vadot no-sdio; 648*f126890aSEmmanuel Vadot keep-power-in-suspend; 649*f126890aSEmmanuel Vadot status = "okay"; 650*f126890aSEmmanuel Vadot}; 651*f126890aSEmmanuel Vadot 652*f126890aSEmmanuel Vadot&usdhc3 { 653*f126890aSEmmanuel Vadot pinctrl-names = "default"; 654*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc3>; 655*f126890aSEmmanuel Vadot bus-width = <8>; 656*f126890aSEmmanuel Vadot no-1-8-v; 657*f126890aSEmmanuel Vadot non-removable; 658*f126890aSEmmanuel Vadot no-sdio; 659*f126890aSEmmanuel Vadot no-sd; 660*f126890aSEmmanuel Vadot keep-power-in-suspend; 661*f126890aSEmmanuel Vadot status = "okay"; 662*f126890aSEmmanuel Vadot}; 663*f126890aSEmmanuel Vadot 664*f126890aSEmmanuel Vadot&wdog1 { 665*f126890aSEmmanuel Vadot status = "disabled"; 666*f126890aSEmmanuel Vadot}; 667*f126890aSEmmanuel Vadot 668*f126890aSEmmanuel Vadot&snvs_rtc { 669*f126890aSEmmanuel Vadot status = "disabled"; 670*f126890aSEmmanuel Vadot}; 671*f126890aSEmmanuel Vadot 672*f126890aSEmmanuel Vadot&iomuxc { 673*f126890aSEmmanuel Vadot pinctrl_ecspi1: ecspi1grp { 674*f126890aSEmmanuel Vadot fsl,pins = < 675*f126890aSEmmanuel Vadot MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x2 676*f126890aSEmmanuel Vadot MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x2 677*f126890aSEmmanuel Vadot MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x2 678*f126890aSEmmanuel Vadot MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x59 679*f126890aSEmmanuel Vadot >; 680*f126890aSEmmanuel Vadot }; 681*f126890aSEmmanuel Vadot 682*f126890aSEmmanuel Vadot pinctrl_enet1: enet1grp { 683*f126890aSEmmanuel Vadot fsl,pins = < 684*f126890aSEmmanuel Vadot MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 685*f126890aSEmmanuel Vadot MX7D_PAD_SD2_WP__ENET1_MDC 0x3 686*f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1 687*f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1 688*f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1 689*f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1 690*f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1 691*f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1 692*f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1 693*f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1 694*f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1 695*f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1 696*f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1 697*f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1 698*f126890aSEmmanuel Vadot >; 699*f126890aSEmmanuel Vadot }; 700*f126890aSEmmanuel Vadot 701*f126890aSEmmanuel Vadot pinctrl_enet2: enet2grp { 702*f126890aSEmmanuel Vadot fsl,pins = < 703*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC 0x1 704*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x1 705*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x1 706*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 0x1 707*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 0x1 708*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x1 709*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC 0x1 710*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x1 711*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x1 712*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 0x1 713*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 0x1 714*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x1 715*f126890aSEmmanuel Vadot MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT 0x1 716*f126890aSEmmanuel Vadot >; 717*f126890aSEmmanuel Vadot }; 718*f126890aSEmmanuel Vadot 719*f126890aSEmmanuel Vadot pinctrl_flexcan1: flexcan1grp { 720*f126890aSEmmanuel Vadot fsl,pins = < 721*f126890aSEmmanuel Vadot MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX 0x59 722*f126890aSEmmanuel Vadot MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX 0x59 723*f126890aSEmmanuel Vadot >; 724*f126890aSEmmanuel Vadot }; 725*f126890aSEmmanuel Vadot 726*f126890aSEmmanuel Vadot pinctrl_flexcan1_stby: flexcan1stbygrp { 727*f126890aSEmmanuel Vadot fsl,pins = < 728*f126890aSEmmanuel Vadot MX7D_PAD_GPIO1_IO08__GPIO1_IO8 0x59 729*f126890aSEmmanuel Vadot >; 730*f126890aSEmmanuel Vadot }; 731*f126890aSEmmanuel Vadot 732*f126890aSEmmanuel Vadot pinctrl_flexcan2: flexcan2grp { 733*f126890aSEmmanuel Vadot fsl,pins = < 734*f126890aSEmmanuel Vadot MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x59 735*f126890aSEmmanuel Vadot MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x59 736*f126890aSEmmanuel Vadot >; 737*f126890aSEmmanuel Vadot }; 738*f126890aSEmmanuel Vadot 739*f126890aSEmmanuel Vadot pinctrl_flexcan2_stby: flexcan2stbygrp { 740*f126890aSEmmanuel Vadot fsl,pins = < 741*f126890aSEmmanuel Vadot MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x59 742*f126890aSEmmanuel Vadot >; 743*f126890aSEmmanuel Vadot }; 744*f126890aSEmmanuel Vadot 745*f126890aSEmmanuel Vadot pinctrl_gpio1: gpio1grp { 746*f126890aSEmmanuel Vadot fsl,pins = < 747*f126890aSEmmanuel Vadot MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x00 748*f126890aSEmmanuel Vadot MX7D_PAD_GPIO1_IO11__GPIO1_IO11 0x00 749*f126890aSEmmanuel Vadot >; 750*f126890aSEmmanuel Vadot }; 751*f126890aSEmmanuel Vadot 752*f126890aSEmmanuel Vadot pinctrl_gpio2: gpio2grp { 753*f126890aSEmmanuel Vadot fsl,pins = < 754*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x00 755*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x00 756*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x00 757*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA03__GPIO2_IO3 0x03 758*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x03 759*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA05__GPIO2_IO5 0x03 760*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA06__GPIO2_IO6 0x03 761*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x03 762*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x00 763*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA11__GPIO2_IO11 0x00 764*f126890aSEmmanuel Vadot >; 765*f126890aSEmmanuel Vadot }; 766*f126890aSEmmanuel Vadot 767*f126890aSEmmanuel Vadot pinctrl_i2c1: i2c1grp { 768*f126890aSEmmanuel Vadot fsl,pins = < 769*f126890aSEmmanuel Vadot MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f 770*f126890aSEmmanuel Vadot MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f 771*f126890aSEmmanuel Vadot >; 772*f126890aSEmmanuel Vadot }; 773*f126890aSEmmanuel Vadot 774*f126890aSEmmanuel Vadot pinctrl_i2c2: i2c2grp { 775*f126890aSEmmanuel Vadot fsl,pins = < 776*f126890aSEmmanuel Vadot MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f 777*f126890aSEmmanuel Vadot MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f 778*f126890aSEmmanuel Vadot >; 779*f126890aSEmmanuel Vadot }; 780*f126890aSEmmanuel Vadot 781*f126890aSEmmanuel Vadot pinctrl_i2c3: i2c3grp { 782*f126890aSEmmanuel Vadot fsl,pins = < 783*f126890aSEmmanuel Vadot MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f 784*f126890aSEmmanuel Vadot MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f 785*f126890aSEmmanuel Vadot >; 786*f126890aSEmmanuel Vadot }; 787*f126890aSEmmanuel Vadot 788*f126890aSEmmanuel Vadot pinctrl_i2c3_gpio: i2c3gpiogrp { 789*f126890aSEmmanuel Vadot fsl,pins = < 790*f126890aSEmmanuel Vadot MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x4000007f 791*f126890aSEmmanuel Vadot MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x4000007f 792*f126890aSEmmanuel Vadot >; 793*f126890aSEmmanuel Vadot }; 794*f126890aSEmmanuel Vadot 795*f126890aSEmmanuel Vadot pinctrl_i2c4: i2c4grp { 796*f126890aSEmmanuel Vadot fsl,pins = < 797*f126890aSEmmanuel Vadot MX7D_PAD_I2C4_SDA__I2C4_SDA 0x4000007f 798*f126890aSEmmanuel Vadot MX7D_PAD_I2C4_SCL__I2C4_SCL 0x4000007f 799*f126890aSEmmanuel Vadot >; 800*f126890aSEmmanuel Vadot }; 801*f126890aSEmmanuel Vadot 802*f126890aSEmmanuel Vadot pinctrl_i2c4_gpio: i2c4gpiogrp { 803*f126890aSEmmanuel Vadot fsl,pins = < 804*f126890aSEmmanuel Vadot MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x4000007f 805*f126890aSEmmanuel Vadot MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x4000007f 806*f126890aSEmmanuel Vadot >; 807*f126890aSEmmanuel Vadot }; 808*f126890aSEmmanuel Vadot 809*f126890aSEmmanuel Vadot pinctrl_leds_debug: debuggrp { 810*f126890aSEmmanuel Vadot fsl,pins = < 811*f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x59 812*f126890aSEmmanuel Vadot >; 813*f126890aSEmmanuel Vadot }; 814*f126890aSEmmanuel Vadot 815*f126890aSEmmanuel Vadot pinctrl_sai1: sai1grp { 816*f126890aSEmmanuel Vadot fsl,pins = < 817*f126890aSEmmanuel Vadot MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1f 818*f126890aSEmmanuel Vadot MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f 819*f126890aSEmmanuel Vadot MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x30 820*f126890aSEmmanuel Vadot >; 821*f126890aSEmmanuel Vadot }; 822*f126890aSEmmanuel Vadot 823*f126890aSEmmanuel Vadot pinctrl_sai2: sai2grp { 824*f126890aSEmmanuel Vadot fsl,pins = < 825*f126890aSEmmanuel Vadot MX7D_PAD_SAI2_TX_BCLK__SAI2_TX_BCLK 0x1f 826*f126890aSEmmanuel Vadot MX7D_PAD_SAI2_TX_SYNC__SAI2_TX_SYNC 0x1f 827*f126890aSEmmanuel Vadot MX7D_PAD_SAI2_TX_DATA__SAI2_TX_DATA0 0x30 828*f126890aSEmmanuel Vadot >; 829*f126890aSEmmanuel Vadot }; 830*f126890aSEmmanuel Vadot 831*f126890aSEmmanuel Vadot pinctrl_sai3: sai3grp { 832*f126890aSEmmanuel Vadot fsl,pins = < 833*f126890aSEmmanuel Vadot MX7D_PAD_UART3_TX_DATA__SAI3_TX_BCLK 0x1f 834*f126890aSEmmanuel Vadot MX7D_PAD_UART3_CTS_B__SAI3_TX_SYNC 0x1f 835*f126890aSEmmanuel Vadot MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0 0x30 836*f126890aSEmmanuel Vadot >; 837*f126890aSEmmanuel Vadot }; 838*f126890aSEmmanuel Vadot 839*f126890aSEmmanuel Vadot pinctrl_tpa1: tpa6130-1grp { 840*f126890aSEmmanuel Vadot fsl,pins = < 841*f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA21__GPIO3_IO26 0x40000038 842*f126890aSEmmanuel Vadot >; 843*f126890aSEmmanuel Vadot }; 844*f126890aSEmmanuel Vadot 845*f126890aSEmmanuel Vadot pinctrl_tpa2: tpa6130-2grp { 846*f126890aSEmmanuel Vadot fsl,pins = < 847*f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA22__GPIO3_IO27 0x40000038 848*f126890aSEmmanuel Vadot >; 849*f126890aSEmmanuel Vadot }; 850*f126890aSEmmanuel Vadot 851*f126890aSEmmanuel Vadot pinctrl_tpa3: tpa6130-3grp { 852*f126890aSEmmanuel Vadot fsl,pins = < 853*f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x40000038 854*f126890aSEmmanuel Vadot >; 855*f126890aSEmmanuel Vadot }; 856*f126890aSEmmanuel Vadot 857*f126890aSEmmanuel Vadot pinctrl_uart2: uart2grp { 858*f126890aSEmmanuel Vadot fsl,pins = < 859*f126890aSEmmanuel Vadot MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX 0x79 860*f126890aSEmmanuel Vadot MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX 0x79 861*f126890aSEmmanuel Vadot >; 862*f126890aSEmmanuel Vadot }; 863*f126890aSEmmanuel Vadot 864*f126890aSEmmanuel Vadot pinctrl_uart4: uart4grp { 865*f126890aSEmmanuel Vadot fsl,pins = < 866*f126890aSEmmanuel Vadot MX7D_PAD_SD2_DATA0__UART4_DCE_RX 0x79 867*f126890aSEmmanuel Vadot MX7D_PAD_SD2_DATA1__UART4_DCE_TX 0x79 868*f126890aSEmmanuel Vadot >; 869*f126890aSEmmanuel Vadot }; 870*f126890aSEmmanuel Vadot 871*f126890aSEmmanuel Vadot pinctrl_usdhc1: usdhc1grp { 872*f126890aSEmmanuel Vadot fsl,pins = < 873*f126890aSEmmanuel Vadot MX7D_PAD_SD1_CMD__SD1_CMD 0x59 874*f126890aSEmmanuel Vadot MX7D_PAD_SD1_CLK__SD1_CLK 0x19 875*f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 876*f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 877*f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 878*f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 879*f126890aSEmmanuel Vadot >; 880*f126890aSEmmanuel Vadot }; 881*f126890aSEmmanuel Vadot 882*f126890aSEmmanuel Vadot pinctrl_usdhc3: usdhc3grp { 883*f126890aSEmmanuel Vadot fsl,pins = < 884*f126890aSEmmanuel Vadot MX7D_PAD_SD3_CMD__SD3_CMD 0x59 885*f126890aSEmmanuel Vadot MX7D_PAD_SD3_CLK__SD3_CLK 0x19 886*f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 887*f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 888*f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 889*f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 890*f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 891*f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 892*f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 893*f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 894*f126890aSEmmanuel Vadot MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x59 895*f126890aSEmmanuel Vadot >; 896*f126890aSEmmanuel Vadot }; 897*f126890aSEmmanuel Vadot}; 898*f126890aSEmmanuel Vadot 899*f126890aSEmmanuel Vadot&iomuxc_lpsr { 900*f126890aSEmmanuel Vadot pinctrl_codec1: dac1grp { 901*f126890aSEmmanuel Vadot fsl,pins = < 902*f126890aSEmmanuel Vadot MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x40000038 903*f126890aSEmmanuel Vadot >; 904*f126890aSEmmanuel Vadot }; 905*f126890aSEmmanuel Vadot 906*f126890aSEmmanuel Vadot pinctrl_codec2: dac2grp { 907*f126890aSEmmanuel Vadot fsl,pins = < 908*f126890aSEmmanuel Vadot MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x40000038 909*f126890aSEmmanuel Vadot >; 910*f126890aSEmmanuel Vadot }; 911*f126890aSEmmanuel Vadot 912*f126890aSEmmanuel Vadot pinctrl_codec3: dac3grp { 913*f126890aSEmmanuel Vadot fsl,pins = < 914*f126890aSEmmanuel Vadot MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x40000038 915*f126890aSEmmanuel Vadot >; 916*f126890aSEmmanuel Vadot }; 917*f126890aSEmmanuel Vadot 918*f126890aSEmmanuel Vadot pinctrl_switch: switchgrp { 919*f126890aSEmmanuel Vadot fsl,pins = < 920*f126890aSEmmanuel Vadot MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x08 921*f126890aSEmmanuel Vadot >; 922*f126890aSEmmanuel Vadot }; 923*f126890aSEmmanuel Vadot}; 924