1354d7675SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2354d7675SEmmanuel Vadot 3354d7675SEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_MSM_GCC_8953_H 4354d7675SEmmanuel Vadot #define _DT_BINDINGS_CLK_MSM_GCC_8953_H 5354d7675SEmmanuel Vadot 6354d7675SEmmanuel Vadot /* Clocks */ 7354d7675SEmmanuel Vadot #define APC0_DROOP_DETECTOR_CLK_SRC 0 8354d7675SEmmanuel Vadot #define APC1_DROOP_DETECTOR_CLK_SRC 1 9354d7675SEmmanuel Vadot #define APSS_AHB_CLK_SRC 2 10354d7675SEmmanuel Vadot #define BLSP1_QUP1_I2C_APPS_CLK_SRC 3 11354d7675SEmmanuel Vadot #define BLSP1_QUP1_SPI_APPS_CLK_SRC 4 12354d7675SEmmanuel Vadot #define BLSP1_QUP2_I2C_APPS_CLK_SRC 5 13354d7675SEmmanuel Vadot #define BLSP1_QUP2_SPI_APPS_CLK_SRC 6 14354d7675SEmmanuel Vadot #define BLSP1_QUP3_I2C_APPS_CLK_SRC 7 15354d7675SEmmanuel Vadot #define BLSP1_QUP3_SPI_APPS_CLK_SRC 8 16354d7675SEmmanuel Vadot #define BLSP1_QUP4_I2C_APPS_CLK_SRC 9 17354d7675SEmmanuel Vadot #define BLSP1_QUP4_SPI_APPS_CLK_SRC 10 18354d7675SEmmanuel Vadot #define BLSP1_UART1_APPS_CLK_SRC 11 19354d7675SEmmanuel Vadot #define BLSP1_UART2_APPS_CLK_SRC 12 20354d7675SEmmanuel Vadot #define BLSP2_QUP1_I2C_APPS_CLK_SRC 13 21354d7675SEmmanuel Vadot #define BLSP2_QUP1_SPI_APPS_CLK_SRC 14 22354d7675SEmmanuel Vadot #define BLSP2_QUP2_I2C_APPS_CLK_SRC 15 23354d7675SEmmanuel Vadot #define BLSP2_QUP2_SPI_APPS_CLK_SRC 16 24354d7675SEmmanuel Vadot #define BLSP2_QUP3_I2C_APPS_CLK_SRC 17 25354d7675SEmmanuel Vadot #define BLSP2_QUP3_SPI_APPS_CLK_SRC 18 26354d7675SEmmanuel Vadot #define BLSP2_QUP4_I2C_APPS_CLK_SRC 19 27354d7675SEmmanuel Vadot #define BLSP2_QUP4_SPI_APPS_CLK_SRC 20 28354d7675SEmmanuel Vadot #define BLSP2_UART1_APPS_CLK_SRC 21 29354d7675SEmmanuel Vadot #define BLSP2_UART2_APPS_CLK_SRC 22 30354d7675SEmmanuel Vadot #define BYTE0_CLK_SRC 23 31354d7675SEmmanuel Vadot #define BYTE1_CLK_SRC 24 32354d7675SEmmanuel Vadot #define CAMSS_GP0_CLK_SRC 25 33354d7675SEmmanuel Vadot #define CAMSS_GP1_CLK_SRC 26 34354d7675SEmmanuel Vadot #define CAMSS_TOP_AHB_CLK_SRC 27 35354d7675SEmmanuel Vadot #define CCI_CLK_SRC 28 36354d7675SEmmanuel Vadot #define CPP_CLK_SRC 29 37354d7675SEmmanuel Vadot #define CRYPTO_CLK_SRC 30 38354d7675SEmmanuel Vadot #define CSI0PHYTIMER_CLK_SRC 31 39354d7675SEmmanuel Vadot #define CSI0P_CLK_SRC 32 40354d7675SEmmanuel Vadot #define CSI0_CLK_SRC 33 41354d7675SEmmanuel Vadot #define CSI1PHYTIMER_CLK_SRC 34 42354d7675SEmmanuel Vadot #define CSI1P_CLK_SRC 35 43354d7675SEmmanuel Vadot #define CSI1_CLK_SRC 36 44354d7675SEmmanuel Vadot #define CSI2PHYTIMER_CLK_SRC 37 45354d7675SEmmanuel Vadot #define CSI2P_CLK_SRC 38 46354d7675SEmmanuel Vadot #define CSI2_CLK_SRC 39 47354d7675SEmmanuel Vadot #define ESC0_CLK_SRC 40 48354d7675SEmmanuel Vadot #define ESC1_CLK_SRC 41 49354d7675SEmmanuel Vadot #define GCC_APC0_DROOP_DETECTOR_GPLL0_CLK 42 50354d7675SEmmanuel Vadot #define GCC_APC1_DROOP_DETECTOR_GPLL0_CLK 43 51354d7675SEmmanuel Vadot #define GCC_APSS_AHB_CLK 44 52354d7675SEmmanuel Vadot #define GCC_APSS_AXI_CLK 45 53354d7675SEmmanuel Vadot #define GCC_APSS_TCU_ASYNC_CLK 46 54354d7675SEmmanuel Vadot #define GCC_BIMC_GFX_CLK 47 55354d7675SEmmanuel Vadot #define GCC_BIMC_GPU_CLK 48 56354d7675SEmmanuel Vadot #define GCC_BLSP1_AHB_CLK 49 57354d7675SEmmanuel Vadot #define GCC_BLSP1_QUP1_I2C_APPS_CLK 50 58354d7675SEmmanuel Vadot #define GCC_BLSP1_QUP1_SPI_APPS_CLK 51 59354d7675SEmmanuel Vadot #define GCC_BLSP1_QUP2_I2C_APPS_CLK 52 60354d7675SEmmanuel Vadot #define GCC_BLSP1_QUP2_SPI_APPS_CLK 53 61354d7675SEmmanuel Vadot #define GCC_BLSP1_QUP3_I2C_APPS_CLK 54 62354d7675SEmmanuel Vadot #define GCC_BLSP1_QUP3_SPI_APPS_CLK 55 63354d7675SEmmanuel Vadot #define GCC_BLSP1_QUP4_I2C_APPS_CLK 56 64354d7675SEmmanuel Vadot #define GCC_BLSP1_QUP4_SPI_APPS_CLK 57 65354d7675SEmmanuel Vadot #define GCC_BLSP1_UART1_APPS_CLK 58 66354d7675SEmmanuel Vadot #define GCC_BLSP1_UART2_APPS_CLK 59 67354d7675SEmmanuel Vadot #define GCC_BLSP2_AHB_CLK 60 68354d7675SEmmanuel Vadot #define GCC_BLSP2_QUP1_I2C_APPS_CLK 61 69354d7675SEmmanuel Vadot #define GCC_BLSP2_QUP1_SPI_APPS_CLK 62 70354d7675SEmmanuel Vadot #define GCC_BLSP2_QUP2_I2C_APPS_CLK 63 71354d7675SEmmanuel Vadot #define GCC_BLSP2_QUP2_SPI_APPS_CLK 64 72354d7675SEmmanuel Vadot #define GCC_BLSP2_QUP3_I2C_APPS_CLK 65 73354d7675SEmmanuel Vadot #define GCC_BLSP2_QUP3_SPI_APPS_CLK 66 74354d7675SEmmanuel Vadot #define GCC_BLSP2_QUP4_I2C_APPS_CLK 67 75354d7675SEmmanuel Vadot #define GCC_BLSP2_QUP4_SPI_APPS_CLK 68 76354d7675SEmmanuel Vadot #define GCC_BLSP2_UART1_APPS_CLK 69 77354d7675SEmmanuel Vadot #define GCC_BLSP2_UART2_APPS_CLK 70 78354d7675SEmmanuel Vadot #define GCC_BOOT_ROM_AHB_CLK 71 79354d7675SEmmanuel Vadot #define GCC_CAMSS_AHB_CLK 72 80354d7675SEmmanuel Vadot #define GCC_CAMSS_CCI_AHB_CLK 73 81354d7675SEmmanuel Vadot #define GCC_CAMSS_CCI_CLK 74 82354d7675SEmmanuel Vadot #define GCC_CAMSS_CPP_AHB_CLK 75 83354d7675SEmmanuel Vadot #define GCC_CAMSS_CPP_AXI_CLK 76 84354d7675SEmmanuel Vadot #define GCC_CAMSS_CPP_CLK 77 85354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI0PHYTIMER_CLK 78 86354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI0PHY_CLK 79 87354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI0PIX_CLK 80 88354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI0RDI_CLK 81 89354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI0_AHB_CLK 82 90354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI0_CLK 83 91354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI0_CSIPHY_3P_CLK 84 92354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI1PHYTIMER_CLK 85 93354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI1PHY_CLK 86 94354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI1PIX_CLK 87 95354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI1RDI_CLK 88 96354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI1_AHB_CLK 89 97354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI1_CLK 90 98354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI1_CSIPHY_3P_CLK 91 99354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI2PHYTIMER_CLK 92 100354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI2PHY_CLK 93 101354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI2PIX_CLK 94 102354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI2RDI_CLK 95 103354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI2_AHB_CLK 96 104354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI2_CLK 97 105354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI2_CSIPHY_3P_CLK 98 106354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI_VFE0_CLK 99 107354d7675SEmmanuel Vadot #define GCC_CAMSS_CSI_VFE1_CLK 100 108354d7675SEmmanuel Vadot #define GCC_CAMSS_GP0_CLK 101 109354d7675SEmmanuel Vadot #define GCC_CAMSS_GP1_CLK 102 110354d7675SEmmanuel Vadot #define GCC_CAMSS_ISPIF_AHB_CLK 103 111354d7675SEmmanuel Vadot #define GCC_CAMSS_JPEG0_CLK 104 112354d7675SEmmanuel Vadot #define GCC_CAMSS_JPEG_AHB_CLK 105 113354d7675SEmmanuel Vadot #define GCC_CAMSS_JPEG_AXI_CLK 106 114354d7675SEmmanuel Vadot #define GCC_CAMSS_MCLK0_CLK 107 115354d7675SEmmanuel Vadot #define GCC_CAMSS_MCLK1_CLK 108 116354d7675SEmmanuel Vadot #define GCC_CAMSS_MCLK2_CLK 109 117354d7675SEmmanuel Vadot #define GCC_CAMSS_MCLK3_CLK 110 118354d7675SEmmanuel Vadot #define GCC_CAMSS_MICRO_AHB_CLK 111 119354d7675SEmmanuel Vadot #define GCC_CAMSS_TOP_AHB_CLK 112 120354d7675SEmmanuel Vadot #define GCC_CAMSS_VFE0_AHB_CLK 113 121354d7675SEmmanuel Vadot #define GCC_CAMSS_VFE0_AXI_CLK 114 122354d7675SEmmanuel Vadot #define GCC_CAMSS_VFE0_CLK 115 123354d7675SEmmanuel Vadot #define GCC_CAMSS_VFE1_AHB_CLK 116 124354d7675SEmmanuel Vadot #define GCC_CAMSS_VFE1_AXI_CLK 117 125354d7675SEmmanuel Vadot #define GCC_CAMSS_VFE1_CLK 118 126354d7675SEmmanuel Vadot #define GCC_CPP_TBU_CLK 119 127354d7675SEmmanuel Vadot #define GCC_CRYPTO_AHB_CLK 120 128354d7675SEmmanuel Vadot #define GCC_CRYPTO_AXI_CLK 121 129354d7675SEmmanuel Vadot #define GCC_CRYPTO_CLK 122 130354d7675SEmmanuel Vadot #define GCC_DCC_CLK 123 131354d7675SEmmanuel Vadot #define GCC_GP1_CLK 124 132354d7675SEmmanuel Vadot #define GCC_GP2_CLK 125 133354d7675SEmmanuel Vadot #define GCC_GP3_CLK 126 134354d7675SEmmanuel Vadot #define GCC_JPEG_TBU_CLK 127 135354d7675SEmmanuel Vadot #define GCC_MDP_TBU_CLK 128 136354d7675SEmmanuel Vadot #define GCC_MDSS_AHB_CLK 129 137354d7675SEmmanuel Vadot #define GCC_MDSS_AXI_CLK 130 138354d7675SEmmanuel Vadot #define GCC_MDSS_BYTE0_CLK 131 139354d7675SEmmanuel Vadot #define GCC_MDSS_BYTE1_CLK 132 140354d7675SEmmanuel Vadot #define GCC_MDSS_ESC0_CLK 133 141354d7675SEmmanuel Vadot #define GCC_MDSS_ESC1_CLK 134 142354d7675SEmmanuel Vadot #define GCC_MDSS_MDP_CLK 135 143354d7675SEmmanuel Vadot #define GCC_MDSS_PCLK0_CLK 136 144354d7675SEmmanuel Vadot #define GCC_MDSS_PCLK1_CLK 137 145354d7675SEmmanuel Vadot #define GCC_MDSS_VSYNC_CLK 138 146354d7675SEmmanuel Vadot #define GCC_MSS_CFG_AHB_CLK 139 147354d7675SEmmanuel Vadot #define GCC_MSS_Q6_BIMC_AXI_CLK 140 148354d7675SEmmanuel Vadot #define GCC_OXILI_AHB_CLK 141 149354d7675SEmmanuel Vadot #define GCC_OXILI_AON_CLK 142 150354d7675SEmmanuel Vadot #define GCC_OXILI_GFX3D_CLK 143 151354d7675SEmmanuel Vadot #define GCC_OXILI_TIMER_CLK 144 152354d7675SEmmanuel Vadot #define GCC_PCNOC_USB3_AXI_CLK 145 153354d7675SEmmanuel Vadot #define GCC_PDM2_CLK 146 154354d7675SEmmanuel Vadot #define GCC_PDM_AHB_CLK 147 155354d7675SEmmanuel Vadot #define GCC_PRNG_AHB_CLK 148 156354d7675SEmmanuel Vadot #define GCC_QDSS_DAP_CLK 149 157354d7675SEmmanuel Vadot #define GCC_QUSB_REF_CLK 150 158354d7675SEmmanuel Vadot #define GCC_RBCPR_GFX_CLK 151 159354d7675SEmmanuel Vadot #define GCC_SDCC1_AHB_CLK 152 160354d7675SEmmanuel Vadot #define GCC_SDCC1_APPS_CLK 153 161354d7675SEmmanuel Vadot #define GCC_SDCC1_ICE_CORE_CLK 154 162354d7675SEmmanuel Vadot #define GCC_SDCC2_AHB_CLK 155 163354d7675SEmmanuel Vadot #define GCC_SDCC2_APPS_CLK 156 164354d7675SEmmanuel Vadot #define GCC_SMMU_CFG_CLK 157 165354d7675SEmmanuel Vadot #define GCC_USB30_MASTER_CLK 158 166354d7675SEmmanuel Vadot #define GCC_USB30_MOCK_UTMI_CLK 159 167354d7675SEmmanuel Vadot #define GCC_USB30_SLEEP_CLK 160 168354d7675SEmmanuel Vadot #define GCC_USB3_AUX_CLK 161 169354d7675SEmmanuel Vadot #define GCC_USB3_PIPE_CLK 162 170354d7675SEmmanuel Vadot #define GCC_USB_PHY_CFG_AHB_CLK 163 171354d7675SEmmanuel Vadot #define GCC_USB_SS_REF_CLK 164 172354d7675SEmmanuel Vadot #define GCC_VENUS0_AHB_CLK 165 173354d7675SEmmanuel Vadot #define GCC_VENUS0_AXI_CLK 166 174354d7675SEmmanuel Vadot #define GCC_VENUS0_CORE0_VCODEC0_CLK 167 175354d7675SEmmanuel Vadot #define GCC_VENUS0_VCODEC0_CLK 168 176354d7675SEmmanuel Vadot #define GCC_VENUS_TBU_CLK 169 177354d7675SEmmanuel Vadot #define GCC_VFE1_TBU_CLK 170 178354d7675SEmmanuel Vadot #define GCC_VFE_TBU_CLK 171 179354d7675SEmmanuel Vadot #define GFX3D_CLK_SRC 172 180354d7675SEmmanuel Vadot #define GP1_CLK_SRC 173 181354d7675SEmmanuel Vadot #define GP2_CLK_SRC 174 182354d7675SEmmanuel Vadot #define GP3_CLK_SRC 175 183354d7675SEmmanuel Vadot #define GPLL0 176 184354d7675SEmmanuel Vadot #define GPLL0_EARLY 177 185354d7675SEmmanuel Vadot #define GPLL2 178 186354d7675SEmmanuel Vadot #define GPLL2_EARLY 179 187354d7675SEmmanuel Vadot #define GPLL3 180 188354d7675SEmmanuel Vadot #define GPLL3_EARLY 181 189354d7675SEmmanuel Vadot #define GPLL4 182 190354d7675SEmmanuel Vadot #define GPLL4_EARLY 183 191354d7675SEmmanuel Vadot #define GPLL6 184 192354d7675SEmmanuel Vadot #define GPLL6_EARLY 185 193354d7675SEmmanuel Vadot #define JPEG0_CLK_SRC 186 194354d7675SEmmanuel Vadot #define MCLK0_CLK_SRC 187 195354d7675SEmmanuel Vadot #define MCLK1_CLK_SRC 188 196354d7675SEmmanuel Vadot #define MCLK2_CLK_SRC 189 197354d7675SEmmanuel Vadot #define MCLK3_CLK_SRC 190 198354d7675SEmmanuel Vadot #define MDP_CLK_SRC 191 199354d7675SEmmanuel Vadot #define PCLK0_CLK_SRC 192 200354d7675SEmmanuel Vadot #define PCLK1_CLK_SRC 193 201354d7675SEmmanuel Vadot #define PDM2_CLK_SRC 194 202354d7675SEmmanuel Vadot #define RBCPR_GFX_CLK_SRC 195 203354d7675SEmmanuel Vadot #define SDCC1_APPS_CLK_SRC 196 204354d7675SEmmanuel Vadot #define SDCC1_ICE_CORE_CLK_SRC 197 205354d7675SEmmanuel Vadot #define SDCC2_APPS_CLK_SRC 198 206354d7675SEmmanuel Vadot #define USB30_MASTER_CLK_SRC 199 207354d7675SEmmanuel Vadot #define USB30_MOCK_UTMI_CLK_SRC 200 208354d7675SEmmanuel Vadot #define USB3_AUX_CLK_SRC 201 209354d7675SEmmanuel Vadot #define VCODEC0_CLK_SRC 202 210354d7675SEmmanuel Vadot #define VFE0_CLK_SRC 203 211354d7675SEmmanuel Vadot #define VFE1_CLK_SRC 204 212354d7675SEmmanuel Vadot #define VSYNC_CLK_SRC 205 213354d7675SEmmanuel Vadot 214354d7675SEmmanuel Vadot /* GCC block resets */ 215354d7675SEmmanuel Vadot #define GCC_CAMSS_MICRO_BCR 0 216354d7675SEmmanuel Vadot #define GCC_MSS_BCR 1 217354d7675SEmmanuel Vadot #define GCC_QUSB2_PHY_BCR 2 218354d7675SEmmanuel Vadot #define GCC_USB3PHY_PHY_BCR 3 219354d7675SEmmanuel Vadot #define GCC_USB3_PHY_BCR 4 220354d7675SEmmanuel Vadot #define GCC_USB_30_BCR 5 221*01950c46SEmmanuel Vadot #define GCC_MDSS_BCR 6 222*01950c46SEmmanuel Vadot #define GCC_CRYPTO_BCR 7 223*01950c46SEmmanuel Vadot #define GCC_SDCC1_BCR 8 224*01950c46SEmmanuel Vadot #define GCC_SDCC2_BCR 9 225354d7675SEmmanuel Vadot 226354d7675SEmmanuel Vadot /* GDSCs */ 227354d7675SEmmanuel Vadot #define CPP_GDSC 0 228354d7675SEmmanuel Vadot #define JPEG_GDSC 1 229354d7675SEmmanuel Vadot #define MDSS_GDSC 2 230354d7675SEmmanuel Vadot #define OXILI_CX_GDSC 3 231354d7675SEmmanuel Vadot #define OXILI_GX_GDSC 4 232354d7675SEmmanuel Vadot #define USB30_GDSC 5 233354d7675SEmmanuel Vadot #define VENUS_CORE0_GDSC 6 234354d7675SEmmanuel Vadot #define VENUS_GDSC 7 235354d7675SEmmanuel Vadot #define VFE0_GDSC 8 236354d7675SEmmanuel Vadot #define VFE1_GDSC 9 237354d7675SEmmanuel Vadot 238354d7675SEmmanuel Vadot #endif 239