1c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ 2c66ec88fSEmmanuel Vadot 3c66ec88fSEmmanuel Vadot #ifndef DT_BINDINGS_ASPEED_CLOCK_H 4c66ec88fSEmmanuel Vadot #define DT_BINDINGS_ASPEED_CLOCK_H 5c66ec88fSEmmanuel Vadot 6c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_ECLK 0 7c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_GCLK 1 8c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_MCLK 2 9c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_VCLK 3 10c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_BCLK 4 11c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_DCLK 5 12c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_REFCLK 6 13c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_USBPORT2CLK 7 14c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_LCLK 8 15c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_USBUHCICLK 9 16c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_D1CLK 10 17c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_YCLK 11 18c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_USBPORT1CLK 12 19c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_UART1CLK 13 20c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_UART2CLK 14 21c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_UART5CLK 15 22c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_ESPICLK 16 23c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_MAC1CLK 17 24c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_MAC2CLK 18 25c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_RSACLK 19 26c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_UART3CLK 20 27c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_UART4CLK 21 28c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_SDCLK 22 29c66ec88fSEmmanuel Vadot #define ASPEED_CLK_GATE_LHCCLK 23 30c66ec88fSEmmanuel Vadot #define ASPEED_CLK_HPLL 24 31c66ec88fSEmmanuel Vadot #define ASPEED_CLK_AHB 25 32c66ec88fSEmmanuel Vadot #define ASPEED_CLK_APB 26 33c66ec88fSEmmanuel Vadot #define ASPEED_CLK_UART 27 34c66ec88fSEmmanuel Vadot #define ASPEED_CLK_SDIO 28 35c66ec88fSEmmanuel Vadot #define ASPEED_CLK_ECLK 29 36c66ec88fSEmmanuel Vadot #define ASPEED_CLK_ECLK_MUX 30 37c66ec88fSEmmanuel Vadot #define ASPEED_CLK_LHCLK 31 38c66ec88fSEmmanuel Vadot #define ASPEED_CLK_MAC 32 39c66ec88fSEmmanuel Vadot #define ASPEED_CLK_BCLK 33 40c66ec88fSEmmanuel Vadot #define ASPEED_CLK_MPLL 34 41c66ec88fSEmmanuel Vadot #define ASPEED_CLK_24M 35 42c66ec88fSEmmanuel Vadot #define ASPEED_CLK_MAC1RCLK 36 43c66ec88fSEmmanuel Vadot #define ASPEED_CLK_MAC2RCLK 37 44c66ec88fSEmmanuel Vadot 45c66ec88fSEmmanuel Vadot #define ASPEED_RESET_XDMA 0 46c66ec88fSEmmanuel Vadot #define ASPEED_RESET_MCTP 1 47c66ec88fSEmmanuel Vadot #define ASPEED_RESET_ADC 2 48c66ec88fSEmmanuel Vadot #define ASPEED_RESET_JTAG_MASTER 3 49c66ec88fSEmmanuel Vadot #define ASPEED_RESET_MIC 4 50c66ec88fSEmmanuel Vadot #define ASPEED_RESET_PWM 5 51c66ec88fSEmmanuel Vadot #define ASPEED_RESET_PECI 6 52c66ec88fSEmmanuel Vadot #define ASPEED_RESET_I2C 7 53c66ec88fSEmmanuel Vadot #define ASPEED_RESET_AHB 8 54c66ec88fSEmmanuel Vadot #define ASPEED_RESET_CRT1 9 55*7ef62cebSEmmanuel Vadot #define ASPEED_RESET_HACE 10 56c66ec88fSEmmanuel Vadot 57c66ec88fSEmmanuel Vadot #endif 58