1a159c266SJung-uk Kim /****************************************************************************** 2a159c266SJung-uk Kim * 3a159c266SJung-uk Kim * Name: hwsleep.c - ACPI Hardware Sleep/Wake Support functions for the 4a159c266SJung-uk Kim * original/legacy sleep/PM registers. 5a159c266SJung-uk Kim * 6a159c266SJung-uk Kim *****************************************************************************/ 7a159c266SJung-uk Kim 80d84335fSJung-uk Kim /****************************************************************************** 90d84335fSJung-uk Kim * 100d84335fSJung-uk Kim * 1. Copyright Notice 110d84335fSJung-uk Kim * 12*804fe266SJung-uk Kim * Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp. 13a159c266SJung-uk Kim * All rights reserved. 14a159c266SJung-uk Kim * 150d84335fSJung-uk Kim * 2. License 160d84335fSJung-uk Kim * 170d84335fSJung-uk Kim * 2.1. This is your license from Intel Corp. under its intellectual property 180d84335fSJung-uk Kim * rights. You may have additional license terms from the party that provided 190d84335fSJung-uk Kim * you this software, covering your right to use that party's intellectual 200d84335fSJung-uk Kim * property rights. 210d84335fSJung-uk Kim * 220d84335fSJung-uk Kim * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 230d84335fSJung-uk Kim * copy of the source code appearing in this file ("Covered Code") an 240d84335fSJung-uk Kim * irrevocable, perpetual, worldwide license under Intel's copyrights in the 250d84335fSJung-uk Kim * base code distributed originally by Intel ("Original Intel Code") to copy, 260d84335fSJung-uk Kim * make derivatives, distribute, use and display any portion of the Covered 270d84335fSJung-uk Kim * Code in any form, with the right to sublicense such rights; and 280d84335fSJung-uk Kim * 290d84335fSJung-uk Kim * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 300d84335fSJung-uk Kim * license (with the right to sublicense), under only those claims of Intel 310d84335fSJung-uk Kim * patents that are infringed by the Original Intel Code, to make, use, sell, 320d84335fSJung-uk Kim * offer to sell, and import the Covered Code and derivative works thereof 330d84335fSJung-uk Kim * solely to the minimum extent necessary to exercise the above copyright 340d84335fSJung-uk Kim * license, and in no event shall the patent license extend to any additions 350d84335fSJung-uk Kim * to or modifications of the Original Intel Code. No other license or right 360d84335fSJung-uk Kim * is granted directly or by implication, estoppel or otherwise; 370d84335fSJung-uk Kim * 380d84335fSJung-uk Kim * The above copyright and patent license is granted only if the following 390d84335fSJung-uk Kim * conditions are met: 400d84335fSJung-uk Kim * 410d84335fSJung-uk Kim * 3. Conditions 420d84335fSJung-uk Kim * 430d84335fSJung-uk Kim * 3.1. Redistribution of Source with Rights to Further Distribute Source. 440d84335fSJung-uk Kim * Redistribution of source code of any substantial portion of the Covered 450d84335fSJung-uk Kim * Code or modification with rights to further distribute source must include 460d84335fSJung-uk Kim * the above Copyright Notice, the above License, this list of Conditions, 470d84335fSJung-uk Kim * and the following Disclaimer and Export Compliance provision. In addition, 480d84335fSJung-uk Kim * Licensee must cause all Covered Code to which Licensee contributes to 490d84335fSJung-uk Kim * contain a file documenting the changes Licensee made to create that Covered 500d84335fSJung-uk Kim * Code and the date of any change. Licensee must include in that file the 510d84335fSJung-uk Kim * documentation of any changes made by any predecessor Licensee. Licensee 520d84335fSJung-uk Kim * must include a prominent statement that the modification is derived, 530d84335fSJung-uk Kim * directly or indirectly, from Original Intel Code. 540d84335fSJung-uk Kim * 550d84335fSJung-uk Kim * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 560d84335fSJung-uk Kim * Redistribution of source code of any substantial portion of the Covered 570d84335fSJung-uk Kim * Code or modification without rights to further distribute source must 580d84335fSJung-uk Kim * include the following Disclaimer and Export Compliance provision in the 590d84335fSJung-uk Kim * documentation and/or other materials provided with distribution. In 600d84335fSJung-uk Kim * addition, Licensee may not authorize further sublicense of source of any 610d84335fSJung-uk Kim * portion of the Covered Code, and must include terms to the effect that the 620d84335fSJung-uk Kim * license from Licensee to its licensee is limited to the intellectual 630d84335fSJung-uk Kim * property embodied in the software Licensee provides to its licensee, and 640d84335fSJung-uk Kim * not to intellectual property embodied in modifications its licensee may 650d84335fSJung-uk Kim * make. 660d84335fSJung-uk Kim * 670d84335fSJung-uk Kim * 3.3. Redistribution of Executable. Redistribution in executable form of any 680d84335fSJung-uk Kim * substantial portion of the Covered Code or modification must reproduce the 690d84335fSJung-uk Kim * above Copyright Notice, and the following Disclaimer and Export Compliance 700d84335fSJung-uk Kim * provision in the documentation and/or other materials provided with the 710d84335fSJung-uk Kim * distribution. 720d84335fSJung-uk Kim * 730d84335fSJung-uk Kim * 3.4. Intel retains all right, title, and interest in and to the Original 740d84335fSJung-uk Kim * Intel Code. 750d84335fSJung-uk Kim * 760d84335fSJung-uk Kim * 3.5. Neither the name Intel nor any other trademark owned or controlled by 770d84335fSJung-uk Kim * Intel shall be used in advertising or otherwise to promote the sale, use or 780d84335fSJung-uk Kim * other dealings in products derived from or relating to the Covered Code 790d84335fSJung-uk Kim * without prior written authorization from Intel. 800d84335fSJung-uk Kim * 810d84335fSJung-uk Kim * 4. Disclaimer and Export Compliance 820d84335fSJung-uk Kim * 830d84335fSJung-uk Kim * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 840d84335fSJung-uk Kim * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 850d84335fSJung-uk Kim * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 860d84335fSJung-uk Kim * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 870d84335fSJung-uk Kim * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 880d84335fSJung-uk Kim * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 890d84335fSJung-uk Kim * PARTICULAR PURPOSE. 900d84335fSJung-uk Kim * 910d84335fSJung-uk Kim * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 920d84335fSJung-uk Kim * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 930d84335fSJung-uk Kim * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 940d84335fSJung-uk Kim * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 950d84335fSJung-uk Kim * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 960d84335fSJung-uk Kim * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 970d84335fSJung-uk Kim * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 980d84335fSJung-uk Kim * LIMITED REMEDY. 990d84335fSJung-uk Kim * 1000d84335fSJung-uk Kim * 4.3. Licensee shall not export, either directly or indirectly, any of this 1010d84335fSJung-uk Kim * software or system incorporating such software without first obtaining any 1020d84335fSJung-uk Kim * required license or other approval from the U. S. Department of Commerce or 1030d84335fSJung-uk Kim * any other agency or department of the United States Government. In the 1040d84335fSJung-uk Kim * event Licensee exports any such software from the United States or 1050d84335fSJung-uk Kim * re-exports any such software from a foreign destination, Licensee shall 1060d84335fSJung-uk Kim * ensure that the distribution and export/re-export of the software is in 1070d84335fSJung-uk Kim * compliance with all laws, regulations, orders, or other restrictions of the 1080d84335fSJung-uk Kim * U.S. Export Administration Regulations. Licensee agrees that neither it nor 1090d84335fSJung-uk Kim * any of its subsidiaries will export/re-export any technical data, process, 1100d84335fSJung-uk Kim * software, or service, directly or indirectly, to any country for which the 1110d84335fSJung-uk Kim * United States government or any agency thereof requires an export license, 1120d84335fSJung-uk Kim * other governmental approval, or letter of assurance, without first obtaining 1130d84335fSJung-uk Kim * such license, approval or letter. 1140d84335fSJung-uk Kim * 1150d84335fSJung-uk Kim ***************************************************************************** 1160d84335fSJung-uk Kim * 1170d84335fSJung-uk Kim * Alternatively, you may choose to be licensed under the terms of the 1180d84335fSJung-uk Kim * following license: 1190d84335fSJung-uk Kim * 120a159c266SJung-uk Kim * Redistribution and use in source and binary forms, with or without 121a159c266SJung-uk Kim * modification, are permitted provided that the following conditions 122a159c266SJung-uk Kim * are met: 123a159c266SJung-uk Kim * 1. Redistributions of source code must retain the above copyright 124a159c266SJung-uk Kim * notice, this list of conditions, and the following disclaimer, 125a159c266SJung-uk Kim * without modification. 126a159c266SJung-uk Kim * 2. Redistributions in binary form must reproduce at minimum a disclaimer 127a159c266SJung-uk Kim * substantially similar to the "NO WARRANTY" disclaimer below 128a159c266SJung-uk Kim * ("Disclaimer") and any redistribution must be conditioned upon 129a159c266SJung-uk Kim * including a substantially similar Disclaimer requirement for further 130a159c266SJung-uk Kim * binary redistribution. 131a159c266SJung-uk Kim * 3. Neither the names of the above-listed copyright holders nor the names 132a159c266SJung-uk Kim * of any contributors may be used to endorse or promote products derived 133a159c266SJung-uk Kim * from this software without specific prior written permission. 134a159c266SJung-uk Kim * 1350d84335fSJung-uk Kim * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1360d84335fSJung-uk Kim * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1370d84335fSJung-uk Kim * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1380d84335fSJung-uk Kim * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 1390d84335fSJung-uk Kim * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 1400d84335fSJung-uk Kim * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 1410d84335fSJung-uk Kim * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 1420d84335fSJung-uk Kim * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 1430d84335fSJung-uk Kim * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 1440d84335fSJung-uk Kim * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 1450d84335fSJung-uk Kim * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 1460d84335fSJung-uk Kim * 1470d84335fSJung-uk Kim * Alternatively, you may choose to be licensed under the terms of the 148a159c266SJung-uk Kim * GNU General Public License ("GPL") version 2 as published by the Free 149a159c266SJung-uk Kim * Software Foundation. 150a159c266SJung-uk Kim * 1510d84335fSJung-uk Kim *****************************************************************************/ 152a159c266SJung-uk Kim 153a159c266SJung-uk Kim #include <contrib/dev/acpica/include/acpi.h> 154a159c266SJung-uk Kim #include <contrib/dev/acpica/include/accommon.h> 155a159c266SJung-uk Kim 156a159c266SJung-uk Kim #define _COMPONENT ACPI_HARDWARE 157a159c266SJung-uk Kim ACPI_MODULE_NAME ("hwsleep") 158a159c266SJung-uk Kim 159a159c266SJung-uk Kim 160a159c266SJung-uk Kim #if (!ACPI_REDUCED_HARDWARE) /* Entire module */ 161a159c266SJung-uk Kim /******************************************************************************* 162a159c266SJung-uk Kim * 163a159c266SJung-uk Kim * FUNCTION: AcpiHwLegacySleep 164a159c266SJung-uk Kim * 165a159c266SJung-uk Kim * PARAMETERS: SleepState - Which sleep state to enter 166a159c266SJung-uk Kim * 167a159c266SJung-uk Kim * RETURN: Status 168a159c266SJung-uk Kim * 169a159c266SJung-uk Kim * DESCRIPTION: Enter a system sleep state via the legacy FADT PM registers 170a159c266SJung-uk Kim * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED 171a159c266SJung-uk Kim * 172a159c266SJung-uk Kim ******************************************************************************/ 173a159c266SJung-uk Kim 174a159c266SJung-uk Kim ACPI_STATUS 175a159c266SJung-uk Kim AcpiHwLegacySleep ( 1761df130f1SJung-uk Kim UINT8 SleepState) 177a159c266SJung-uk Kim { 178a159c266SJung-uk Kim ACPI_BIT_REGISTER_INFO *SleepTypeRegInfo; 179a159c266SJung-uk Kim ACPI_BIT_REGISTER_INFO *SleepEnableRegInfo; 180a159c266SJung-uk Kim UINT32 Pm1aControl; 181a159c266SJung-uk Kim UINT32 Pm1bControl; 182a159c266SJung-uk Kim UINT32 InValue; 183a159c266SJung-uk Kim ACPI_STATUS Status; 184a159c266SJung-uk Kim 185a159c266SJung-uk Kim 186a159c266SJung-uk Kim ACPI_FUNCTION_TRACE (HwLegacySleep); 187a159c266SJung-uk Kim 188a159c266SJung-uk Kim 189a159c266SJung-uk Kim SleepTypeRegInfo = AcpiHwGetBitRegisterInfo (ACPI_BITREG_SLEEP_TYPE); 190a159c266SJung-uk Kim SleepEnableRegInfo = AcpiHwGetBitRegisterInfo (ACPI_BITREG_SLEEP_ENABLE); 191a159c266SJung-uk Kim 192a159c266SJung-uk Kim /* Clear wake status */ 193a159c266SJung-uk Kim 194f8146b88SJung-uk Kim Status = AcpiWriteBitRegister (ACPI_BITREG_WAKE_STATUS, 195f8146b88SJung-uk Kim ACPI_CLEAR_STATUS); 196a159c266SJung-uk Kim if (ACPI_FAILURE (Status)) 197a159c266SJung-uk Kim { 198a159c266SJung-uk Kim return_ACPI_STATUS (Status); 199a159c266SJung-uk Kim } 200a159c266SJung-uk Kim 20151f42badSJung-uk Kim /* Disable all GPEs */ 20251f42badSJung-uk Kim 203a159c266SJung-uk Kim Status = AcpiHwDisableAllGpes (); 204a159c266SJung-uk Kim if (ACPI_FAILURE (Status)) 205a159c266SJung-uk Kim { 206a159c266SJung-uk Kim return_ACPI_STATUS (Status); 207a159c266SJung-uk Kim } 20851f42badSJung-uk Kim Status = AcpiHwClearAcpiStatus(); 20951f42badSJung-uk Kim if (ACPI_FAILURE(Status)) 21051f42badSJung-uk Kim { 21151f42badSJung-uk Kim return_ACPI_STATUS(Status); 21251f42badSJung-uk Kim } 213a159c266SJung-uk Kim AcpiGbl_SystemAwakeAndRunning = FALSE; 214a159c266SJung-uk Kim 21551f42badSJung-uk Kim /* Enable all wakeup GPEs */ 21651f42badSJung-uk Kim 217a159c266SJung-uk Kim Status = AcpiHwEnableAllWakeupGpes (); 218a159c266SJung-uk Kim if (ACPI_FAILURE (Status)) 219a159c266SJung-uk Kim { 220a159c266SJung-uk Kim return_ACPI_STATUS (Status); 221a159c266SJung-uk Kim } 222a159c266SJung-uk Kim 223a159c266SJung-uk Kim /* Get current value of PM1A control */ 224a159c266SJung-uk Kim 225a159c266SJung-uk Kim Status = AcpiHwRegisterRead (ACPI_REGISTER_PM1_CONTROL, 226a159c266SJung-uk Kim &Pm1aControl); 227a159c266SJung-uk Kim if (ACPI_FAILURE (Status)) 228a159c266SJung-uk Kim { 229a159c266SJung-uk Kim return_ACPI_STATUS (Status); 230a159c266SJung-uk Kim } 231a159c266SJung-uk Kim ACPI_DEBUG_PRINT ((ACPI_DB_INIT, 232a159c266SJung-uk Kim "Entering sleep state [S%u]\n", SleepState)); 233a159c266SJung-uk Kim 234a159c266SJung-uk Kim /* Clear the SLP_EN and SLP_TYP fields */ 235a159c266SJung-uk Kim 236a159c266SJung-uk Kim Pm1aControl &= ~(SleepTypeRegInfo->AccessBitMask | 237a159c266SJung-uk Kim SleepEnableRegInfo->AccessBitMask); 238a159c266SJung-uk Kim Pm1bControl = Pm1aControl; 239a159c266SJung-uk Kim 240a159c266SJung-uk Kim /* Insert the SLP_TYP bits */ 241a159c266SJung-uk Kim 242a159c266SJung-uk Kim Pm1aControl |= (AcpiGbl_SleepTypeA << SleepTypeRegInfo->BitPosition); 243a159c266SJung-uk Kim Pm1bControl |= (AcpiGbl_SleepTypeB << SleepTypeRegInfo->BitPosition); 244a159c266SJung-uk Kim 245a159c266SJung-uk Kim /* 246a159c266SJung-uk Kim * We split the writes of SLP_TYP and SLP_EN to workaround 247a159c266SJung-uk Kim * poorly implemented hardware. 248a159c266SJung-uk Kim */ 249a159c266SJung-uk Kim 250a159c266SJung-uk Kim /* Write #1: write the SLP_TYP data to the PM1 Control registers */ 251a159c266SJung-uk Kim 252a159c266SJung-uk Kim Status = AcpiHwWritePm1Control (Pm1aControl, Pm1bControl); 253a159c266SJung-uk Kim if (ACPI_FAILURE (Status)) 254a159c266SJung-uk Kim { 255a159c266SJung-uk Kim return_ACPI_STATUS (Status); 256a159c266SJung-uk Kim } 257a159c266SJung-uk Kim 258a159c266SJung-uk Kim /* Insert the sleep enable (SLP_EN) bit */ 259a159c266SJung-uk Kim 260a159c266SJung-uk Kim Pm1aControl |= SleepEnableRegInfo->AccessBitMask; 261a159c266SJung-uk Kim Pm1bControl |= SleepEnableRegInfo->AccessBitMask; 262a159c266SJung-uk Kim 263a159c266SJung-uk Kim /* Flush caches, as per ACPI specification */ 264a159c266SJung-uk Kim 265ab71bbb7SJung-uk Kim if (SleepState < ACPI_STATE_S4) 266ab71bbb7SJung-uk Kim { 267a159c266SJung-uk Kim ACPI_FLUSH_CPU_CACHE (); 268ab71bbb7SJung-uk Kim } 269a159c266SJung-uk Kim 27028482948SJung-uk Kim Status = AcpiOsEnterSleep (SleepState, Pm1aControl, Pm1bControl); 27128482948SJung-uk Kim if (Status == AE_CTRL_TERMINATE) 27228482948SJung-uk Kim { 27328482948SJung-uk Kim return_ACPI_STATUS (AE_OK); 27428482948SJung-uk Kim } 27528482948SJung-uk Kim if (ACPI_FAILURE (Status)) 27628482948SJung-uk Kim { 27728482948SJung-uk Kim return_ACPI_STATUS (Status); 27828482948SJung-uk Kim } 27928482948SJung-uk Kim 280a159c266SJung-uk Kim /* Write #2: Write both SLP_TYP + SLP_EN */ 281a159c266SJung-uk Kim 282a159c266SJung-uk Kim Status = AcpiHwWritePm1Control (Pm1aControl, Pm1bControl); 283a159c266SJung-uk Kim if (ACPI_FAILURE (Status)) 284a159c266SJung-uk Kim { 285a159c266SJung-uk Kim return_ACPI_STATUS (Status); 286a159c266SJung-uk Kim } 287a159c266SJung-uk Kim 288a159c266SJung-uk Kim if (SleepState > ACPI_STATE_S3) 289a159c266SJung-uk Kim { 290a159c266SJung-uk Kim /* 291a159c266SJung-uk Kim * We wanted to sleep > S3, but it didn't happen (by virtue of the 292a159c266SJung-uk Kim * fact that we are still executing!) 293a159c266SJung-uk Kim * 294a159c266SJung-uk Kim * Wait ten seconds, then try again. This is to get S4/S5 to work on 295a159c266SJung-uk Kim * all machines. 296a159c266SJung-uk Kim * 297a159c266SJung-uk Kim * We wait so long to allow chipsets that poll this reg very slowly 298a159c266SJung-uk Kim * to still read the right value. Ideally, this block would go 299a159c266SJung-uk Kim * away entirely. 300a159c266SJung-uk Kim */ 301efcc2a30SJung-uk Kim AcpiOsStall (10 * ACPI_USEC_PER_SEC); 302a159c266SJung-uk Kim 303a159c266SJung-uk Kim Status = AcpiHwRegisterWrite (ACPI_REGISTER_PM1_CONTROL, 304a159c266SJung-uk Kim SleepEnableRegInfo->AccessBitMask); 305a159c266SJung-uk Kim if (ACPI_FAILURE (Status)) 306a159c266SJung-uk Kim { 307a159c266SJung-uk Kim return_ACPI_STATUS (Status); 308a159c266SJung-uk Kim } 309a159c266SJung-uk Kim } 310a159c266SJung-uk Kim 311a159c266SJung-uk Kim /* Wait for transition back to Working State */ 312a159c266SJung-uk Kim 313a159c266SJung-uk Kim do 314a159c266SJung-uk Kim { 315a159c266SJung-uk Kim Status = AcpiReadBitRegister (ACPI_BITREG_WAKE_STATUS, &InValue); 316a159c266SJung-uk Kim if (ACPI_FAILURE (Status)) 317a159c266SJung-uk Kim { 318a159c266SJung-uk Kim return_ACPI_STATUS (Status); 319a159c266SJung-uk Kim } 320a159c266SJung-uk Kim 321a159c266SJung-uk Kim } while (!InValue); 322a159c266SJung-uk Kim 323a159c266SJung-uk Kim return_ACPI_STATUS (AE_OK); 324a159c266SJung-uk Kim } 325a159c266SJung-uk Kim 326a159c266SJung-uk Kim 327a159c266SJung-uk Kim /******************************************************************************* 328a159c266SJung-uk Kim * 329a159c266SJung-uk Kim * FUNCTION: AcpiHwLegacyWakePrep 330a159c266SJung-uk Kim * 331a159c266SJung-uk Kim * PARAMETERS: SleepState - Which sleep state we just exited 332a159c266SJung-uk Kim * 333a159c266SJung-uk Kim * RETURN: Status 334a159c266SJung-uk Kim * 335a159c266SJung-uk Kim * DESCRIPTION: Perform the first state of OS-independent ACPI cleanup after a 336a159c266SJung-uk Kim * sleep. 337a159c266SJung-uk Kim * Called with interrupts ENABLED. 338a159c266SJung-uk Kim * 339a159c266SJung-uk Kim ******************************************************************************/ 340a159c266SJung-uk Kim 341a159c266SJung-uk Kim ACPI_STATUS 342a159c266SJung-uk Kim AcpiHwLegacyWakePrep ( 3431df130f1SJung-uk Kim UINT8 SleepState) 344a159c266SJung-uk Kim { 3451b7a2680SJung-uk Kim ACPI_STATUS Status = AE_OK; 346a159c266SJung-uk Kim ACPI_BIT_REGISTER_INFO *SleepTypeRegInfo; 347a159c266SJung-uk Kim ACPI_BIT_REGISTER_INFO *SleepEnableRegInfo; 348a159c266SJung-uk Kim UINT32 Pm1aControl; 349a159c266SJung-uk Kim UINT32 Pm1bControl; 350a159c266SJung-uk Kim 351a159c266SJung-uk Kim 352a159c266SJung-uk Kim ACPI_FUNCTION_TRACE (HwLegacyWakePrep); 353a159c266SJung-uk Kim 354a159c266SJung-uk Kim /* 355a159c266SJung-uk Kim * Set SLP_TYPE and SLP_EN to state S0. 356a159c266SJung-uk Kim * This is unclear from the ACPI Spec, but it is required 357a159c266SJung-uk Kim * by some machines. 358a159c266SJung-uk Kim */ 3591b7a2680SJung-uk Kim if (AcpiGbl_SleepTypeAS0 != ACPI_SLEEP_TYPE_INVALID) 360a159c266SJung-uk Kim { 361a159c266SJung-uk Kim SleepTypeRegInfo = 362a159c266SJung-uk Kim AcpiHwGetBitRegisterInfo (ACPI_BITREG_SLEEP_TYPE); 363a159c266SJung-uk Kim SleepEnableRegInfo = 364a159c266SJung-uk Kim AcpiHwGetBitRegisterInfo (ACPI_BITREG_SLEEP_ENABLE); 365a159c266SJung-uk Kim 366a159c266SJung-uk Kim /* Get current value of PM1A control */ 367a159c266SJung-uk Kim 368a159c266SJung-uk Kim Status = AcpiHwRegisterRead (ACPI_REGISTER_PM1_CONTROL, 369a159c266SJung-uk Kim &Pm1aControl); 370a159c266SJung-uk Kim if (ACPI_SUCCESS (Status)) 371a159c266SJung-uk Kim { 372a159c266SJung-uk Kim /* Clear the SLP_EN and SLP_TYP fields */ 373a159c266SJung-uk Kim 374a159c266SJung-uk Kim Pm1aControl &= ~(SleepTypeRegInfo->AccessBitMask | 375a159c266SJung-uk Kim SleepEnableRegInfo->AccessBitMask); 376a159c266SJung-uk Kim Pm1bControl = Pm1aControl; 377a159c266SJung-uk Kim 378a159c266SJung-uk Kim /* Insert the SLP_TYP bits */ 379a159c266SJung-uk Kim 3801b7a2680SJung-uk Kim Pm1aControl |= (AcpiGbl_SleepTypeAS0 << 381a159c266SJung-uk Kim SleepTypeRegInfo->BitPosition); 382ab71bbb7SJung-uk Kim Pm1bControl |= (AcpiGbl_SleepTypeBS0 << 383a159c266SJung-uk Kim SleepTypeRegInfo->BitPosition); 384a159c266SJung-uk Kim 385a159c266SJung-uk Kim /* Write the control registers and ignore any errors */ 386a159c266SJung-uk Kim 387a159c266SJung-uk Kim (void) AcpiHwWritePm1Control (Pm1aControl, Pm1bControl); 388a159c266SJung-uk Kim } 389a159c266SJung-uk Kim } 390a159c266SJung-uk Kim 391a159c266SJung-uk Kim return_ACPI_STATUS (Status); 392a159c266SJung-uk Kim } 393a159c266SJung-uk Kim 394a159c266SJung-uk Kim 395a159c266SJung-uk Kim /******************************************************************************* 396a159c266SJung-uk Kim * 397a159c266SJung-uk Kim * FUNCTION: AcpiHwLegacyWake 398a159c266SJung-uk Kim * 399a159c266SJung-uk Kim * PARAMETERS: SleepState - Which sleep state we just exited 400a159c266SJung-uk Kim * 401a159c266SJung-uk Kim * RETURN: Status 402a159c266SJung-uk Kim * 403a159c266SJung-uk Kim * DESCRIPTION: Perform OS-independent ACPI cleanup after a sleep 404a159c266SJung-uk Kim * Called with interrupts ENABLED. 405a159c266SJung-uk Kim * 406a159c266SJung-uk Kim ******************************************************************************/ 407a159c266SJung-uk Kim 408a159c266SJung-uk Kim ACPI_STATUS 409a159c266SJung-uk Kim AcpiHwLegacyWake ( 4101df130f1SJung-uk Kim UINT8 SleepState) 411a159c266SJung-uk Kim { 412a159c266SJung-uk Kim ACPI_STATUS Status; 413a159c266SJung-uk Kim 414a159c266SJung-uk Kim 415a159c266SJung-uk Kim ACPI_FUNCTION_TRACE (HwLegacyWake); 416a159c266SJung-uk Kim 417a159c266SJung-uk Kim 418a159c266SJung-uk Kim /* Ensure EnterSleepStatePrep -> EnterSleepState ordering */ 419a159c266SJung-uk Kim 420a159c266SJung-uk Kim AcpiGbl_SleepTypeA = ACPI_SLEEP_TYPE_INVALID; 4214c52cad2SJung-uk Kim AcpiHwExecuteSleepMethod (METHOD_PATHNAME__SST, ACPI_SST_WAKING); 422a159c266SJung-uk Kim 423a159c266SJung-uk Kim /* 424a159c266SJung-uk Kim * GPEs must be enabled before _WAK is called as GPEs 425a159c266SJung-uk Kim * might get fired there 426a159c266SJung-uk Kim * 427a159c266SJung-uk Kim * Restore the GPEs: 4288438a7a8SJung-uk Kim * 1) Disable all GPEs 429a159c266SJung-uk Kim * 2) Enable all runtime GPEs 430a159c266SJung-uk Kim */ 431a159c266SJung-uk Kim Status = AcpiHwDisableAllGpes (); 432a159c266SJung-uk Kim if (ACPI_FAILURE (Status)) 433a159c266SJung-uk Kim { 434a159c266SJung-uk Kim return_ACPI_STATUS (Status); 435a159c266SJung-uk Kim } 436a159c266SJung-uk Kim 437a159c266SJung-uk Kim Status = AcpiHwEnableAllRuntimeGpes (); 438a159c266SJung-uk Kim if (ACPI_FAILURE (Status)) 439a159c266SJung-uk Kim { 440a159c266SJung-uk Kim return_ACPI_STATUS (Status); 441a159c266SJung-uk Kim } 442a159c266SJung-uk Kim 443a159c266SJung-uk Kim /* 444a159c266SJung-uk Kim * Now we can execute _WAK, etc. Some machines require that the GPEs 445a159c266SJung-uk Kim * are enabled before the wake methods are executed. 446a159c266SJung-uk Kim */ 4474c52cad2SJung-uk Kim AcpiHwExecuteSleepMethod (METHOD_PATHNAME__WAK, SleepState); 448a159c266SJung-uk Kim 449a159c266SJung-uk Kim /* 450a159c266SJung-uk Kim * Some BIOS code assumes that WAK_STS will be cleared on resume 451a159c266SJung-uk Kim * and use it to determine whether the system is rebooting or 452a159c266SJung-uk Kim * resuming. Clear WAK_STS for compatibility. 453a159c266SJung-uk Kim */ 454f8146b88SJung-uk Kim (void) AcpiWriteBitRegister (ACPI_BITREG_WAKE_STATUS, 455f8146b88SJung-uk Kim ACPI_CLEAR_STATUS); 456a159c266SJung-uk Kim AcpiGbl_SystemAwakeAndRunning = TRUE; 457a159c266SJung-uk Kim 458a159c266SJung-uk Kim /* Enable power button */ 459a159c266SJung-uk Kim 460a159c266SJung-uk Kim (void) AcpiWriteBitRegister( 461a159c266SJung-uk Kim AcpiGbl_FixedEventInfo[ACPI_EVENT_POWER_BUTTON].EnableRegisterId, 462a159c266SJung-uk Kim ACPI_ENABLE_EVENT); 463a159c266SJung-uk Kim 464a159c266SJung-uk Kim (void) AcpiWriteBitRegister( 465a159c266SJung-uk Kim AcpiGbl_FixedEventInfo[ACPI_EVENT_POWER_BUTTON].StatusRegisterId, 466a159c266SJung-uk Kim ACPI_CLEAR_STATUS); 467a159c266SJung-uk Kim 468ec0234b4SJung-uk Kim /* Enable sleep button */ 469ec0234b4SJung-uk Kim 470ec0234b4SJung-uk Kim (void) AcpiWriteBitRegister ( 471ec0234b4SJung-uk Kim AcpiGbl_FixedEventInfo[ACPI_EVENT_SLEEP_BUTTON].EnableRegisterId, 472ec0234b4SJung-uk Kim ACPI_ENABLE_EVENT); 473ec0234b4SJung-uk Kim 474ec0234b4SJung-uk Kim (void) AcpiWriteBitRegister ( 475ec0234b4SJung-uk Kim AcpiGbl_FixedEventInfo[ACPI_EVENT_SLEEP_BUTTON].StatusRegisterId, 476ec0234b4SJung-uk Kim ACPI_CLEAR_STATUS); 477ec0234b4SJung-uk Kim 4784c52cad2SJung-uk Kim AcpiHwExecuteSleepMethod (METHOD_PATHNAME__SST, ACPI_SST_WORKING); 479a159c266SJung-uk Kim return_ACPI_STATUS (Status); 480a159c266SJung-uk Kim } 481a159c266SJung-uk Kim 482a159c266SJung-uk Kim #endif /* !ACPI_REDUCED_HARDWARE */ 483