10b57cec5SDimitry Andric //===--------------------- SchedulerStatistics.cpp --------------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric /// \file 90b57cec5SDimitry Andric /// 100b57cec5SDimitry Andric /// This file implements the SchedulerStatistics interface. 110b57cec5SDimitry Andric /// 120b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric #include "Views/SchedulerStatistics.h" 150b57cec5SDimitry Andric #include "llvm/Support/Format.h" 160b57cec5SDimitry Andric #include "llvm/Support/FormattedStream.h" 170b57cec5SDimitry Andric 180b57cec5SDimitry Andric namespace llvm { 190b57cec5SDimitry Andric namespace mca { 200b57cec5SDimitry Andric 210b57cec5SDimitry Andric SchedulerStatistics::SchedulerStatistics(const llvm::MCSubtargetInfo &STI) 220b57cec5SDimitry Andric : SM(STI.getSchedModel()), LQResourceID(0), SQResourceID(0), NumIssued(0), 230b57cec5SDimitry Andric NumCycles(0), MostRecentLoadDispatched(~0U), 240b57cec5SDimitry Andric MostRecentStoreDispatched(~0U), 250b57cec5SDimitry Andric Usage(STI.getSchedModel().NumProcResourceKinds, {0, 0, 0}) { 260b57cec5SDimitry Andric if (SM.hasExtraProcessorInfo()) { 270b57cec5SDimitry Andric const MCExtraProcessorInfo &EPI = SM.getExtraProcessorInfo(); 280b57cec5SDimitry Andric LQResourceID = EPI.LoadQueueID; 290b57cec5SDimitry Andric SQResourceID = EPI.StoreQueueID; 300b57cec5SDimitry Andric } 310b57cec5SDimitry Andric } 320b57cec5SDimitry Andric 330b57cec5SDimitry Andric // FIXME: This implementation works under the assumption that load/store queue 340b57cec5SDimitry Andric // entries are reserved at 'instruction dispatched' stage, and released at 350b57cec5SDimitry Andric // 'instruction executed' stage. This currently matches the behavior of LSUnit. 360b57cec5SDimitry Andric // 370b57cec5SDimitry Andric // The current design minimizes the number of events generated by the 380b57cec5SDimitry Andric // Dispatch/Execute stages, at the cost of doing extra bookkeeping in method 390b57cec5SDimitry Andric // `onEvent`. However, it introduces a subtle dependency between this view and 400b57cec5SDimitry Andric // how the LSUnit works. 410b57cec5SDimitry Andric // 420b57cec5SDimitry Andric // In future we should add a new "memory queue" event type, so that we stop 430b57cec5SDimitry Andric // making assumptions on how LSUnit internally works (See PR39828). 440b57cec5SDimitry Andric void SchedulerStatistics::onEvent(const HWInstructionEvent &Event) { 450b57cec5SDimitry Andric if (Event.Type == HWInstructionEvent::Issued) { 460b57cec5SDimitry Andric const Instruction &Inst = *Event.IR.getInstruction(); 470b57cec5SDimitry Andric NumIssued += Inst.getDesc().NumMicroOps; 480b57cec5SDimitry Andric } else if (Event.Type == HWInstructionEvent::Dispatched) { 490b57cec5SDimitry Andric const Instruction &Inst = *Event.IR.getInstruction(); 500b57cec5SDimitry Andric const unsigned Index = Event.IR.getSourceIndex(); 5181ad6265SDimitry Andric if (LQResourceID && Inst.getMayLoad() && 520b57cec5SDimitry Andric MostRecentLoadDispatched != Index) { 530b57cec5SDimitry Andric Usage[LQResourceID].SlotsInUse++; 540b57cec5SDimitry Andric MostRecentLoadDispatched = Index; 550b57cec5SDimitry Andric } 5681ad6265SDimitry Andric if (SQResourceID && Inst.getMayStore() && 570b57cec5SDimitry Andric MostRecentStoreDispatched != Index) { 580b57cec5SDimitry Andric Usage[SQResourceID].SlotsInUse++; 590b57cec5SDimitry Andric MostRecentStoreDispatched = Index; 600b57cec5SDimitry Andric } 610b57cec5SDimitry Andric } else if (Event.Type == HWInstructionEvent::Executed) { 620b57cec5SDimitry Andric const Instruction &Inst = *Event.IR.getInstruction(); 6381ad6265SDimitry Andric if (LQResourceID && Inst.getMayLoad()) { 640b57cec5SDimitry Andric assert(Usage[LQResourceID].SlotsInUse); 650b57cec5SDimitry Andric Usage[LQResourceID].SlotsInUse--; 660b57cec5SDimitry Andric } 6781ad6265SDimitry Andric if (SQResourceID && Inst.getMayStore()) { 680b57cec5SDimitry Andric assert(Usage[SQResourceID].SlotsInUse); 690b57cec5SDimitry Andric Usage[SQResourceID].SlotsInUse--; 700b57cec5SDimitry Andric } 710b57cec5SDimitry Andric } 720b57cec5SDimitry Andric } 730b57cec5SDimitry Andric 740b57cec5SDimitry Andric void SchedulerStatistics::onReservedBuffers(const InstRef & /* unused */, 750b57cec5SDimitry Andric ArrayRef<unsigned> Buffers) { 760b57cec5SDimitry Andric for (const unsigned Buffer : Buffers) { 770b57cec5SDimitry Andric if (Buffer == LQResourceID || Buffer == SQResourceID) 780b57cec5SDimitry Andric continue; 790b57cec5SDimitry Andric Usage[Buffer].SlotsInUse++; 800b57cec5SDimitry Andric } 810b57cec5SDimitry Andric } 820b57cec5SDimitry Andric 830b57cec5SDimitry Andric void SchedulerStatistics::onReleasedBuffers(const InstRef & /* unused */, 840b57cec5SDimitry Andric ArrayRef<unsigned> Buffers) { 850b57cec5SDimitry Andric for (const unsigned Buffer : Buffers) { 860b57cec5SDimitry Andric if (Buffer == LQResourceID || Buffer == SQResourceID) 870b57cec5SDimitry Andric continue; 880b57cec5SDimitry Andric Usage[Buffer].SlotsInUse--; 890b57cec5SDimitry Andric } 900b57cec5SDimitry Andric } 910b57cec5SDimitry Andric 920b57cec5SDimitry Andric void SchedulerStatistics::updateHistograms() { 930b57cec5SDimitry Andric for (BufferUsage &BU : Usage) { 940b57cec5SDimitry Andric BU.CumulativeNumUsedSlots += BU.SlotsInUse; 950b57cec5SDimitry Andric BU.MaxUsedSlots = std::max(BU.MaxUsedSlots, BU.SlotsInUse); 960b57cec5SDimitry Andric } 970b57cec5SDimitry Andric 980b57cec5SDimitry Andric IssueWidthPerCycle[NumIssued]++; 990b57cec5SDimitry Andric NumIssued = 0; 1000b57cec5SDimitry Andric } 1010b57cec5SDimitry Andric 1020b57cec5SDimitry Andric void SchedulerStatistics::printSchedulerStats(raw_ostream &OS) const { 1030b57cec5SDimitry Andric OS << "\n\nSchedulers - " 1040b57cec5SDimitry Andric << "number of cycles where we saw N micro opcodes issued:\n"; 1050b57cec5SDimitry Andric OS << "[# issued], [# cycles]\n"; 1060b57cec5SDimitry Andric 1070b57cec5SDimitry Andric bool HasColors = OS.has_colors(); 108*0fca6ea1SDimitry Andric const auto It = llvm::max_element(IssueWidthPerCycle); 109480093f4SDimitry Andric for (const std::pair<const unsigned, unsigned> &Entry : IssueWidthPerCycle) { 1100b57cec5SDimitry Andric unsigned NumIssued = Entry.first; 1110b57cec5SDimitry Andric if (NumIssued == It->first && HasColors) 1120b57cec5SDimitry Andric OS.changeColor(raw_ostream::SAVEDCOLOR, true, false); 1130b57cec5SDimitry Andric 1140b57cec5SDimitry Andric unsigned IPC = Entry.second; 1150b57cec5SDimitry Andric OS << " " << NumIssued << ", " << IPC << " (" 1160b57cec5SDimitry Andric << format("%.1f", ((double)IPC / NumCycles) * 100) << "%)\n"; 1170b57cec5SDimitry Andric if (HasColors) 1180b57cec5SDimitry Andric OS.resetColor(); 1190b57cec5SDimitry Andric } 1200b57cec5SDimitry Andric } 1210b57cec5SDimitry Andric 1220b57cec5SDimitry Andric void SchedulerStatistics::printSchedulerUsage(raw_ostream &OS) const { 1230b57cec5SDimitry Andric assert(NumCycles && "Unexpected number of cycles!"); 1240b57cec5SDimitry Andric 1250b57cec5SDimitry Andric OS << "\nScheduler's queue usage:\n"; 1260b57cec5SDimitry Andric if (all_of(Usage, [](const BufferUsage &BU) { return !BU.MaxUsedSlots; })) { 1270b57cec5SDimitry Andric OS << "No scheduler resources used.\n"; 1280b57cec5SDimitry Andric return; 1290b57cec5SDimitry Andric } 1300b57cec5SDimitry Andric 1310b57cec5SDimitry Andric OS << "[1] Resource name.\n" 1320b57cec5SDimitry Andric << "[2] Average number of used buffer entries.\n" 1330b57cec5SDimitry Andric << "[3] Maximum number of used buffer entries.\n" 1340b57cec5SDimitry Andric << "[4] Total number of buffer entries.\n\n" 1350b57cec5SDimitry Andric << " [1] [2] [3] [4]\n"; 1360b57cec5SDimitry Andric 1370b57cec5SDimitry Andric formatted_raw_ostream FOS(OS); 1380b57cec5SDimitry Andric bool HasColors = FOS.has_colors(); 1390b57cec5SDimitry Andric for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) { 1400b57cec5SDimitry Andric const MCProcResourceDesc &ProcResource = *SM.getProcResource(I); 1410b57cec5SDimitry Andric if (ProcResource.BufferSize <= 0) 1420b57cec5SDimitry Andric continue; 1430b57cec5SDimitry Andric 1440b57cec5SDimitry Andric const BufferUsage &BU = Usage[I]; 1450b57cec5SDimitry Andric double AvgUsage = (double)BU.CumulativeNumUsedSlots / NumCycles; 1460b57cec5SDimitry Andric double AlmostFullThreshold = (double)(ProcResource.BufferSize * 4) / 5; 1470b57cec5SDimitry Andric unsigned NormalizedAvg = floor((AvgUsage * 10) + 0.5) / 10; 1480b57cec5SDimitry Andric unsigned NormalizedThreshold = floor((AlmostFullThreshold * 10) + 0.5) / 10; 1490b57cec5SDimitry Andric 1500b57cec5SDimitry Andric FOS << ProcResource.Name; 1510b57cec5SDimitry Andric FOS.PadToColumn(17); 1520b57cec5SDimitry Andric if (HasColors && NormalizedAvg >= NormalizedThreshold) 1530b57cec5SDimitry Andric FOS.changeColor(raw_ostream::YELLOW, true, false); 1540b57cec5SDimitry Andric FOS << NormalizedAvg; 1550b57cec5SDimitry Andric if (HasColors) 1560b57cec5SDimitry Andric FOS.resetColor(); 1570b57cec5SDimitry Andric FOS.PadToColumn(28); 1580b57cec5SDimitry Andric if (HasColors && 1590b57cec5SDimitry Andric BU.MaxUsedSlots == static_cast<unsigned>(ProcResource.BufferSize)) 1600b57cec5SDimitry Andric FOS.changeColor(raw_ostream::RED, true, false); 1610b57cec5SDimitry Andric FOS << BU.MaxUsedSlots; 1620b57cec5SDimitry Andric if (HasColors) 1630b57cec5SDimitry Andric FOS.resetColor(); 1640b57cec5SDimitry Andric FOS.PadToColumn(39); 1650b57cec5SDimitry Andric FOS << ProcResource.BufferSize << '\n'; 1660b57cec5SDimitry Andric } 1670b57cec5SDimitry Andric 1680b57cec5SDimitry Andric FOS.flush(); 1690b57cec5SDimitry Andric } 1700b57cec5SDimitry Andric 1710b57cec5SDimitry Andric void SchedulerStatistics::printView(raw_ostream &OS) const { 1720b57cec5SDimitry Andric printSchedulerStats(OS); 1730b57cec5SDimitry Andric printSchedulerUsage(OS); 1740b57cec5SDimitry Andric } 1750b57cec5SDimitry Andric 1760b57cec5SDimitry Andric } // namespace mca 1770b57cec5SDimitry Andric } // namespace llvm 178