10b57cec5SDimitry Andric //===-- X86SelectionDAGInfo.h - X86 SelectionDAG Info -----------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This file defines the X86 subclass for SelectionDAGTargetInfo. 100b57cec5SDimitry Andric // 110b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric 130b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H 140b57cec5SDimitry Andric #define LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H 150b57cec5SDimitry Andric 160b57cec5SDimitry Andric #include "llvm/CodeGen/SelectionDAGTargetInfo.h" 170b57cec5SDimitry Andric 180b57cec5SDimitry Andric namespace llvm { 190b57cec5SDimitry Andric 200b57cec5SDimitry Andric class X86SelectionDAGInfo : public SelectionDAGTargetInfo { 210b57cec5SDimitry Andric /// Returns true if it is possible for the base register to conflict with the 220b57cec5SDimitry Andric /// given set of clobbers for a memory intrinsic. 230b57cec5SDimitry Andric bool isBaseRegConflictPossible(SelectionDAG &DAG, 240b57cec5SDimitry Andric ArrayRef<MCPhysReg> ClobberSet) const; 250b57cec5SDimitry Andric 260b57cec5SDimitry Andric public: 270b57cec5SDimitry Andric explicit X86SelectionDAGInfo() = default; 280b57cec5SDimitry Andric 290b57cec5SDimitry Andric SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, 300b57cec5SDimitry Andric SDValue Chain, SDValue Dst, SDValue Src, 315ffd83dbSDimitry Andric SDValue Size, Align Alignment, 32*81ad6265SDimitry Andric bool isVolatile, bool AlwaysInline, 330b57cec5SDimitry Andric MachinePointerInfo DstPtrInfo) const override; 340b57cec5SDimitry Andric 350b57cec5SDimitry Andric SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, 360b57cec5SDimitry Andric SDValue Chain, SDValue Dst, SDValue Src, 375ffd83dbSDimitry Andric SDValue Size, Align Alignment, 385ffd83dbSDimitry Andric bool isVolatile, bool AlwaysInline, 390b57cec5SDimitry Andric MachinePointerInfo DstPtrInfo, 400b57cec5SDimitry Andric MachinePointerInfo SrcPtrInfo) const override; 410b57cec5SDimitry Andric }; 420b57cec5SDimitry Andric 430b57cec5SDimitry Andric } 440b57cec5SDimitry Andric 450b57cec5SDimitry Andric #endif 46