10b57cec5SDimitry Andric//===-- X86InstrSVM.td - SVM Instruction Set Extension -----*- tablegen -*-===// 20b57cec5SDimitry Andric// 30b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric// 70b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric// 90b57cec5SDimitry Andric// This file describes the instructions that make up the AMD SVM instruction 100b57cec5SDimitry Andric// set. 110b57cec5SDimitry Andric// 120b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 150b57cec5SDimitry Andric// SVM instructions 160b57cec5SDimitry Andric 170b57cec5SDimitry Andriclet SchedRW = [WriteSystem] in { 180b57cec5SDimitry Andric// 0F 01 D9 190b57cec5SDimitry Andricdef VMMCALL : I<0x01, MRM_D9, (outs), (ins), "vmmcall", []>, TB; 200b57cec5SDimitry Andric 210b57cec5SDimitry Andric// 0F 01 DC 220b57cec5SDimitry Andricdef STGI : I<0x01, MRM_DC, (outs), (ins), "stgi", []>, TB; 230b57cec5SDimitry Andric 240b57cec5SDimitry Andric// 0F 01 DD 250b57cec5SDimitry Andricdef CLGI : I<0x01, MRM_DD, (outs), (ins), "clgi", []>, TB; 260b57cec5SDimitry Andric 270b57cec5SDimitry Andric// 0F 01 DE 280b57cec5SDimitry Andriclet Uses = [EAX] in 29*e8d8bef9SDimitry Andricdef SKINIT : I<0x01, MRM_DE, (outs), (ins), "skinit", []>, TB; 300b57cec5SDimitry Andric 310b57cec5SDimitry Andric// 0F 01 D8 320b57cec5SDimitry Andriclet Uses = [EAX] in 33*e8d8bef9SDimitry Andricdef VMRUN32 : I<0x01, MRM_D8, (outs), (ins), "vmrun", []>, TB, 340b57cec5SDimitry Andric Requires<[Not64BitMode]>; 350b57cec5SDimitry Andriclet Uses = [RAX] in 36*e8d8bef9SDimitry Andricdef VMRUN64 : I<0x01, MRM_D8, (outs), (ins), "vmrun", []>, TB, 370b57cec5SDimitry Andric Requires<[In64BitMode]>; 380b57cec5SDimitry Andric 390b57cec5SDimitry Andric// 0F 01 DA 400b57cec5SDimitry Andriclet Uses = [EAX] in 41*e8d8bef9SDimitry Andricdef VMLOAD32 : I<0x01, MRM_DA, (outs), (ins), "vmload", []>, TB, 420b57cec5SDimitry Andric Requires<[Not64BitMode]>; 430b57cec5SDimitry Andriclet Uses = [RAX] in 44*e8d8bef9SDimitry Andricdef VMLOAD64 : I<0x01, MRM_DA, (outs), (ins), "vmload", []>, TB, 450b57cec5SDimitry Andric Requires<[In64BitMode]>; 460b57cec5SDimitry Andric 470b57cec5SDimitry Andric// 0F 01 DB 480b57cec5SDimitry Andriclet Uses = [EAX] in 49*e8d8bef9SDimitry Andricdef VMSAVE32 : I<0x01, MRM_DB, (outs), (ins), "vmsave", []>, TB, 500b57cec5SDimitry Andric Requires<[Not64BitMode]>; 510b57cec5SDimitry Andriclet Uses = [RAX] in 52*e8d8bef9SDimitry Andricdef VMSAVE64 : I<0x01, MRM_DB, (outs), (ins), "vmsave", []>, TB, 530b57cec5SDimitry Andric Requires<[In64BitMode]>; 540b57cec5SDimitry Andric 550b57cec5SDimitry Andric// 0F 01 DF 560b57cec5SDimitry Andriclet Uses = [EAX, ECX] in 570b57cec5SDimitry Andricdef INVLPGA32 : I<0x01, MRM_DF, (outs), (ins), 58*e8d8bef9SDimitry Andric "invlpga", []>, TB, Requires<[Not64BitMode]>; 590b57cec5SDimitry Andriclet Uses = [RAX, ECX] in 600b57cec5SDimitry Andricdef INVLPGA64 : I<0x01, MRM_DF, (outs), (ins), 61*e8d8bef9SDimitry Andric "invlpga", []>, TB, Requires<[In64BitMode]>; 620b57cec5SDimitry Andric} // SchedRW 63