xref: /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/X86InsertPrefetch.cpp (revision 0fca6ea1d4eea4c934cfff25ac9ee8ad6fe95583)
10b57cec5SDimitry Andric //===------- X86InsertPrefetch.cpp - Insert cache prefetch hints ----------===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric //
90b57cec5SDimitry Andric // This pass applies cache prefetch instructions based on a profile. The pass
100b57cec5SDimitry Andric // assumes DiscriminateMemOps ran immediately before, to ensure debug info
110b57cec5SDimitry Andric // matches the one used at profile generation time. The profile is encoded in
120b57cec5SDimitry Andric // afdo format (text or binary). It contains prefetch hints recommendations.
130b57cec5SDimitry Andric // Each recommendation is made in terms of debug info locations, a type (i.e.
140b57cec5SDimitry Andric // nta, t{0|1|2}) and a delta. The debug info identifies an instruction with a
150b57cec5SDimitry Andric // memory operand (see X86DiscriminateMemOps). The prefetch will be made for
160b57cec5SDimitry Andric // a location at that memory operand + the delta specified in the
170b57cec5SDimitry Andric // recommendation.
180b57cec5SDimitry Andric //
190b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
200b57cec5SDimitry Andric 
210b57cec5SDimitry Andric #include "X86.h"
220b57cec5SDimitry Andric #include "X86InstrBuilder.h"
230b57cec5SDimitry Andric #include "X86InstrInfo.h"
240b57cec5SDimitry Andric #include "X86MachineFunctionInfo.h"
250b57cec5SDimitry Andric #include "X86Subtarget.h"
2681ad6265SDimitry Andric #include "llvm/CodeGen/MachineFunctionPass.h"
270b57cec5SDimitry Andric #include "llvm/CodeGen/MachineModuleInfo.h"
280b57cec5SDimitry Andric #include "llvm/IR/DebugInfoMetadata.h"
29*0fca6ea1SDimitry Andric #include "llvm/IR/Module.h"
300b57cec5SDimitry Andric #include "llvm/ProfileData/SampleProf.h"
310b57cec5SDimitry Andric #include "llvm/ProfileData/SampleProfReader.h"
3206c3fb27SDimitry Andric #include "llvm/Support/VirtualFileSystem.h"
330b57cec5SDimitry Andric #include "llvm/Transforms/IPO/SampleProfile.h"
340b57cec5SDimitry Andric using namespace llvm;
350b57cec5SDimitry Andric using namespace sampleprof;
360b57cec5SDimitry Andric 
370b57cec5SDimitry Andric static cl::opt<std::string>
380b57cec5SDimitry Andric     PrefetchHintsFile("prefetch-hints-file",
390b57cec5SDimitry Andric                       cl::desc("Path to the prefetch hints profile. See also "
400b57cec5SDimitry Andric                                "-x86-discriminate-memops"),
410b57cec5SDimitry Andric                       cl::Hidden);
420b57cec5SDimitry Andric namespace {
430b57cec5SDimitry Andric 
440b57cec5SDimitry Andric class X86InsertPrefetch : public MachineFunctionPass {
450b57cec5SDimitry Andric   void getAnalysisUsage(AnalysisUsage &AU) const override;
460b57cec5SDimitry Andric   bool doInitialization(Module &) override;
470b57cec5SDimitry Andric 
480b57cec5SDimitry Andric   bool runOnMachineFunction(MachineFunction &MF) override;
490b57cec5SDimitry Andric   struct PrefetchInfo {
500b57cec5SDimitry Andric     unsigned InstructionID;
510b57cec5SDimitry Andric     int64_t Delta;
520b57cec5SDimitry Andric   };
530b57cec5SDimitry Andric   typedef SmallVectorImpl<PrefetchInfo> Prefetches;
540b57cec5SDimitry Andric   bool findPrefetchInfo(const FunctionSamples *Samples, const MachineInstr &MI,
550b57cec5SDimitry Andric                         Prefetches &prefetches) const;
560b57cec5SDimitry Andric 
570b57cec5SDimitry Andric public:
580b57cec5SDimitry Andric   static char ID;
590b57cec5SDimitry Andric   X86InsertPrefetch(const std::string &PrefetchHintsFilename);
600b57cec5SDimitry Andric   StringRef getPassName() const override {
610b57cec5SDimitry Andric     return "X86 Insert Cache Prefetches";
620b57cec5SDimitry Andric   }
630b57cec5SDimitry Andric 
640b57cec5SDimitry Andric private:
650b57cec5SDimitry Andric   std::string Filename;
660b57cec5SDimitry Andric   std::unique_ptr<SampleProfileReader> Reader;
670b57cec5SDimitry Andric };
680b57cec5SDimitry Andric 
690b57cec5SDimitry Andric using PrefetchHints = SampleRecord::CallTargetMap;
700b57cec5SDimitry Andric 
710b57cec5SDimitry Andric // Return any prefetching hints for the specified MachineInstruction. The hints
720b57cec5SDimitry Andric // are returned as pairs (name, delta).
73cb14a3feSDimitry Andric ErrorOr<const PrefetchHints &>
74cb14a3feSDimitry Andric getPrefetchHints(const FunctionSamples *TopSamples, const MachineInstr &MI) {
750b57cec5SDimitry Andric   if (const auto &Loc = MI.getDebugLoc())
760b57cec5SDimitry Andric     if (const auto *Samples = TopSamples->findFunctionSamples(Loc))
770b57cec5SDimitry Andric       return Samples->findCallTargetMapAt(FunctionSamples::getOffset(Loc),
780b57cec5SDimitry Andric                                           Loc->getBaseDiscriminator());
790b57cec5SDimitry Andric   return std::error_code();
800b57cec5SDimitry Andric }
810b57cec5SDimitry Andric 
820b57cec5SDimitry Andric // The prefetch instruction can't take memory operands involving vector
830b57cec5SDimitry Andric // registers.
840b57cec5SDimitry Andric bool IsMemOpCompatibleWithPrefetch(const MachineInstr &MI, int Op) {
858bcb0991SDimitry Andric   Register BaseReg = MI.getOperand(Op + X86::AddrBaseReg).getReg();
868bcb0991SDimitry Andric   Register IndexReg = MI.getOperand(Op + X86::AddrIndexReg).getReg();
870b57cec5SDimitry Andric   return (BaseReg == 0 ||
880b57cec5SDimitry Andric           X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg) ||
890b57cec5SDimitry Andric           X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg)) &&
900b57cec5SDimitry Andric          (IndexReg == 0 ||
910b57cec5SDimitry Andric           X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg) ||
920b57cec5SDimitry Andric           X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg));
930b57cec5SDimitry Andric }
940b57cec5SDimitry Andric 
950b57cec5SDimitry Andric } // end anonymous namespace
960b57cec5SDimitry Andric 
970b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
980b57cec5SDimitry Andric //            Implementation
990b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
1000b57cec5SDimitry Andric 
1010b57cec5SDimitry Andric char X86InsertPrefetch::ID = 0;
1020b57cec5SDimitry Andric 
1030b57cec5SDimitry Andric X86InsertPrefetch::X86InsertPrefetch(const std::string &PrefetchHintsFilename)
1040b57cec5SDimitry Andric     : MachineFunctionPass(ID), Filename(PrefetchHintsFilename) {}
1050b57cec5SDimitry Andric 
1060b57cec5SDimitry Andric /// Return true if the provided MachineInstruction has cache prefetch hints. In
1070b57cec5SDimitry Andric /// that case, the prefetch hints are stored, in order, in the Prefetches
1080b57cec5SDimitry Andric /// vector.
1090b57cec5SDimitry Andric bool X86InsertPrefetch::findPrefetchInfo(const FunctionSamples *TopSamples,
1100b57cec5SDimitry Andric                                          const MachineInstr &MI,
1110b57cec5SDimitry Andric                                          Prefetches &Prefetches) const {
1120b57cec5SDimitry Andric   assert(Prefetches.empty() &&
1130b57cec5SDimitry Andric          "Expected caller passed empty PrefetchInfo vector.");
1145f757f3fSDimitry Andric 
1155f757f3fSDimitry Andric   // There is no point to match prefetch hints if the profile is using MD5.
1165f757f3fSDimitry Andric   if (FunctionSamples::UseMD5)
1175f757f3fSDimitry Andric     return false;
1185f757f3fSDimitry Andric 
1198bcb0991SDimitry Andric   static constexpr std::pair<StringLiteral, unsigned> HintTypes[] = {
1200b57cec5SDimitry Andric       {"_nta_", X86::PREFETCHNTA},
1210b57cec5SDimitry Andric       {"_t0_", X86::PREFETCHT0},
1220b57cec5SDimitry Andric       {"_t1_", X86::PREFETCHT1},
1230b57cec5SDimitry Andric       {"_t2_", X86::PREFETCHT2},
1240b57cec5SDimitry Andric   };
1250b57cec5SDimitry Andric   static const char *SerializedPrefetchPrefix = "__prefetch";
1260b57cec5SDimitry Andric 
127cb14a3feSDimitry Andric   auto T = getPrefetchHints(TopSamples, MI);
1280b57cec5SDimitry Andric   if (!T)
1290b57cec5SDimitry Andric     return false;
1300b57cec5SDimitry Andric   int16_t max_index = -1;
1310b57cec5SDimitry Andric   // Convert serialized prefetch hints into PrefetchInfo objects, and populate
1320b57cec5SDimitry Andric   // the Prefetches vector.
1330b57cec5SDimitry Andric   for (const auto &S_V : *T) {
1345f757f3fSDimitry Andric     StringRef Name = S_V.first.stringRef();
1350b57cec5SDimitry Andric     if (Name.consume_front(SerializedPrefetchPrefix)) {
1360b57cec5SDimitry Andric       int64_t D = static_cast<int64_t>(S_V.second);
1370b57cec5SDimitry Andric       unsigned IID = 0;
1380b57cec5SDimitry Andric       for (const auto &HintType : HintTypes) {
139647cbc5dSDimitry Andric         if (Name.consume_front(HintType.first)) {
1400b57cec5SDimitry Andric           IID = HintType.second;
1410b57cec5SDimitry Andric           break;
1420b57cec5SDimitry Andric         }
1430b57cec5SDimitry Andric       }
1440b57cec5SDimitry Andric       if (IID == 0)
1450b57cec5SDimitry Andric         return false;
1460b57cec5SDimitry Andric       uint8_t index = 0;
1470b57cec5SDimitry Andric       Name.consumeInteger(10, index);
1480b57cec5SDimitry Andric 
1490b57cec5SDimitry Andric       if (index >= Prefetches.size())
1500b57cec5SDimitry Andric         Prefetches.resize(index + 1);
1510b57cec5SDimitry Andric       Prefetches[index] = {IID, D};
1520b57cec5SDimitry Andric       max_index = std::max(max_index, static_cast<int16_t>(index));
1530b57cec5SDimitry Andric     }
1540b57cec5SDimitry Andric   }
1550b57cec5SDimitry Andric   assert(max_index + 1 >= 0 &&
1560b57cec5SDimitry Andric          "Possible overflow: max_index + 1 should be positive.");
1570b57cec5SDimitry Andric   assert(static_cast<size_t>(max_index + 1) == Prefetches.size() &&
1580b57cec5SDimitry Andric          "The number of prefetch hints received should match the number of "
1590b57cec5SDimitry Andric          "PrefetchInfo objects returned");
1600b57cec5SDimitry Andric   return !Prefetches.empty();
1610b57cec5SDimitry Andric }
1620b57cec5SDimitry Andric 
1630b57cec5SDimitry Andric bool X86InsertPrefetch::doInitialization(Module &M) {
1640b57cec5SDimitry Andric   if (Filename.empty())
1650b57cec5SDimitry Andric     return false;
1660b57cec5SDimitry Andric 
1670b57cec5SDimitry Andric   LLVMContext &Ctx = M.getContext();
16806c3fb27SDimitry Andric   // TODO: Propagate virtual file system into LLVM targets.
16906c3fb27SDimitry Andric   auto FS = vfs::getRealFileSystem();
1700b57cec5SDimitry Andric   ErrorOr<std::unique_ptr<SampleProfileReader>> ReaderOrErr =
17106c3fb27SDimitry Andric       SampleProfileReader::create(Filename, Ctx, *FS);
1720b57cec5SDimitry Andric   if (std::error_code EC = ReaderOrErr.getError()) {
1730b57cec5SDimitry Andric     std::string Msg = "Could not open profile: " + EC.message();
1740b57cec5SDimitry Andric     Ctx.diagnose(DiagnosticInfoSampleProfile(Filename, Msg,
1750b57cec5SDimitry Andric                                              DiagnosticSeverity::DS_Warning));
1760b57cec5SDimitry Andric     return false;
1770b57cec5SDimitry Andric   }
1780b57cec5SDimitry Andric   Reader = std::move(ReaderOrErr.get());
1790b57cec5SDimitry Andric   Reader->read();
1800b57cec5SDimitry Andric   return true;
1810b57cec5SDimitry Andric }
1820b57cec5SDimitry Andric 
1830b57cec5SDimitry Andric void X86InsertPrefetch::getAnalysisUsage(AnalysisUsage &AU) const {
1840b57cec5SDimitry Andric   AU.setPreservesAll();
1855ffd83dbSDimitry Andric   MachineFunctionPass::getAnalysisUsage(AU);
1860b57cec5SDimitry Andric }
1870b57cec5SDimitry Andric 
1880b57cec5SDimitry Andric bool X86InsertPrefetch::runOnMachineFunction(MachineFunction &MF) {
1890b57cec5SDimitry Andric   if (!Reader)
1900b57cec5SDimitry Andric     return false;
1910b57cec5SDimitry Andric   const FunctionSamples *Samples = Reader->getSamplesFor(MF.getFunction());
1920b57cec5SDimitry Andric   if (!Samples)
1930b57cec5SDimitry Andric     return false;
1940b57cec5SDimitry Andric 
1950b57cec5SDimitry Andric   bool Changed = false;
1960b57cec5SDimitry Andric 
1970b57cec5SDimitry Andric   const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
1980b57cec5SDimitry Andric   SmallVector<PrefetchInfo, 4> Prefetches;
1990b57cec5SDimitry Andric   for (auto &MBB : MF) {
2000b57cec5SDimitry Andric     for (auto MI = MBB.instr_begin(); MI != MBB.instr_end();) {
2010b57cec5SDimitry Andric       auto Current = MI;
2020b57cec5SDimitry Andric       ++MI;
2030b57cec5SDimitry Andric 
2040b57cec5SDimitry Andric       int Offset = X86II::getMemoryOperandNo(Current->getDesc().TSFlags);
2050b57cec5SDimitry Andric       if (Offset < 0)
2060b57cec5SDimitry Andric         continue;
2070b57cec5SDimitry Andric       unsigned Bias = X86II::getOperandBias(Current->getDesc());
2080b57cec5SDimitry Andric       int MemOpOffset = Offset + Bias;
2090b57cec5SDimitry Andric       // FIXME(mtrofin): ORE message when the recommendation cannot be taken.
2100b57cec5SDimitry Andric       if (!IsMemOpCompatibleWithPrefetch(*Current, MemOpOffset))
2110b57cec5SDimitry Andric         continue;
2120b57cec5SDimitry Andric       Prefetches.clear();
2130b57cec5SDimitry Andric       if (!findPrefetchInfo(Samples, *Current, Prefetches))
2140b57cec5SDimitry Andric         continue;
2150b57cec5SDimitry Andric       assert(!Prefetches.empty() &&
2160b57cec5SDimitry Andric              "The Prefetches vector should contain at least a value if "
2170b57cec5SDimitry Andric              "findPrefetchInfo returned true.");
2180b57cec5SDimitry Andric       for (auto &PrefInfo : Prefetches) {
2190b57cec5SDimitry Andric         unsigned PFetchInstrID = PrefInfo.InstructionID;
2200b57cec5SDimitry Andric         int64_t Delta = PrefInfo.Delta;
2210b57cec5SDimitry Andric         const MCInstrDesc &Desc = TII->get(PFetchInstrID);
2220b57cec5SDimitry Andric         MachineInstr *PFetch =
2230b57cec5SDimitry Andric             MF.CreateMachineInstr(Desc, Current->getDebugLoc(), true);
2240b57cec5SDimitry Andric         MachineInstrBuilder MIB(MF, PFetch);
2250b57cec5SDimitry Andric 
226e8d8bef9SDimitry Andric         static_assert(X86::AddrBaseReg == 0 && X86::AddrScaleAmt == 1 &&
2270b57cec5SDimitry Andric                           X86::AddrIndexReg == 2 && X86::AddrDisp == 3 &&
228e8d8bef9SDimitry Andric                           X86::AddrSegmentReg == 4,
2290b57cec5SDimitry Andric                       "Unexpected change in X86 operand offset order.");
2300b57cec5SDimitry Andric 
2310b57cec5SDimitry Andric         // This assumes X86::AddBaseReg = 0, {...}ScaleAmt = 1, etc.
2320b57cec5SDimitry Andric         // FIXME(mtrofin): consider adding a:
2330b57cec5SDimitry Andric         //     MachineInstrBuilder::set(unsigned offset, op).
2340b57cec5SDimitry Andric         MIB.addReg(Current->getOperand(MemOpOffset + X86::AddrBaseReg).getReg())
2350b57cec5SDimitry Andric             .addImm(
2360b57cec5SDimitry Andric                 Current->getOperand(MemOpOffset + X86::AddrScaleAmt).getImm())
2370b57cec5SDimitry Andric             .addReg(
2380b57cec5SDimitry Andric                 Current->getOperand(MemOpOffset + X86::AddrIndexReg).getReg())
2390b57cec5SDimitry Andric             .addImm(Current->getOperand(MemOpOffset + X86::AddrDisp).getImm() +
2400b57cec5SDimitry Andric                     Delta)
2410b57cec5SDimitry Andric             .addReg(Current->getOperand(MemOpOffset + X86::AddrSegmentReg)
2420b57cec5SDimitry Andric                         .getReg());
2430b57cec5SDimitry Andric 
2440b57cec5SDimitry Andric         if (!Current->memoperands_empty()) {
2450b57cec5SDimitry Andric           MachineMemOperand *CurrentOp = *(Current->memoperands_begin());
2460b57cec5SDimitry Andric           MIB.addMemOperand(MF.getMachineMemOperand(
2470b57cec5SDimitry Andric               CurrentOp, CurrentOp->getOffset() + Delta, CurrentOp->getSize()));
2480b57cec5SDimitry Andric         }
2490b57cec5SDimitry Andric 
2500b57cec5SDimitry Andric         // Insert before Current. This is because Current may clobber some of
2510b57cec5SDimitry Andric         // the registers used to describe the input memory operand.
2520b57cec5SDimitry Andric         MBB.insert(Current, PFetch);
2530b57cec5SDimitry Andric         Changed = true;
2540b57cec5SDimitry Andric       }
2550b57cec5SDimitry Andric     }
2560b57cec5SDimitry Andric   }
2570b57cec5SDimitry Andric   return Changed;
2580b57cec5SDimitry Andric }
2590b57cec5SDimitry Andric 
2600b57cec5SDimitry Andric FunctionPass *llvm::createX86InsertPrefetchPass() {
2610b57cec5SDimitry Andric   return new X86InsertPrefetch(PrefetchHintsFile);
2620b57cec5SDimitry Andric }
263