xref: /freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp (revision 0b57cec536236d46e3dba9bd041533462f33dbb7)
1*0b57cec5SDimitry Andric //===-- WebAssemblyRegNumbering.cpp - Register Numbering ------------------===//
2*0b57cec5SDimitry Andric //
3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6*0b57cec5SDimitry Andric //
7*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
8*0b57cec5SDimitry Andric ///
9*0b57cec5SDimitry Andric /// \file
10*0b57cec5SDimitry Andric /// This file implements a pass which assigns WebAssembly register
11*0b57cec5SDimitry Andric /// numbers for CodeGen virtual registers.
12*0b57cec5SDimitry Andric ///
13*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
14*0b57cec5SDimitry Andric 
15*0b57cec5SDimitry Andric #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
16*0b57cec5SDimitry Andric #include "WebAssembly.h"
17*0b57cec5SDimitry Andric #include "WebAssemblyMachineFunctionInfo.h"
18*0b57cec5SDimitry Andric #include "WebAssemblySubtarget.h"
19*0b57cec5SDimitry Andric #include "WebAssemblyUtilities.h"
20*0b57cec5SDimitry Andric #include "llvm/ADT/SCCIterator.h"
21*0b57cec5SDimitry Andric #include "llvm/CodeGen/MachineFrameInfo.h"
22*0b57cec5SDimitry Andric #include "llvm/CodeGen/MachineFunction.h"
23*0b57cec5SDimitry Andric #include "llvm/CodeGen/MachineInstrBuilder.h"
24*0b57cec5SDimitry Andric #include "llvm/CodeGen/MachineLoopInfo.h"
25*0b57cec5SDimitry Andric #include "llvm/CodeGen/MachineRegisterInfo.h"
26*0b57cec5SDimitry Andric #include "llvm/CodeGen/Passes.h"
27*0b57cec5SDimitry Andric #include "llvm/Support/Debug.h"
28*0b57cec5SDimitry Andric #include "llvm/Support/raw_ostream.h"
29*0b57cec5SDimitry Andric using namespace llvm;
30*0b57cec5SDimitry Andric 
31*0b57cec5SDimitry Andric #define DEBUG_TYPE "wasm-reg-numbering"
32*0b57cec5SDimitry Andric 
33*0b57cec5SDimitry Andric namespace {
34*0b57cec5SDimitry Andric class WebAssemblyRegNumbering final : public MachineFunctionPass {
35*0b57cec5SDimitry Andric   StringRef getPassName() const override {
36*0b57cec5SDimitry Andric     return "WebAssembly Register Numbering";
37*0b57cec5SDimitry Andric   }
38*0b57cec5SDimitry Andric 
39*0b57cec5SDimitry Andric   void getAnalysisUsage(AnalysisUsage &AU) const override {
40*0b57cec5SDimitry Andric     AU.setPreservesCFG();
41*0b57cec5SDimitry Andric     MachineFunctionPass::getAnalysisUsage(AU);
42*0b57cec5SDimitry Andric   }
43*0b57cec5SDimitry Andric 
44*0b57cec5SDimitry Andric   bool runOnMachineFunction(MachineFunction &MF) override;
45*0b57cec5SDimitry Andric 
46*0b57cec5SDimitry Andric public:
47*0b57cec5SDimitry Andric   static char ID; // Pass identification, replacement for typeid
48*0b57cec5SDimitry Andric   WebAssemblyRegNumbering() : MachineFunctionPass(ID) {}
49*0b57cec5SDimitry Andric };
50*0b57cec5SDimitry Andric } // end anonymous namespace
51*0b57cec5SDimitry Andric 
52*0b57cec5SDimitry Andric char WebAssemblyRegNumbering::ID = 0;
53*0b57cec5SDimitry Andric INITIALIZE_PASS(WebAssemblyRegNumbering, DEBUG_TYPE,
54*0b57cec5SDimitry Andric                 "Assigns WebAssembly register numbers for virtual registers",
55*0b57cec5SDimitry Andric                 false, false)
56*0b57cec5SDimitry Andric 
57*0b57cec5SDimitry Andric FunctionPass *llvm::createWebAssemblyRegNumbering() {
58*0b57cec5SDimitry Andric   return new WebAssemblyRegNumbering();
59*0b57cec5SDimitry Andric }
60*0b57cec5SDimitry Andric 
61*0b57cec5SDimitry Andric bool WebAssemblyRegNumbering::runOnMachineFunction(MachineFunction &MF) {
62*0b57cec5SDimitry Andric   LLVM_DEBUG(dbgs() << "********** Register Numbering **********\n"
63*0b57cec5SDimitry Andric                        "********** Function: "
64*0b57cec5SDimitry Andric                     << MF.getName() << '\n');
65*0b57cec5SDimitry Andric 
66*0b57cec5SDimitry Andric   WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
67*0b57cec5SDimitry Andric   MachineRegisterInfo &MRI = MF.getRegInfo();
68*0b57cec5SDimitry Andric 
69*0b57cec5SDimitry Andric   MFI.initWARegs();
70*0b57cec5SDimitry Andric 
71*0b57cec5SDimitry Andric   // WebAssembly argument registers are in the same index space as local
72*0b57cec5SDimitry Andric   // variables. Assign the numbers for them first.
73*0b57cec5SDimitry Andric   MachineBasicBlock &EntryMBB = MF.front();
74*0b57cec5SDimitry Andric   for (MachineInstr &MI : EntryMBB) {
75*0b57cec5SDimitry Andric     if (!WebAssembly::isArgument(MI.getOpcode()))
76*0b57cec5SDimitry Andric       break;
77*0b57cec5SDimitry Andric 
78*0b57cec5SDimitry Andric     int64_t Imm = MI.getOperand(1).getImm();
79*0b57cec5SDimitry Andric     LLVM_DEBUG(dbgs() << "Arg VReg " << MI.getOperand(0).getReg()
80*0b57cec5SDimitry Andric                       << " -> WAReg " << Imm << "\n");
81*0b57cec5SDimitry Andric     MFI.setWAReg(MI.getOperand(0).getReg(), Imm);
82*0b57cec5SDimitry Andric   }
83*0b57cec5SDimitry Andric 
84*0b57cec5SDimitry Andric   // Then assign regular WebAssembly registers for all remaining used
85*0b57cec5SDimitry Andric   // virtual registers. TODO: Consider sorting the registers by frequency of
86*0b57cec5SDimitry Andric   // use, to maximize usage of small immediate fields.
87*0b57cec5SDimitry Andric   unsigned NumVRegs = MF.getRegInfo().getNumVirtRegs();
88*0b57cec5SDimitry Andric   unsigned NumStackRegs = 0;
89*0b57cec5SDimitry Andric   // Start the numbering for locals after the arg regs
90*0b57cec5SDimitry Andric   unsigned CurReg = MFI.getParams().size();
91*0b57cec5SDimitry Andric   for (unsigned VRegIdx = 0; VRegIdx < NumVRegs; ++VRegIdx) {
92*0b57cec5SDimitry Andric     unsigned VReg = TargetRegisterInfo::index2VirtReg(VRegIdx);
93*0b57cec5SDimitry Andric     // Skip unused registers.
94*0b57cec5SDimitry Andric     if (MRI.use_empty(VReg))
95*0b57cec5SDimitry Andric       continue;
96*0b57cec5SDimitry Andric     // Handle stackified registers.
97*0b57cec5SDimitry Andric     if (MFI.isVRegStackified(VReg)) {
98*0b57cec5SDimitry Andric       LLVM_DEBUG(dbgs() << "VReg " << VReg << " -> WAReg "
99*0b57cec5SDimitry Andric                         << (INT32_MIN | NumStackRegs) << "\n");
100*0b57cec5SDimitry Andric       MFI.setWAReg(VReg, INT32_MIN | NumStackRegs++);
101*0b57cec5SDimitry Andric       continue;
102*0b57cec5SDimitry Andric     }
103*0b57cec5SDimitry Andric     if (MFI.getWAReg(VReg) == WebAssemblyFunctionInfo::UnusedReg) {
104*0b57cec5SDimitry Andric       LLVM_DEBUG(dbgs() << "VReg " << VReg << " -> WAReg " << CurReg << "\n");
105*0b57cec5SDimitry Andric       MFI.setWAReg(VReg, CurReg++);
106*0b57cec5SDimitry Andric     }
107*0b57cec5SDimitry Andric   }
108*0b57cec5SDimitry Andric 
109*0b57cec5SDimitry Andric   return true;
110*0b57cec5SDimitry Andric }
111