xref: /freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp (revision 5f757f3ff9144b609b3c433dfd370cc6bdc191ad)
10b57cec5SDimitry Andric //===-- WebAssemblyRegNumbering.cpp - Register Numbering ------------------===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric ///
90b57cec5SDimitry Andric /// \file
100b57cec5SDimitry Andric /// This file implements a pass which assigns WebAssembly register
110b57cec5SDimitry Andric /// numbers for CodeGen virtual registers.
120b57cec5SDimitry Andric ///
130b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
140b57cec5SDimitry Andric 
150b57cec5SDimitry Andric #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
160b57cec5SDimitry Andric #include "WebAssembly.h"
170b57cec5SDimitry Andric #include "WebAssemblyMachineFunctionInfo.h"
180b57cec5SDimitry Andric #include "WebAssemblySubtarget.h"
19*5f757f3fSDimitry Andric #include "WebAssemblyUtilities.h"
200b57cec5SDimitry Andric #include "llvm/ADT/SCCIterator.h"
210b57cec5SDimitry Andric #include "llvm/CodeGen/MachineFrameInfo.h"
220b57cec5SDimitry Andric #include "llvm/CodeGen/MachineFunction.h"
230b57cec5SDimitry Andric #include "llvm/CodeGen/MachineInstrBuilder.h"
240b57cec5SDimitry Andric #include "llvm/CodeGen/MachineLoopInfo.h"
250b57cec5SDimitry Andric #include "llvm/CodeGen/MachineRegisterInfo.h"
260b57cec5SDimitry Andric #include "llvm/CodeGen/Passes.h"
270b57cec5SDimitry Andric #include "llvm/Support/Debug.h"
280b57cec5SDimitry Andric #include "llvm/Support/raw_ostream.h"
290b57cec5SDimitry Andric using namespace llvm;
300b57cec5SDimitry Andric 
310b57cec5SDimitry Andric #define DEBUG_TYPE "wasm-reg-numbering"
320b57cec5SDimitry Andric 
330b57cec5SDimitry Andric namespace {
340b57cec5SDimitry Andric class WebAssemblyRegNumbering final : public MachineFunctionPass {
getPassName() const350b57cec5SDimitry Andric   StringRef getPassName() const override {
360b57cec5SDimitry Andric     return "WebAssembly Register Numbering";
370b57cec5SDimitry Andric   }
380b57cec5SDimitry Andric 
getAnalysisUsage(AnalysisUsage & AU) const390b57cec5SDimitry Andric   void getAnalysisUsage(AnalysisUsage &AU) const override {
400b57cec5SDimitry Andric     AU.setPreservesCFG();
410b57cec5SDimitry Andric     MachineFunctionPass::getAnalysisUsage(AU);
420b57cec5SDimitry Andric   }
430b57cec5SDimitry Andric 
440b57cec5SDimitry Andric   bool runOnMachineFunction(MachineFunction &MF) override;
450b57cec5SDimitry Andric 
460b57cec5SDimitry Andric public:
470b57cec5SDimitry Andric   static char ID; // Pass identification, replacement for typeid
WebAssemblyRegNumbering()480b57cec5SDimitry Andric   WebAssemblyRegNumbering() : MachineFunctionPass(ID) {}
490b57cec5SDimitry Andric };
500b57cec5SDimitry Andric } // end anonymous namespace
510b57cec5SDimitry Andric 
520b57cec5SDimitry Andric char WebAssemblyRegNumbering::ID = 0;
530b57cec5SDimitry Andric INITIALIZE_PASS(WebAssemblyRegNumbering, DEBUG_TYPE,
540b57cec5SDimitry Andric                 "Assigns WebAssembly register numbers for virtual registers",
550b57cec5SDimitry Andric                 false, false)
560b57cec5SDimitry Andric 
createWebAssemblyRegNumbering()570b57cec5SDimitry Andric FunctionPass *llvm::createWebAssemblyRegNumbering() {
580b57cec5SDimitry Andric   return new WebAssemblyRegNumbering();
590b57cec5SDimitry Andric }
600b57cec5SDimitry Andric 
runOnMachineFunction(MachineFunction & MF)610b57cec5SDimitry Andric bool WebAssemblyRegNumbering::runOnMachineFunction(MachineFunction &MF) {
620b57cec5SDimitry Andric   LLVM_DEBUG(dbgs() << "********** Register Numbering **********\n"
630b57cec5SDimitry Andric                        "********** Function: "
640b57cec5SDimitry Andric                     << MF.getName() << '\n');
650b57cec5SDimitry Andric 
660b57cec5SDimitry Andric   WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
670b57cec5SDimitry Andric   MachineRegisterInfo &MRI = MF.getRegInfo();
680b57cec5SDimitry Andric 
695ffd83dbSDimitry Andric   MFI.initWARegs(MRI);
700b57cec5SDimitry Andric 
710b57cec5SDimitry Andric   // WebAssembly argument registers are in the same index space as local
720b57cec5SDimitry Andric   // variables. Assign the numbers for them first.
730b57cec5SDimitry Andric   MachineBasicBlock &EntryMBB = MF.front();
740b57cec5SDimitry Andric   for (MachineInstr &MI : EntryMBB) {
750b57cec5SDimitry Andric     if (!WebAssembly::isArgument(MI.getOpcode()))
760b57cec5SDimitry Andric       break;
770b57cec5SDimitry Andric 
780b57cec5SDimitry Andric     int64_t Imm = MI.getOperand(1).getImm();
790b57cec5SDimitry Andric     LLVM_DEBUG(dbgs() << "Arg VReg " << MI.getOperand(0).getReg()
800b57cec5SDimitry Andric                       << " -> WAReg " << Imm << "\n");
810b57cec5SDimitry Andric     MFI.setWAReg(MI.getOperand(0).getReg(), Imm);
820b57cec5SDimitry Andric   }
830b57cec5SDimitry Andric 
840b57cec5SDimitry Andric   // Then assign regular WebAssembly registers for all remaining used
850b57cec5SDimitry Andric   // virtual registers. TODO: Consider sorting the registers by frequency of
860b57cec5SDimitry Andric   // use, to maximize usage of small immediate fields.
870b57cec5SDimitry Andric   unsigned NumVRegs = MF.getRegInfo().getNumVirtRegs();
880b57cec5SDimitry Andric   unsigned NumStackRegs = 0;
890b57cec5SDimitry Andric   // Start the numbering for locals after the arg regs
900b57cec5SDimitry Andric   unsigned CurReg = MFI.getParams().size();
910b57cec5SDimitry Andric   for (unsigned VRegIdx = 0; VRegIdx < NumVRegs; ++VRegIdx) {
9204eeddc0SDimitry Andric     Register VReg = Register::index2VirtReg(VRegIdx);
930b57cec5SDimitry Andric     // Skip unused registers.
940b57cec5SDimitry Andric     if (MRI.use_empty(VReg))
950b57cec5SDimitry Andric       continue;
960b57cec5SDimitry Andric     // Handle stackified registers.
970b57cec5SDimitry Andric     if (MFI.isVRegStackified(VReg)) {
980b57cec5SDimitry Andric       LLVM_DEBUG(dbgs() << "VReg " << VReg << " -> WAReg "
990b57cec5SDimitry Andric                         << (INT32_MIN | NumStackRegs) << "\n");
1000b57cec5SDimitry Andric       MFI.setWAReg(VReg, INT32_MIN | NumStackRegs++);
1010b57cec5SDimitry Andric       continue;
1020b57cec5SDimitry Andric     }
103*5f757f3fSDimitry Andric     if (MFI.getWAReg(VReg) == WebAssembly::UnusedReg) {
1040b57cec5SDimitry Andric       LLVM_DEBUG(dbgs() << "VReg " << VReg << " -> WAReg " << CurReg << "\n");
1050b57cec5SDimitry Andric       MFI.setWAReg(VReg, CurReg++);
1060b57cec5SDimitry Andric     }
1070b57cec5SDimitry Andric   }
1080b57cec5SDimitry Andric 
1090b57cec5SDimitry Andric   return true;
1100b57cec5SDimitry Andric }
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