10b57cec5SDimitry Andric // WebAssemblyMCInstLower.cpp - Convert WebAssembly MachineInstr to an MCInst // 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric /// 90b57cec5SDimitry Andric /// \file 100b57cec5SDimitry Andric /// This file contains code to lower WebAssembly MachineInstrs to their 110b57cec5SDimitry Andric /// corresponding MCInst records. 120b57cec5SDimitry Andric /// 130b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 140b57cec5SDimitry Andric 150b57cec5SDimitry Andric #include "WebAssemblyMCInstLower.h" 165ffd83dbSDimitry Andric #include "TargetInfo/WebAssemblyTargetInfo.h" 17fe6060f1SDimitry Andric #include "Utils/WebAssemblyTypeUtilities.h" 180b57cec5SDimitry Andric #include "WebAssemblyAsmPrinter.h" 19349cc55cSDimitry Andric #include "WebAssemblyISelLowering.h" 200b57cec5SDimitry Andric #include "WebAssemblyMachineFunctionInfo.h" 215f757f3fSDimitry Andric #include "WebAssemblyUtilities.h" 220b57cec5SDimitry Andric #include "llvm/CodeGen/AsmPrinter.h" 230b57cec5SDimitry Andric #include "llvm/CodeGen/MachineFunction.h" 240b57cec5SDimitry Andric #include "llvm/IR/Constants.h" 250b57cec5SDimitry Andric #include "llvm/MC/MCAsmInfo.h" 260b57cec5SDimitry Andric #include "llvm/MC/MCContext.h" 270b57cec5SDimitry Andric #include "llvm/MC/MCExpr.h" 280b57cec5SDimitry Andric #include "llvm/MC/MCInst.h" 290b57cec5SDimitry Andric #include "llvm/MC/MCSymbolWasm.h" 300b57cec5SDimitry Andric #include "llvm/Support/ErrorHandling.h" 310b57cec5SDimitry Andric #include "llvm/Support/raw_ostream.h" 32349cc55cSDimitry Andric 330b57cec5SDimitry Andric using namespace llvm; 340b57cec5SDimitry Andric 350b57cec5SDimitry Andric // This disables the removal of registers when lowering into MC, as required 360b57cec5SDimitry Andric // by some current tests. 370b57cec5SDimitry Andric cl::opt<bool> 380b57cec5SDimitry Andric WasmKeepRegisters("wasm-keep-registers", cl::Hidden, 390b57cec5SDimitry Andric cl::desc("WebAssembly: output stack registers in" 400b57cec5SDimitry Andric " instruction output for test purposes only."), 410b57cec5SDimitry Andric cl::init(false)); 420b57cec5SDimitry Andric 430b57cec5SDimitry Andric static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI); 440b57cec5SDimitry Andric 450b57cec5SDimitry Andric MCSymbol * 460b57cec5SDimitry Andric WebAssemblyMCInstLower::GetGlobalAddressSymbol(const MachineOperand &MO) const { 470b57cec5SDimitry Andric const GlobalValue *Global = MO.getGlobal(); 48fe6060f1SDimitry Andric if (!isa<Function>(Global)) { 49fe6060f1SDimitry Andric auto *WasmSym = cast<MCSymbolWasm>(Printer.getSymbol(Global)); 50fe6060f1SDimitry Andric // If the symbol doesn't have an explicit WasmSymbolType yet and the 51fe6060f1SDimitry Andric // GlobalValue is actually a WebAssembly global, then ensure the symbol is a 52fe6060f1SDimitry Andric // WASM_SYMBOL_TYPE_GLOBAL. 53fe6060f1SDimitry Andric if (WebAssembly::isWasmVarAddressSpace(Global->getAddressSpace()) && 54fe6060f1SDimitry Andric !WasmSym->getType()) { 55fe6060f1SDimitry Andric const MachineFunction &MF = *MO.getParent()->getParent()->getParent(); 56fe6060f1SDimitry Andric const TargetMachine &TM = MF.getTarget(); 57fe6060f1SDimitry Andric const Function &CurrentFunc = MF.getFunction(); 58349cc55cSDimitry Andric Type *GlobalVT = Global->getValueType(); 59fe6060f1SDimitry Andric SmallVector<MVT, 1> VTs; 60349cc55cSDimitry Andric computeLegalValueVTs(CurrentFunc, TM, GlobalVT, VTs); 61349cc55cSDimitry Andric 621fd87a68SDimitry Andric WebAssembly::wasmSymbolSetType(WasmSym, GlobalVT, VTs); 630eae32dcSDimitry Andric } 64fe6060f1SDimitry Andric return WasmSym; 65fe6060f1SDimitry Andric } 660b57cec5SDimitry Andric 67e8d8bef9SDimitry Andric const auto *FuncTy = cast<FunctionType>(Global->getValueType()); 680b57cec5SDimitry Andric const MachineFunction &MF = *MO.getParent()->getParent()->getParent(); 690b57cec5SDimitry Andric const TargetMachine &TM = MF.getTarget(); 700b57cec5SDimitry Andric const Function &CurrentFunc = MF.getFunction(); 710b57cec5SDimitry Andric 720b57cec5SDimitry Andric SmallVector<MVT, 1> ResultMVTs; 730b57cec5SDimitry Andric SmallVector<MVT, 4> ParamMVTs; 745ffd83dbSDimitry Andric const auto *const F = dyn_cast<Function>(Global); 755ffd83dbSDimitry Andric computeSignatureVTs(FuncTy, F, CurrentFunc, TM, ParamMVTs, ResultMVTs); 76*0fca6ea1SDimitry Andric auto Signature = signatureFromMVTs(Ctx, ResultMVTs, ParamMVTs); 77e8d8bef9SDimitry Andric 78e8d8bef9SDimitry Andric bool InvokeDetected = false; 79e8d8bef9SDimitry Andric auto *WasmSym = Printer.getMCSymbolForFunction( 800eae32dcSDimitry Andric F, WebAssembly::WasmEnableEmEH || WebAssembly::WasmEnableEmSjLj, 81*0fca6ea1SDimitry Andric Signature, InvokeDetected); 82*0fca6ea1SDimitry Andric WasmSym->setSignature(Signature); 830b57cec5SDimitry Andric WasmSym->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION); 840b57cec5SDimitry Andric return WasmSym; 850b57cec5SDimitry Andric } 860b57cec5SDimitry Andric 870b57cec5SDimitry Andric MCSymbol *WebAssemblyMCInstLower::GetExternalSymbolSymbol( 880b57cec5SDimitry Andric const MachineOperand &MO) const { 89fe6060f1SDimitry Andric return Printer.getOrCreateWasmSymbol(MO.getSymbolName()); 900b57cec5SDimitry Andric } 910b57cec5SDimitry Andric 920b57cec5SDimitry Andric MCOperand WebAssemblyMCInstLower::lowerSymbolOperand(const MachineOperand &MO, 930b57cec5SDimitry Andric MCSymbol *Sym) const { 940b57cec5SDimitry Andric MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 950b57cec5SDimitry Andric unsigned TargetFlags = MO.getTargetFlags(); 960b57cec5SDimitry Andric 970b57cec5SDimitry Andric switch (TargetFlags) { 980b57cec5SDimitry Andric case WebAssemblyII::MO_NO_FLAG: 990b57cec5SDimitry Andric break; 100349cc55cSDimitry Andric case WebAssemblyII::MO_GOT_TLS: 101349cc55cSDimitry Andric Kind = MCSymbolRefExpr::VK_WASM_GOT_TLS; 102349cc55cSDimitry Andric break; 1030b57cec5SDimitry Andric case WebAssemblyII::MO_GOT: 1040b57cec5SDimitry Andric Kind = MCSymbolRefExpr::VK_GOT; 1050b57cec5SDimitry Andric break; 1060b57cec5SDimitry Andric case WebAssemblyII::MO_MEMORY_BASE_REL: 1070b57cec5SDimitry Andric Kind = MCSymbolRefExpr::VK_WASM_MBREL; 1080b57cec5SDimitry Andric break; 109e8d8bef9SDimitry Andric case WebAssemblyII::MO_TLS_BASE_REL: 110e8d8bef9SDimitry Andric Kind = MCSymbolRefExpr::VK_WASM_TLSREL; 111e8d8bef9SDimitry Andric break; 1120b57cec5SDimitry Andric case WebAssemblyII::MO_TABLE_BASE_REL: 1130b57cec5SDimitry Andric Kind = MCSymbolRefExpr::VK_WASM_TBREL; 1140b57cec5SDimitry Andric break; 1150b57cec5SDimitry Andric default: 1160b57cec5SDimitry Andric llvm_unreachable("Unknown target flag on GV operand"); 1170b57cec5SDimitry Andric } 1180b57cec5SDimitry Andric 1190b57cec5SDimitry Andric const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Kind, Ctx); 1200b57cec5SDimitry Andric 1210b57cec5SDimitry Andric if (MO.getOffset() != 0) { 1220b57cec5SDimitry Andric const auto *WasmSym = cast<MCSymbolWasm>(Sym); 1230b57cec5SDimitry Andric if (TargetFlags == WebAssemblyII::MO_GOT) 1240b57cec5SDimitry Andric report_fatal_error("GOT symbol references do not support offsets"); 1250b57cec5SDimitry Andric if (WasmSym->isFunction()) 1260b57cec5SDimitry Andric report_fatal_error("Function addresses with offsets not supported"); 1270b57cec5SDimitry Andric if (WasmSym->isGlobal()) 1280b57cec5SDimitry Andric report_fatal_error("Global indexes with offsets not supported"); 129fe6060f1SDimitry Andric if (WasmSym->isTag()) 130fe6060f1SDimitry Andric report_fatal_error("Tag indexes with offsets not supported"); 131fe6060f1SDimitry Andric if (WasmSym->isTable()) 132fe6060f1SDimitry Andric report_fatal_error("Table indexes with offsets not supported"); 1330b57cec5SDimitry Andric 1340b57cec5SDimitry Andric Expr = MCBinaryExpr::createAdd( 1350b57cec5SDimitry Andric Expr, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx); 1360b57cec5SDimitry Andric } 1370b57cec5SDimitry Andric 1380b57cec5SDimitry Andric return MCOperand::createExpr(Expr); 1390b57cec5SDimitry Andric } 1400b57cec5SDimitry Andric 1418bcb0991SDimitry Andric MCOperand WebAssemblyMCInstLower::lowerTypeIndexOperand( 14206c3fb27SDimitry Andric SmallVectorImpl<wasm::ValType> &&Returns, 14306c3fb27SDimitry Andric SmallVectorImpl<wasm::ValType> &&Params) const { 144*0fca6ea1SDimitry Andric auto Signature = Ctx.createWasmSignature(); 145*0fca6ea1SDimitry Andric Signature->Returns = std::move(Returns); 146*0fca6ea1SDimitry Andric Signature->Params = std::move(Params); 1478bcb0991SDimitry Andric MCSymbol *Sym = Printer.createTempSymbol("typeindex"); 1488bcb0991SDimitry Andric auto *WasmSym = cast<MCSymbolWasm>(Sym); 149*0fca6ea1SDimitry Andric WasmSym->setSignature(Signature); 1508bcb0991SDimitry Andric WasmSym->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION); 1518bcb0991SDimitry Andric const MCExpr *Expr = 1528bcb0991SDimitry Andric MCSymbolRefExpr::create(WasmSym, MCSymbolRefExpr::VK_WASM_TYPEINDEX, Ctx); 1538bcb0991SDimitry Andric return MCOperand::createExpr(Expr); 1548bcb0991SDimitry Andric } 1558bcb0991SDimitry Andric 1568bcb0991SDimitry Andric static void getFunctionReturns(const MachineInstr *MI, 1578bcb0991SDimitry Andric SmallVectorImpl<wasm::ValType> &Returns) { 1588bcb0991SDimitry Andric const Function &F = MI->getMF()->getFunction(); 1598bcb0991SDimitry Andric const TargetMachine &TM = MI->getMF()->getTarget(); 1608bcb0991SDimitry Andric Type *RetTy = F.getReturnType(); 1618bcb0991SDimitry Andric SmallVector<MVT, 4> CallerRetTys; 1628bcb0991SDimitry Andric computeLegalValueVTs(F, TM, RetTy, CallerRetTys); 1638bcb0991SDimitry Andric valTypesFromMVTs(CallerRetTys, Returns); 1648bcb0991SDimitry Andric } 1658bcb0991SDimitry Andric 1660b57cec5SDimitry Andric void WebAssemblyMCInstLower::lower(const MachineInstr *MI, 1670b57cec5SDimitry Andric MCInst &OutMI) const { 1680b57cec5SDimitry Andric OutMI.setOpcode(MI->getOpcode()); 1690b57cec5SDimitry Andric 1700b57cec5SDimitry Andric const MCInstrDesc &Desc = MI->getDesc(); 1715ffd83dbSDimitry Andric unsigned NumVariadicDefs = MI->getNumExplicitDefs() - Desc.getNumDefs(); 1720b57cec5SDimitry Andric for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) { 1730b57cec5SDimitry Andric const MachineOperand &MO = MI->getOperand(I); 1740b57cec5SDimitry Andric 1750b57cec5SDimitry Andric MCOperand MCOp; 1760b57cec5SDimitry Andric switch (MO.getType()) { 1770b57cec5SDimitry Andric default: 1780b57cec5SDimitry Andric MI->print(errs()); 1790b57cec5SDimitry Andric llvm_unreachable("unknown operand type"); 1800b57cec5SDimitry Andric case MachineOperand::MO_MachineBasicBlock: 1810b57cec5SDimitry Andric MI->print(errs()); 1820b57cec5SDimitry Andric llvm_unreachable("MachineBasicBlock operand should have been rewritten"); 1830b57cec5SDimitry Andric case MachineOperand::MO_Register: { 1840b57cec5SDimitry Andric // Ignore all implicit register operands. 1850b57cec5SDimitry Andric if (MO.isImplicit()) 1860b57cec5SDimitry Andric continue; 1870b57cec5SDimitry Andric const WebAssemblyFunctionInfo &MFI = 1880b57cec5SDimitry Andric *MI->getParent()->getParent()->getInfo<WebAssemblyFunctionInfo>(); 1890b57cec5SDimitry Andric unsigned WAReg = MFI.getWAReg(MO.getReg()); 1900b57cec5SDimitry Andric MCOp = MCOperand::createReg(WAReg); 1910b57cec5SDimitry Andric break; 1920b57cec5SDimitry Andric } 1935ffd83dbSDimitry Andric case MachineOperand::MO_Immediate: { 1945ffd83dbSDimitry Andric unsigned DescIndex = I - NumVariadicDefs; 1955ffd83dbSDimitry Andric if (DescIndex < Desc.NumOperands) { 196bdd1243dSDimitry Andric const MCOperandInfo &Info = Desc.operands()[DescIndex]; 1970b57cec5SDimitry Andric if (Info.OperandType == WebAssembly::OPERAND_TYPEINDEX) { 1980b57cec5SDimitry Andric SmallVector<wasm::ValType, 4> Returns; 1990b57cec5SDimitry Andric SmallVector<wasm::ValType, 4> Params; 2000b57cec5SDimitry Andric 2010b57cec5SDimitry Andric const MachineRegisterInfo &MRI = 2020b57cec5SDimitry Andric MI->getParent()->getParent()->getRegInfo(); 2030b57cec5SDimitry Andric for (const MachineOperand &MO : MI->defs()) 2045f757f3fSDimitry Andric Returns.push_back(WebAssembly::regClassToValType( 2055f757f3fSDimitry Andric MRI.getRegClass(MO.getReg())->getID())); 2060b57cec5SDimitry Andric for (const MachineOperand &MO : MI->explicit_uses()) 2070b57cec5SDimitry Andric if (MO.isReg()) 2085f757f3fSDimitry Andric Params.push_back(WebAssembly::regClassToValType( 2095f757f3fSDimitry Andric MRI.getRegClass(MO.getReg())->getID())); 2100b57cec5SDimitry Andric 2110b57cec5SDimitry Andric // call_indirect instructions have a callee operand at the end which 2120b57cec5SDimitry Andric // doesn't count as a param. 2130b57cec5SDimitry Andric if (WebAssembly::isCallIndirect(MI->getOpcode())) 2140b57cec5SDimitry Andric Params.pop_back(); 2150b57cec5SDimitry Andric 2168bcb0991SDimitry Andric // return_call_indirect instructions have the return type of the 2178bcb0991SDimitry Andric // caller 2188bcb0991SDimitry Andric if (MI->getOpcode() == WebAssembly::RET_CALL_INDIRECT) 2198bcb0991SDimitry Andric getFunctionReturns(MI, Returns); 2200b57cec5SDimitry Andric 2218bcb0991SDimitry Andric MCOp = lowerTypeIndexOperand(std::move(Returns), std::move(Params)); 2220b57cec5SDimitry Andric break; 2238bcb0991SDimitry Andric } else if (Info.OperandType == WebAssembly::OPERAND_SIGNATURE) { 2248bcb0991SDimitry Andric auto BT = static_cast<WebAssembly::BlockType>(MO.getImm()); 2258bcb0991SDimitry Andric assert(BT != WebAssembly::BlockType::Invalid); 2268bcb0991SDimitry Andric if (BT == WebAssembly::BlockType::Multivalue) { 2278bcb0991SDimitry Andric SmallVector<wasm::ValType, 1> Returns; 2288bcb0991SDimitry Andric getFunctionReturns(MI, Returns); 2298bcb0991SDimitry Andric MCOp = lowerTypeIndexOperand(std::move(Returns), 2308bcb0991SDimitry Andric SmallVector<wasm::ValType, 4>()); 2318bcb0991SDimitry Andric break; 2328bcb0991SDimitry Andric } 2330b57cec5SDimitry Andric } 2340b57cec5SDimitry Andric } 2350b57cec5SDimitry Andric MCOp = MCOperand::createImm(MO.getImm()); 2360b57cec5SDimitry Andric break; 2375ffd83dbSDimitry Andric } 2380b57cec5SDimitry Andric case MachineOperand::MO_FPImmediate: { 2390b57cec5SDimitry Andric const ConstantFP *Imm = MO.getFPImm(); 240fe6060f1SDimitry Andric const uint64_t BitPattern = 241fe6060f1SDimitry Andric Imm->getValueAPF().bitcastToAPInt().getZExtValue(); 2420b57cec5SDimitry Andric if (Imm->getType()->isFloatTy()) 243fe6060f1SDimitry Andric MCOp = MCOperand::createSFPImm(static_cast<uint32_t>(BitPattern)); 2440b57cec5SDimitry Andric else if (Imm->getType()->isDoubleTy()) 245fe6060f1SDimitry Andric MCOp = MCOperand::createDFPImm(BitPattern); 2460b57cec5SDimitry Andric else 2470b57cec5SDimitry Andric llvm_unreachable("unknown floating point immediate type"); 2480b57cec5SDimitry Andric break; 2490b57cec5SDimitry Andric } 2500b57cec5SDimitry Andric case MachineOperand::MO_GlobalAddress: 2510b57cec5SDimitry Andric MCOp = lowerSymbolOperand(MO, GetGlobalAddressSymbol(MO)); 2520b57cec5SDimitry Andric break; 2530b57cec5SDimitry Andric case MachineOperand::MO_ExternalSymbol: 2540b57cec5SDimitry Andric MCOp = lowerSymbolOperand(MO, GetExternalSymbolSymbol(MO)); 2550b57cec5SDimitry Andric break; 2560b57cec5SDimitry Andric case MachineOperand::MO_MCSymbol: 2570b57cec5SDimitry Andric assert(MO.getTargetFlags() == 0 && 2580b57cec5SDimitry Andric "WebAssembly does not use target flags on MCSymbol"); 2590b57cec5SDimitry Andric MCOp = lowerSymbolOperand(MO, MO.getMCSymbol()); 2600b57cec5SDimitry Andric break; 2610b57cec5SDimitry Andric } 2620b57cec5SDimitry Andric 2630b57cec5SDimitry Andric OutMI.addOperand(MCOp); 2640b57cec5SDimitry Andric } 2650b57cec5SDimitry Andric 2660b57cec5SDimitry Andric if (!WasmKeepRegisters) 2670b57cec5SDimitry Andric removeRegisterOperands(MI, OutMI); 2685ffd83dbSDimitry Andric else if (Desc.variadicOpsAreDefs()) 2695ffd83dbSDimitry Andric OutMI.insert(OutMI.begin(), MCOperand::createImm(MI->getNumExplicitDefs())); 2700b57cec5SDimitry Andric } 2710b57cec5SDimitry Andric 2720b57cec5SDimitry Andric static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI) { 2730b57cec5SDimitry Andric // Remove all uses of stackified registers to bring the instruction format 2740b57cec5SDimitry Andric // into its final stack form used thruout MC, and transition opcodes to 2750b57cec5SDimitry Andric // their _S variant. 2765ffd83dbSDimitry Andric // We do this separate from the above code that still may need these 2770b57cec5SDimitry Andric // registers for e.g. call_indirect signatures. 2780b57cec5SDimitry Andric // See comments in lib/Target/WebAssembly/WebAssemblyInstrFormats.td for 2790b57cec5SDimitry Andric // details. 2800b57cec5SDimitry Andric // TODO: the code above creates new registers which are then removed here. 2810b57cec5SDimitry Andric // That code could be slightly simplified by not doing that, though maybe 2820b57cec5SDimitry Andric // it is simpler conceptually to keep the code above in "register mode" 2830b57cec5SDimitry Andric // until this transition point. 2840b57cec5SDimitry Andric // FIXME: we are not processing inline assembly, which contains register 2850b57cec5SDimitry Andric // operands, because it is used by later target generic code. 2860b57cec5SDimitry Andric if (MI->isDebugInstr() || MI->isLabel() || MI->isInlineAsm()) 2870b57cec5SDimitry Andric return; 2880b57cec5SDimitry Andric 2890b57cec5SDimitry Andric // Transform to _S instruction. 2900b57cec5SDimitry Andric auto RegOpcode = OutMI.getOpcode(); 2910b57cec5SDimitry Andric auto StackOpcode = WebAssembly::getStackOpcode(RegOpcode); 2920b57cec5SDimitry Andric assert(StackOpcode != -1 && "Failed to stackify instruction"); 2930b57cec5SDimitry Andric OutMI.setOpcode(StackOpcode); 2940b57cec5SDimitry Andric 2950b57cec5SDimitry Andric // Remove register operands. 2960b57cec5SDimitry Andric for (auto I = OutMI.getNumOperands(); I; --I) { 2970b57cec5SDimitry Andric auto &MO = OutMI.getOperand(I - 1); 2980b57cec5SDimitry Andric if (MO.isReg()) { 2990b57cec5SDimitry Andric OutMI.erase(&MO); 3000b57cec5SDimitry Andric } 3010b57cec5SDimitry Andric } 3020b57cec5SDimitry Andric } 303