xref: /freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp (revision e8d8bef961a50d4dc22501cde4fb9fb0be1b2532)
10b57cec5SDimitry Andric //===-- WebAssemblyExplicitLocals.cpp - Make Locals Explicit --------------===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric ///
90b57cec5SDimitry Andric /// \file
100b57cec5SDimitry Andric /// This file converts any remaining registers into WebAssembly locals.
110b57cec5SDimitry Andric ///
120b57cec5SDimitry Andric /// After register stackification and register coloring, convert non-stackified
130b57cec5SDimitry Andric /// registers into locals, inserting explicit local.get and local.set
140b57cec5SDimitry Andric /// instructions.
150b57cec5SDimitry Andric ///
160b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
170b57cec5SDimitry Andric 
180b57cec5SDimitry Andric #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
190b57cec5SDimitry Andric #include "WebAssembly.h"
20480093f4SDimitry Andric #include "WebAssemblyDebugValueManager.h"
210b57cec5SDimitry Andric #include "WebAssemblyMachineFunctionInfo.h"
220b57cec5SDimitry Andric #include "WebAssemblySubtarget.h"
230b57cec5SDimitry Andric #include "WebAssemblyUtilities.h"
240b57cec5SDimitry Andric #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
250b57cec5SDimitry Andric #include "llvm/CodeGen/MachineInstrBuilder.h"
260b57cec5SDimitry Andric #include "llvm/CodeGen/MachineRegisterInfo.h"
270b57cec5SDimitry Andric #include "llvm/CodeGen/Passes.h"
280b57cec5SDimitry Andric #include "llvm/Support/Debug.h"
290b57cec5SDimitry Andric #include "llvm/Support/raw_ostream.h"
300b57cec5SDimitry Andric using namespace llvm;
310b57cec5SDimitry Andric 
320b57cec5SDimitry Andric #define DEBUG_TYPE "wasm-explicit-locals"
330b57cec5SDimitry Andric 
340b57cec5SDimitry Andric namespace {
350b57cec5SDimitry Andric class WebAssemblyExplicitLocals final : public MachineFunctionPass {
360b57cec5SDimitry Andric   StringRef getPassName() const override {
370b57cec5SDimitry Andric     return "WebAssembly Explicit Locals";
380b57cec5SDimitry Andric   }
390b57cec5SDimitry Andric 
400b57cec5SDimitry Andric   void getAnalysisUsage(AnalysisUsage &AU) const override {
410b57cec5SDimitry Andric     AU.setPreservesCFG();
420b57cec5SDimitry Andric     AU.addPreserved<MachineBlockFrequencyInfo>();
430b57cec5SDimitry Andric     MachineFunctionPass::getAnalysisUsage(AU);
440b57cec5SDimitry Andric   }
450b57cec5SDimitry Andric 
460b57cec5SDimitry Andric   bool runOnMachineFunction(MachineFunction &MF) override;
470b57cec5SDimitry Andric 
480b57cec5SDimitry Andric public:
490b57cec5SDimitry Andric   static char ID; // Pass identification, replacement for typeid
500b57cec5SDimitry Andric   WebAssemblyExplicitLocals() : MachineFunctionPass(ID) {}
510b57cec5SDimitry Andric };
520b57cec5SDimitry Andric } // end anonymous namespace
530b57cec5SDimitry Andric 
540b57cec5SDimitry Andric char WebAssemblyExplicitLocals::ID = 0;
550b57cec5SDimitry Andric INITIALIZE_PASS(WebAssemblyExplicitLocals, DEBUG_TYPE,
560b57cec5SDimitry Andric                 "Convert registers to WebAssembly locals", false, false)
570b57cec5SDimitry Andric 
580b57cec5SDimitry Andric FunctionPass *llvm::createWebAssemblyExplicitLocals() {
590b57cec5SDimitry Andric   return new WebAssemblyExplicitLocals();
600b57cec5SDimitry Andric }
610b57cec5SDimitry Andric 
625ffd83dbSDimitry Andric static void checkFrameBase(WebAssemblyFunctionInfo &MFI, unsigned Local,
635ffd83dbSDimitry Andric                            unsigned Reg) {
645ffd83dbSDimitry Andric   // Mark a local for the frame base vreg.
655ffd83dbSDimitry Andric   if (MFI.isFrameBaseVirtual() && Reg == MFI.getFrameBaseVreg()) {
665ffd83dbSDimitry Andric     LLVM_DEBUG({
675ffd83dbSDimitry Andric       dbgs() << "Allocating local " << Local << "for VReg "
685ffd83dbSDimitry Andric              << Register::virtReg2Index(Reg) << '\n';
695ffd83dbSDimitry Andric     });
705ffd83dbSDimitry Andric     MFI.setFrameBaseLocal(Local);
715ffd83dbSDimitry Andric   }
725ffd83dbSDimitry Andric }
735ffd83dbSDimitry Andric 
740b57cec5SDimitry Andric /// Return a local id number for the given register, assigning it a new one
750b57cec5SDimitry Andric /// if it doesn't yet have one.
760b57cec5SDimitry Andric static unsigned getLocalId(DenseMap<unsigned, unsigned> &Reg2Local,
775ffd83dbSDimitry Andric                            WebAssemblyFunctionInfo &MFI, unsigned &CurLocal,
785ffd83dbSDimitry Andric                            unsigned Reg) {
790b57cec5SDimitry Andric   auto P = Reg2Local.insert(std::make_pair(Reg, CurLocal));
805ffd83dbSDimitry Andric   if (P.second) {
815ffd83dbSDimitry Andric     checkFrameBase(MFI, CurLocal, Reg);
820b57cec5SDimitry Andric     ++CurLocal;
835ffd83dbSDimitry Andric   }
840b57cec5SDimitry Andric   return P.first->second;
850b57cec5SDimitry Andric }
860b57cec5SDimitry Andric 
870b57cec5SDimitry Andric /// Get the appropriate drop opcode for the given register class.
880b57cec5SDimitry Andric static unsigned getDropOpcode(const TargetRegisterClass *RC) {
890b57cec5SDimitry Andric   if (RC == &WebAssembly::I32RegClass)
900b57cec5SDimitry Andric     return WebAssembly::DROP_I32;
910b57cec5SDimitry Andric   if (RC == &WebAssembly::I64RegClass)
920b57cec5SDimitry Andric     return WebAssembly::DROP_I64;
930b57cec5SDimitry Andric   if (RC == &WebAssembly::F32RegClass)
940b57cec5SDimitry Andric     return WebAssembly::DROP_F32;
950b57cec5SDimitry Andric   if (RC == &WebAssembly::F64RegClass)
960b57cec5SDimitry Andric     return WebAssembly::DROP_F64;
970b57cec5SDimitry Andric   if (RC == &WebAssembly::V128RegClass)
980b57cec5SDimitry Andric     return WebAssembly::DROP_V128;
99*e8d8bef9SDimitry Andric   if (RC == &WebAssembly::FUNCREFRegClass)
100*e8d8bef9SDimitry Andric     return WebAssembly::DROP_FUNCREF;
101*e8d8bef9SDimitry Andric   if (RC == &WebAssembly::EXTERNREFRegClass)
102*e8d8bef9SDimitry Andric     return WebAssembly::DROP_EXTERNREF;
1030b57cec5SDimitry Andric   llvm_unreachable("Unexpected register class");
1040b57cec5SDimitry Andric }
1050b57cec5SDimitry Andric 
1060b57cec5SDimitry Andric /// Get the appropriate local.get opcode for the given register class.
1070b57cec5SDimitry Andric static unsigned getLocalGetOpcode(const TargetRegisterClass *RC) {
1080b57cec5SDimitry Andric   if (RC == &WebAssembly::I32RegClass)
1090b57cec5SDimitry Andric     return WebAssembly::LOCAL_GET_I32;
1100b57cec5SDimitry Andric   if (RC == &WebAssembly::I64RegClass)
1110b57cec5SDimitry Andric     return WebAssembly::LOCAL_GET_I64;
1120b57cec5SDimitry Andric   if (RC == &WebAssembly::F32RegClass)
1130b57cec5SDimitry Andric     return WebAssembly::LOCAL_GET_F32;
1140b57cec5SDimitry Andric   if (RC == &WebAssembly::F64RegClass)
1150b57cec5SDimitry Andric     return WebAssembly::LOCAL_GET_F64;
1160b57cec5SDimitry Andric   if (RC == &WebAssembly::V128RegClass)
1170b57cec5SDimitry Andric     return WebAssembly::LOCAL_GET_V128;
118*e8d8bef9SDimitry Andric   if (RC == &WebAssembly::FUNCREFRegClass)
119*e8d8bef9SDimitry Andric     return WebAssembly::LOCAL_GET_FUNCREF;
120*e8d8bef9SDimitry Andric   if (RC == &WebAssembly::EXTERNREFRegClass)
121*e8d8bef9SDimitry Andric     return WebAssembly::LOCAL_GET_EXTERNREF;
1220b57cec5SDimitry Andric   llvm_unreachable("Unexpected register class");
1230b57cec5SDimitry Andric }
1240b57cec5SDimitry Andric 
1250b57cec5SDimitry Andric /// Get the appropriate local.set opcode for the given register class.
1260b57cec5SDimitry Andric static unsigned getLocalSetOpcode(const TargetRegisterClass *RC) {
1270b57cec5SDimitry Andric   if (RC == &WebAssembly::I32RegClass)
1280b57cec5SDimitry Andric     return WebAssembly::LOCAL_SET_I32;
1290b57cec5SDimitry Andric   if (RC == &WebAssembly::I64RegClass)
1300b57cec5SDimitry Andric     return WebAssembly::LOCAL_SET_I64;
1310b57cec5SDimitry Andric   if (RC == &WebAssembly::F32RegClass)
1320b57cec5SDimitry Andric     return WebAssembly::LOCAL_SET_F32;
1330b57cec5SDimitry Andric   if (RC == &WebAssembly::F64RegClass)
1340b57cec5SDimitry Andric     return WebAssembly::LOCAL_SET_F64;
1350b57cec5SDimitry Andric   if (RC == &WebAssembly::V128RegClass)
1360b57cec5SDimitry Andric     return WebAssembly::LOCAL_SET_V128;
137*e8d8bef9SDimitry Andric   if (RC == &WebAssembly::FUNCREFRegClass)
138*e8d8bef9SDimitry Andric     return WebAssembly::LOCAL_SET_FUNCREF;
139*e8d8bef9SDimitry Andric   if (RC == &WebAssembly::EXTERNREFRegClass)
140*e8d8bef9SDimitry Andric     return WebAssembly::LOCAL_SET_EXTERNREF;
1410b57cec5SDimitry Andric   llvm_unreachable("Unexpected register class");
1420b57cec5SDimitry Andric }
1430b57cec5SDimitry Andric 
1440b57cec5SDimitry Andric /// Get the appropriate local.tee opcode for the given register class.
1450b57cec5SDimitry Andric static unsigned getLocalTeeOpcode(const TargetRegisterClass *RC) {
1460b57cec5SDimitry Andric   if (RC == &WebAssembly::I32RegClass)
1470b57cec5SDimitry Andric     return WebAssembly::LOCAL_TEE_I32;
1480b57cec5SDimitry Andric   if (RC == &WebAssembly::I64RegClass)
1490b57cec5SDimitry Andric     return WebAssembly::LOCAL_TEE_I64;
1500b57cec5SDimitry Andric   if (RC == &WebAssembly::F32RegClass)
1510b57cec5SDimitry Andric     return WebAssembly::LOCAL_TEE_F32;
1520b57cec5SDimitry Andric   if (RC == &WebAssembly::F64RegClass)
1530b57cec5SDimitry Andric     return WebAssembly::LOCAL_TEE_F64;
1540b57cec5SDimitry Andric   if (RC == &WebAssembly::V128RegClass)
1550b57cec5SDimitry Andric     return WebAssembly::LOCAL_TEE_V128;
156*e8d8bef9SDimitry Andric   if (RC == &WebAssembly::FUNCREFRegClass)
157*e8d8bef9SDimitry Andric     return WebAssembly::LOCAL_TEE_FUNCREF;
158*e8d8bef9SDimitry Andric   if (RC == &WebAssembly::EXTERNREFRegClass)
159*e8d8bef9SDimitry Andric     return WebAssembly::LOCAL_TEE_EXTERNREF;
1600b57cec5SDimitry Andric   llvm_unreachable("Unexpected register class");
1610b57cec5SDimitry Andric }
1620b57cec5SDimitry Andric 
1630b57cec5SDimitry Andric /// Get the type associated with the given register class.
1640b57cec5SDimitry Andric static MVT typeForRegClass(const TargetRegisterClass *RC) {
1650b57cec5SDimitry Andric   if (RC == &WebAssembly::I32RegClass)
1660b57cec5SDimitry Andric     return MVT::i32;
1670b57cec5SDimitry Andric   if (RC == &WebAssembly::I64RegClass)
1680b57cec5SDimitry Andric     return MVT::i64;
1690b57cec5SDimitry Andric   if (RC == &WebAssembly::F32RegClass)
1700b57cec5SDimitry Andric     return MVT::f32;
1710b57cec5SDimitry Andric   if (RC == &WebAssembly::F64RegClass)
1720b57cec5SDimitry Andric     return MVT::f64;
1730b57cec5SDimitry Andric   if (RC == &WebAssembly::V128RegClass)
1740b57cec5SDimitry Andric     return MVT::v16i8;
175*e8d8bef9SDimitry Andric   if (RC == &WebAssembly::FUNCREFRegClass)
176*e8d8bef9SDimitry Andric     return MVT::funcref;
177*e8d8bef9SDimitry Andric   if (RC == &WebAssembly::EXTERNREFRegClass)
178*e8d8bef9SDimitry Andric     return MVT::externref;
1790b57cec5SDimitry Andric   llvm_unreachable("unrecognized register class");
1800b57cec5SDimitry Andric }
1810b57cec5SDimitry Andric 
1820b57cec5SDimitry Andric /// Given a MachineOperand of a stackified vreg, return the instruction at the
1830b57cec5SDimitry Andric /// start of the expression tree.
1840b57cec5SDimitry Andric static MachineInstr *findStartOfTree(MachineOperand &MO,
1850b57cec5SDimitry Andric                                      MachineRegisterInfo &MRI,
1865ffd83dbSDimitry Andric                                      const WebAssemblyFunctionInfo &MFI) {
1878bcb0991SDimitry Andric   Register Reg = MO.getReg();
1880b57cec5SDimitry Andric   assert(MFI.isVRegStackified(Reg));
1890b57cec5SDimitry Andric   MachineInstr *Def = MRI.getVRegDef(Reg);
1900b57cec5SDimitry Andric 
1915ffd83dbSDimitry Andric   // If this instruction has any non-stackified defs, it is the start
1925ffd83dbSDimitry Andric   for (auto DefReg : Def->defs()) {
1935ffd83dbSDimitry Andric     if (!MFI.isVRegStackified(DefReg.getReg())) {
1945ffd83dbSDimitry Andric       return Def;
1955ffd83dbSDimitry Andric     }
1965ffd83dbSDimitry Andric   }
1975ffd83dbSDimitry Andric 
1980b57cec5SDimitry Andric   // Find the first stackified use and proceed from there.
1990b57cec5SDimitry Andric   for (MachineOperand &DefMO : Def->explicit_uses()) {
2000b57cec5SDimitry Andric     if (!DefMO.isReg())
2010b57cec5SDimitry Andric       continue;
2020b57cec5SDimitry Andric     return findStartOfTree(DefMO, MRI, MFI);
2030b57cec5SDimitry Andric   }
2040b57cec5SDimitry Andric 
2050b57cec5SDimitry Andric   // If there were no stackified uses, we've reached the start.
2060b57cec5SDimitry Andric   return Def;
2070b57cec5SDimitry Andric }
2080b57cec5SDimitry Andric 
2090b57cec5SDimitry Andric bool WebAssemblyExplicitLocals::runOnMachineFunction(MachineFunction &MF) {
2100b57cec5SDimitry Andric   LLVM_DEBUG(dbgs() << "********** Make Locals Explicit **********\n"
2110b57cec5SDimitry Andric                        "********** Function: "
2120b57cec5SDimitry Andric                     << MF.getName() << '\n');
2130b57cec5SDimitry Andric 
2140b57cec5SDimitry Andric   bool Changed = false;
2150b57cec5SDimitry Andric   MachineRegisterInfo &MRI = MF.getRegInfo();
2160b57cec5SDimitry Andric   WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
2170b57cec5SDimitry Andric   const auto *TII = MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
2180b57cec5SDimitry Andric 
2190b57cec5SDimitry Andric   // Map non-stackified virtual registers to their local ids.
2200b57cec5SDimitry Andric   DenseMap<unsigned, unsigned> Reg2Local;
2210b57cec5SDimitry Andric 
2220b57cec5SDimitry Andric   // Handle ARGUMENTS first to ensure that they get the designated numbers.
2230b57cec5SDimitry Andric   for (MachineBasicBlock::iterator I = MF.begin()->begin(),
2240b57cec5SDimitry Andric                                    E = MF.begin()->end();
2250b57cec5SDimitry Andric        I != E;) {
2260b57cec5SDimitry Andric     MachineInstr &MI = *I++;
2270b57cec5SDimitry Andric     if (!WebAssembly::isArgument(MI.getOpcode()))
2280b57cec5SDimitry Andric       break;
2298bcb0991SDimitry Andric     Register Reg = MI.getOperand(0).getReg();
2300b57cec5SDimitry Andric     assert(!MFI.isVRegStackified(Reg));
2315ffd83dbSDimitry Andric     auto Local = static_cast<unsigned>(MI.getOperand(1).getImm());
2325ffd83dbSDimitry Andric     Reg2Local[Reg] = Local;
2335ffd83dbSDimitry Andric     checkFrameBase(MFI, Local, Reg);
234*e8d8bef9SDimitry Andric 
235*e8d8bef9SDimitry Andric     // Update debug value to point to the local before removing.
236*e8d8bef9SDimitry Andric     WebAssemblyDebugValueManager(&MI).replaceWithLocal(Local);
237*e8d8bef9SDimitry Andric 
2380b57cec5SDimitry Andric     MI.eraseFromParent();
2390b57cec5SDimitry Andric     Changed = true;
2400b57cec5SDimitry Andric   }
2410b57cec5SDimitry Andric 
2420b57cec5SDimitry Andric   // Start assigning local numbers after the last parameter.
2430b57cec5SDimitry Andric   unsigned CurLocal = static_cast<unsigned>(MFI.getParams().size());
2440b57cec5SDimitry Andric 
2450b57cec5SDimitry Andric   // Precompute the set of registers that are unused, so that we can insert
2460b57cec5SDimitry Andric   // drops to their defs.
2470b57cec5SDimitry Andric   BitVector UseEmpty(MRI.getNumVirtRegs());
2480b57cec5SDimitry Andric   for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I)
2498bcb0991SDimitry Andric     UseEmpty[I] = MRI.use_empty(Register::index2VirtReg(I));
2500b57cec5SDimitry Andric 
2510b57cec5SDimitry Andric   // Visit each instruction in the function.
2520b57cec5SDimitry Andric   for (MachineBasicBlock &MBB : MF) {
2530b57cec5SDimitry Andric     for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
2540b57cec5SDimitry Andric       MachineInstr &MI = *I++;
2550b57cec5SDimitry Andric       assert(!WebAssembly::isArgument(MI.getOpcode()));
2560b57cec5SDimitry Andric 
2570b57cec5SDimitry Andric       if (MI.isDebugInstr() || MI.isLabel())
2580b57cec5SDimitry Andric         continue;
2590b57cec5SDimitry Andric 
2605ffd83dbSDimitry Andric       if (MI.getOpcode() == WebAssembly::IMPLICIT_DEF) {
2615ffd83dbSDimitry Andric         MI.eraseFromParent();
2625ffd83dbSDimitry Andric         Changed = true;
2635ffd83dbSDimitry Andric         continue;
2645ffd83dbSDimitry Andric       }
2655ffd83dbSDimitry Andric 
2660b57cec5SDimitry Andric       // Replace tee instructions with local.tee. The difference is that tee
2670b57cec5SDimitry Andric       // instructions have two defs, while local.tee instructions have one def
2680b57cec5SDimitry Andric       // and an index of a local to write to.
2690b57cec5SDimitry Andric       if (WebAssembly::isTee(MI.getOpcode())) {
2700b57cec5SDimitry Andric         assert(MFI.isVRegStackified(MI.getOperand(0).getReg()));
2710b57cec5SDimitry Andric         assert(!MFI.isVRegStackified(MI.getOperand(1).getReg()));
2728bcb0991SDimitry Andric         Register OldReg = MI.getOperand(2).getReg();
2730b57cec5SDimitry Andric         const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
2740b57cec5SDimitry Andric 
2750b57cec5SDimitry Andric         // Stackify the input if it isn't stackified yet.
2760b57cec5SDimitry Andric         if (!MFI.isVRegStackified(OldReg)) {
2775ffd83dbSDimitry Andric           unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
2788bcb0991SDimitry Andric           Register NewReg = MRI.createVirtualRegister(RC);
2790b57cec5SDimitry Andric           unsigned Opc = getLocalGetOpcode(RC);
2800b57cec5SDimitry Andric           BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc), NewReg)
2810b57cec5SDimitry Andric               .addImm(LocalId);
2820b57cec5SDimitry Andric           MI.getOperand(2).setReg(NewReg);
2835ffd83dbSDimitry Andric           MFI.stackifyVReg(MRI, NewReg);
2840b57cec5SDimitry Andric         }
2850b57cec5SDimitry Andric 
2860b57cec5SDimitry Andric         // Replace the TEE with a LOCAL_TEE.
2870b57cec5SDimitry Andric         unsigned LocalId =
2885ffd83dbSDimitry Andric             getLocalId(Reg2Local, MFI, CurLocal, MI.getOperand(1).getReg());
2890b57cec5SDimitry Andric         unsigned Opc = getLocalTeeOpcode(RC);
2900b57cec5SDimitry Andric         BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc),
2910b57cec5SDimitry Andric                 MI.getOperand(0).getReg())
2920b57cec5SDimitry Andric             .addImm(LocalId)
2930b57cec5SDimitry Andric             .addReg(MI.getOperand(2).getReg());
2940b57cec5SDimitry Andric 
295480093f4SDimitry Andric         WebAssemblyDebugValueManager(&MI).replaceWithLocal(LocalId);
296480093f4SDimitry Andric 
2970b57cec5SDimitry Andric         MI.eraseFromParent();
2980b57cec5SDimitry Andric         Changed = true;
2990b57cec5SDimitry Andric         continue;
3000b57cec5SDimitry Andric       }
3010b57cec5SDimitry Andric 
3025ffd83dbSDimitry Andric       // Insert local.sets for any defs that aren't stackified yet.
3035ffd83dbSDimitry Andric       for (auto &Def : MI.defs()) {
3045ffd83dbSDimitry Andric         Register OldReg = Def.getReg();
3050b57cec5SDimitry Andric         if (!MFI.isVRegStackified(OldReg)) {
3060b57cec5SDimitry Andric           const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
3078bcb0991SDimitry Andric           Register NewReg = MRI.createVirtualRegister(RC);
3080b57cec5SDimitry Andric           auto InsertPt = std::next(MI.getIterator());
3098bcb0991SDimitry Andric           if (UseEmpty[Register::virtReg2Index(OldReg)]) {
3100b57cec5SDimitry Andric             unsigned Opc = getDropOpcode(RC);
3110b57cec5SDimitry Andric             MachineInstr *Drop =
3120b57cec5SDimitry Andric                 BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc))
3130b57cec5SDimitry Andric                     .addReg(NewReg);
3140b57cec5SDimitry Andric             // After the drop instruction, this reg operand will not be used
3150b57cec5SDimitry Andric             Drop->getOperand(0).setIsKill();
3165ffd83dbSDimitry Andric             if (MFI.isFrameBaseVirtual() && OldReg == MFI.getFrameBaseVreg())
3175ffd83dbSDimitry Andric               MFI.clearFrameBaseVreg();
3180b57cec5SDimitry Andric           } else {
3195ffd83dbSDimitry Andric             unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
3200b57cec5SDimitry Andric             unsigned Opc = getLocalSetOpcode(RC);
321480093f4SDimitry Andric 
322480093f4SDimitry Andric             WebAssemblyDebugValueManager(&MI).replaceWithLocal(LocalId);
323480093f4SDimitry Andric 
3240b57cec5SDimitry Andric             BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc))
3250b57cec5SDimitry Andric                 .addImm(LocalId)
3260b57cec5SDimitry Andric                 .addReg(NewReg);
3270b57cec5SDimitry Andric           }
3280b57cec5SDimitry Andric           // This register operand of the original instruction is now being used
3290b57cec5SDimitry Andric           // by the inserted drop or local.set instruction, so make it not dead
3300b57cec5SDimitry Andric           // yet.
3315ffd83dbSDimitry Andric           Def.setReg(NewReg);
3325ffd83dbSDimitry Andric           Def.setIsDead(false);
3335ffd83dbSDimitry Andric           MFI.stackifyVReg(MRI, NewReg);
3340b57cec5SDimitry Andric           Changed = true;
3350b57cec5SDimitry Andric         }
3360b57cec5SDimitry Andric       }
3370b57cec5SDimitry Andric 
3380b57cec5SDimitry Andric       // Insert local.gets for any uses that aren't stackified yet.
3390b57cec5SDimitry Andric       MachineInstr *InsertPt = &MI;
3400b57cec5SDimitry Andric       for (MachineOperand &MO : reverse(MI.explicit_uses())) {
3410b57cec5SDimitry Andric         if (!MO.isReg())
3420b57cec5SDimitry Andric           continue;
3430b57cec5SDimitry Andric 
3448bcb0991SDimitry Andric         Register OldReg = MO.getReg();
3450b57cec5SDimitry Andric 
3460b57cec5SDimitry Andric         // Inline asm may have a def in the middle of the operands. Our contract
3470b57cec5SDimitry Andric         // with inline asm register operands is to provide local indices as
3480b57cec5SDimitry Andric         // immediates.
3490b57cec5SDimitry Andric         if (MO.isDef()) {
3500b57cec5SDimitry Andric           assert(MI.isInlineAsm());
3515ffd83dbSDimitry Andric           unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
3520b57cec5SDimitry Andric           // If this register operand is tied to another operand, we can't
3530b57cec5SDimitry Andric           // change it to an immediate. Untie it first.
3540b57cec5SDimitry Andric           MI.untieRegOperand(MI.getOperandNo(&MO));
3550b57cec5SDimitry Andric           MO.ChangeToImmediate(LocalId);
3560b57cec5SDimitry Andric           continue;
3570b57cec5SDimitry Andric         }
3580b57cec5SDimitry Andric 
3590b57cec5SDimitry Andric         // If we see a stackified register, prepare to insert subsequent
3600b57cec5SDimitry Andric         // local.gets before the start of its tree.
3610b57cec5SDimitry Andric         if (MFI.isVRegStackified(OldReg)) {
3620b57cec5SDimitry Andric           InsertPt = findStartOfTree(MO, MRI, MFI);
3630b57cec5SDimitry Andric           continue;
3640b57cec5SDimitry Andric         }
3650b57cec5SDimitry Andric 
3660b57cec5SDimitry Andric         // Our contract with inline asm register operands is to provide local
3670b57cec5SDimitry Andric         // indices as immediates.
3680b57cec5SDimitry Andric         if (MI.isInlineAsm()) {
3695ffd83dbSDimitry Andric           unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
3700b57cec5SDimitry Andric           // Untie it first if this reg operand is tied to another operand.
3710b57cec5SDimitry Andric           MI.untieRegOperand(MI.getOperandNo(&MO));
3720b57cec5SDimitry Andric           MO.ChangeToImmediate(LocalId);
3730b57cec5SDimitry Andric           continue;
3740b57cec5SDimitry Andric         }
3750b57cec5SDimitry Andric 
3760b57cec5SDimitry Andric         // Insert a local.get.
3775ffd83dbSDimitry Andric         unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
3780b57cec5SDimitry Andric         const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
3798bcb0991SDimitry Andric         Register NewReg = MRI.createVirtualRegister(RC);
3800b57cec5SDimitry Andric         unsigned Opc = getLocalGetOpcode(RC);
3810b57cec5SDimitry Andric         InsertPt =
3820b57cec5SDimitry Andric             BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc), NewReg)
3830b57cec5SDimitry Andric                 .addImm(LocalId);
3840b57cec5SDimitry Andric         MO.setReg(NewReg);
3855ffd83dbSDimitry Andric         MFI.stackifyVReg(MRI, NewReg);
3860b57cec5SDimitry Andric         Changed = true;
3870b57cec5SDimitry Andric       }
3880b57cec5SDimitry Andric 
3890b57cec5SDimitry Andric       // Coalesce and eliminate COPY instructions.
3900b57cec5SDimitry Andric       if (WebAssembly::isCopy(MI.getOpcode())) {
3910b57cec5SDimitry Andric         MRI.replaceRegWith(MI.getOperand(1).getReg(),
3920b57cec5SDimitry Andric                            MI.getOperand(0).getReg());
3930b57cec5SDimitry Andric         MI.eraseFromParent();
3940b57cec5SDimitry Andric         Changed = true;
3950b57cec5SDimitry Andric       }
3960b57cec5SDimitry Andric     }
3970b57cec5SDimitry Andric   }
3980b57cec5SDimitry Andric 
3990b57cec5SDimitry Andric   // Define the locals.
4000b57cec5SDimitry Andric   // TODO: Sort the locals for better compression.
4010b57cec5SDimitry Andric   MFI.setNumLocals(CurLocal - MFI.getParams().size());
4020b57cec5SDimitry Andric   for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I) {
4038bcb0991SDimitry Andric     unsigned Reg = Register::index2VirtReg(I);
4040b57cec5SDimitry Andric     auto RL = Reg2Local.find(Reg);
4050b57cec5SDimitry Andric     if (RL == Reg2Local.end() || RL->second < MFI.getParams().size())
4060b57cec5SDimitry Andric       continue;
4070b57cec5SDimitry Andric 
4080b57cec5SDimitry Andric     MFI.setLocal(RL->second - MFI.getParams().size(),
4090b57cec5SDimitry Andric                  typeForRegClass(MRI.getRegClass(Reg)));
4100b57cec5SDimitry Andric     Changed = true;
4110b57cec5SDimitry Andric   }
4120b57cec5SDimitry Andric 
4130b57cec5SDimitry Andric #ifndef NDEBUG
4140b57cec5SDimitry Andric   // Assert that all registers have been stackified at this point.
4150b57cec5SDimitry Andric   for (const MachineBasicBlock &MBB : MF) {
4160b57cec5SDimitry Andric     for (const MachineInstr &MI : MBB) {
4170b57cec5SDimitry Andric       if (MI.isDebugInstr() || MI.isLabel())
4180b57cec5SDimitry Andric         continue;
4190b57cec5SDimitry Andric       for (const MachineOperand &MO : MI.explicit_operands()) {
4200b57cec5SDimitry Andric         assert(
4210b57cec5SDimitry Andric             (!MO.isReg() || MRI.use_empty(MO.getReg()) ||
4220b57cec5SDimitry Andric              MFI.isVRegStackified(MO.getReg())) &&
4230b57cec5SDimitry Andric             "WebAssemblyExplicitLocals failed to stackify a register operand");
4240b57cec5SDimitry Andric       }
4250b57cec5SDimitry Andric     }
4260b57cec5SDimitry Andric   }
4270b57cec5SDimitry Andric #endif
4280b57cec5SDimitry Andric 
4290b57cec5SDimitry Andric   return Changed;
4300b57cec5SDimitry Andric }
431