10b57cec5SDimitry Andric //===- SparcMachineFunctionInfo.h - Sparc Machine Function Info -*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This file declares Sparc specific per-machine-function information. 100b57cec5SDimitry Andric // 110b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_SPARC_SPARCMACHINEFUNCTIONINFO_H 130b57cec5SDimitry Andric #define LLVM_LIB_TARGET_SPARC_SPARCMACHINEFUNCTIONINFO_H 140b57cec5SDimitry Andric 150b57cec5SDimitry Andric #include "llvm/CodeGen/MachineFunction.h" 160b57cec5SDimitry Andric 170b57cec5SDimitry Andric namespace llvm { 180b57cec5SDimitry Andric 190b57cec5SDimitry Andric class SparcMachineFunctionInfo : public MachineFunctionInfo { 200b57cec5SDimitry Andric virtual void anchor(); 210b57cec5SDimitry Andric private: 225ffd83dbSDimitry Andric Register GlobalBaseReg; 230b57cec5SDimitry Andric 240b57cec5SDimitry Andric /// VarArgsFrameOffset - Frame offset to start of varargs area. 250b57cec5SDimitry Andric int VarArgsFrameOffset; 260b57cec5SDimitry Andric 270b57cec5SDimitry Andric /// SRetReturnReg - Holds the virtual register into which the sret 280b57cec5SDimitry Andric /// argument is passed. 295ffd83dbSDimitry Andric Register SRetReturnReg; 300b57cec5SDimitry Andric 310b57cec5SDimitry Andric /// IsLeafProc - True if the function is a leaf procedure. 320b57cec5SDimitry Andric bool IsLeafProc; 330b57cec5SDimitry Andric public: SparcMachineFunctionInfo()340b57cec5SDimitry Andric SparcMachineFunctionInfo() 350b57cec5SDimitry Andric : GlobalBaseReg(0), VarArgsFrameOffset(0), SRetReturnReg(0), 360b57cec5SDimitry Andric IsLeafProc(false) {} SparcMachineFunctionInfo(const Function & F,const TargetSubtargetInfo * STI)37*bdd1243dSDimitry Andric SparcMachineFunctionInfo(const Function &F, const TargetSubtargetInfo *STI) 380b57cec5SDimitry Andric : GlobalBaseReg(0), VarArgsFrameOffset(0), SRetReturnReg(0), 390b57cec5SDimitry Andric IsLeafProc(false) {} 400b57cec5SDimitry Andric 4181ad6265SDimitry Andric MachineFunctionInfo * 4281ad6265SDimitry Andric clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF, 4381ad6265SDimitry Andric const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB) 4481ad6265SDimitry Andric const override; 4581ad6265SDimitry Andric getGlobalBaseReg()465ffd83dbSDimitry Andric Register getGlobalBaseReg() const { return GlobalBaseReg; } setGlobalBaseReg(Register Reg)475ffd83dbSDimitry Andric void setGlobalBaseReg(Register Reg) { GlobalBaseReg = Reg; } 480b57cec5SDimitry Andric getVarArgsFrameOffset()490b57cec5SDimitry Andric int getVarArgsFrameOffset() const { return VarArgsFrameOffset; } setVarArgsFrameOffset(int Offset)500b57cec5SDimitry Andric void setVarArgsFrameOffset(int Offset) { VarArgsFrameOffset = Offset; } 510b57cec5SDimitry Andric getSRetReturnReg()525ffd83dbSDimitry Andric Register getSRetReturnReg() const { return SRetReturnReg; } setSRetReturnReg(Register Reg)535ffd83dbSDimitry Andric void setSRetReturnReg(Register Reg) { SRetReturnReg = Reg; } 540b57cec5SDimitry Andric setLeafProc(bool rhs)550b57cec5SDimitry Andric void setLeafProc(bool rhs) { IsLeafProc = rhs; } isLeafProc()560b57cec5SDimitry Andric bool isLeafProc() const { return IsLeafProc; } 570b57cec5SDimitry Andric }; 580b57cec5SDimitry Andric } 590b57cec5SDimitry Andric 600b57cec5SDimitry Andric #endif 61