1*0b57cec5SDimitry Andric //===-- PPCPredicates.cpp - PPC Branch Predicate Information --------------===// 2*0b57cec5SDimitry Andric // 3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric // 7*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric // 9*0b57cec5SDimitry Andric // This file implements the PowerPC branch predicates. 10*0b57cec5SDimitry Andric // 11*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 12*0b57cec5SDimitry Andric 13*0b57cec5SDimitry Andric #include "PPCPredicates.h" 14*0b57cec5SDimitry Andric #include "llvm/Support/ErrorHandling.h" 15*0b57cec5SDimitry Andric using namespace llvm; 16*0b57cec5SDimitry Andric InvertPredicate(PPC::Predicate Opcode)17*0b57cec5SDimitry AndricPPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) { 18*0b57cec5SDimitry Andric switch (Opcode) { 19*0b57cec5SDimitry Andric case PPC::PRED_EQ: return PPC::PRED_NE; 20*0b57cec5SDimitry Andric case PPC::PRED_NE: return PPC::PRED_EQ; 21*0b57cec5SDimitry Andric case PPC::PRED_LT: return PPC::PRED_GE; 22*0b57cec5SDimitry Andric case PPC::PRED_GE: return PPC::PRED_LT; 23*0b57cec5SDimitry Andric case PPC::PRED_GT: return PPC::PRED_LE; 24*0b57cec5SDimitry Andric case PPC::PRED_LE: return PPC::PRED_GT; 25*0b57cec5SDimitry Andric case PPC::PRED_NU: return PPC::PRED_UN; 26*0b57cec5SDimitry Andric case PPC::PRED_UN: return PPC::PRED_NU; 27*0b57cec5SDimitry Andric case PPC::PRED_EQ_MINUS: return PPC::PRED_NE_PLUS; 28*0b57cec5SDimitry Andric case PPC::PRED_NE_MINUS: return PPC::PRED_EQ_PLUS; 29*0b57cec5SDimitry Andric case PPC::PRED_LT_MINUS: return PPC::PRED_GE_PLUS; 30*0b57cec5SDimitry Andric case PPC::PRED_GE_MINUS: return PPC::PRED_LT_PLUS; 31*0b57cec5SDimitry Andric case PPC::PRED_GT_MINUS: return PPC::PRED_LE_PLUS; 32*0b57cec5SDimitry Andric case PPC::PRED_LE_MINUS: return PPC::PRED_GT_PLUS; 33*0b57cec5SDimitry Andric case PPC::PRED_NU_MINUS: return PPC::PRED_UN_PLUS; 34*0b57cec5SDimitry Andric case PPC::PRED_UN_MINUS: return PPC::PRED_NU_PLUS; 35*0b57cec5SDimitry Andric case PPC::PRED_EQ_PLUS: return PPC::PRED_NE_MINUS; 36*0b57cec5SDimitry Andric case PPC::PRED_NE_PLUS: return PPC::PRED_EQ_MINUS; 37*0b57cec5SDimitry Andric case PPC::PRED_LT_PLUS: return PPC::PRED_GE_MINUS; 38*0b57cec5SDimitry Andric case PPC::PRED_GE_PLUS: return PPC::PRED_LT_MINUS; 39*0b57cec5SDimitry Andric case PPC::PRED_GT_PLUS: return PPC::PRED_LE_MINUS; 40*0b57cec5SDimitry Andric case PPC::PRED_LE_PLUS: return PPC::PRED_GT_MINUS; 41*0b57cec5SDimitry Andric case PPC::PRED_NU_PLUS: return PPC::PRED_UN_MINUS; 42*0b57cec5SDimitry Andric case PPC::PRED_UN_PLUS: return PPC::PRED_NU_MINUS; 43*0b57cec5SDimitry Andric 44*0b57cec5SDimitry Andric // Simple predicates for single condition-register bits. 45*0b57cec5SDimitry Andric case PPC::PRED_BIT_SET: return PPC::PRED_BIT_UNSET; 46*0b57cec5SDimitry Andric case PPC::PRED_BIT_UNSET: return PPC::PRED_BIT_SET; 47*0b57cec5SDimitry Andric } 48*0b57cec5SDimitry Andric llvm_unreachable("Unknown PPC branch opcode!"); 49*0b57cec5SDimitry Andric } 50*0b57cec5SDimitry Andric getSwappedPredicate(PPC::Predicate Opcode)51*0b57cec5SDimitry AndricPPC::Predicate PPC::getSwappedPredicate(PPC::Predicate Opcode) { 52*0b57cec5SDimitry Andric switch (Opcode) { 53*0b57cec5SDimitry Andric case PPC::PRED_EQ: return PPC::PRED_EQ; 54*0b57cec5SDimitry Andric case PPC::PRED_NE: return PPC::PRED_NE; 55*0b57cec5SDimitry Andric case PPC::PRED_LT: return PPC::PRED_GT; 56*0b57cec5SDimitry Andric case PPC::PRED_GE: return PPC::PRED_LE; 57*0b57cec5SDimitry Andric case PPC::PRED_GT: return PPC::PRED_LT; 58*0b57cec5SDimitry Andric case PPC::PRED_LE: return PPC::PRED_GE; 59*0b57cec5SDimitry Andric case PPC::PRED_NU: return PPC::PRED_NU; 60*0b57cec5SDimitry Andric case PPC::PRED_UN: return PPC::PRED_UN; 61*0b57cec5SDimitry Andric case PPC::PRED_EQ_MINUS: return PPC::PRED_EQ_MINUS; 62*0b57cec5SDimitry Andric case PPC::PRED_NE_MINUS: return PPC::PRED_NE_MINUS; 63*0b57cec5SDimitry Andric case PPC::PRED_LT_MINUS: return PPC::PRED_GT_MINUS; 64*0b57cec5SDimitry Andric case PPC::PRED_GE_MINUS: return PPC::PRED_LE_MINUS; 65*0b57cec5SDimitry Andric case PPC::PRED_GT_MINUS: return PPC::PRED_LT_MINUS; 66*0b57cec5SDimitry Andric case PPC::PRED_LE_MINUS: return PPC::PRED_GE_MINUS; 67*0b57cec5SDimitry Andric case PPC::PRED_NU_MINUS: return PPC::PRED_NU_MINUS; 68*0b57cec5SDimitry Andric case PPC::PRED_UN_MINUS: return PPC::PRED_UN_MINUS; 69*0b57cec5SDimitry Andric case PPC::PRED_EQ_PLUS: return PPC::PRED_EQ_PLUS; 70*0b57cec5SDimitry Andric case PPC::PRED_NE_PLUS: return PPC::PRED_NE_PLUS; 71*0b57cec5SDimitry Andric case PPC::PRED_LT_PLUS: return PPC::PRED_GT_PLUS; 72*0b57cec5SDimitry Andric case PPC::PRED_GE_PLUS: return PPC::PRED_LE_PLUS; 73*0b57cec5SDimitry Andric case PPC::PRED_GT_PLUS: return PPC::PRED_LT_PLUS; 74*0b57cec5SDimitry Andric case PPC::PRED_LE_PLUS: return PPC::PRED_GE_PLUS; 75*0b57cec5SDimitry Andric case PPC::PRED_NU_PLUS: return PPC::PRED_NU_PLUS; 76*0b57cec5SDimitry Andric case PPC::PRED_UN_PLUS: return PPC::PRED_UN_PLUS; 77*0b57cec5SDimitry Andric 78*0b57cec5SDimitry Andric case PPC::PRED_BIT_SET: 79*0b57cec5SDimitry Andric case PPC::PRED_BIT_UNSET: 80*0b57cec5SDimitry Andric llvm_unreachable("Invalid use of bit predicate code"); 81*0b57cec5SDimitry Andric } 82*0b57cec5SDimitry Andric llvm_unreachable("Unknown PPC branch opcode!"); 83*0b57cec5SDimitry Andric } 84*0b57cec5SDimitry Andric 85