10b57cec5SDimitry Andric//===- MipsRegisterBank.td ---------------------------------*- tablegen -*-===// 20b57cec5SDimitry Andric// 30b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric// 70b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric// 90b57cec5SDimitry Andric// 100b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 110b57cec5SDimitry Andric 120b57cec5SDimitry Andricdef GPRBRegBank : RegisterBank<"GPRB", [GPR32]>; 130b57cec5SDimitry Andric 14*8bcb0991SDimitry Andricdef FPRBRegBank : RegisterBank<"FPRB", [FGR64, AFGR64, MSA128D]>; 15