10b57cec5SDimitry Andric //===-- MSP430TargetMachine.cpp - Define TargetMachine for MSP430 ---------===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // Top-level implementation for the MSP430 target. 100b57cec5SDimitry Andric // 110b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric 130b57cec5SDimitry Andric #include "MSP430TargetMachine.h" 140b57cec5SDimitry Andric #include "MSP430.h" 15bdd1243dSDimitry Andric #include "MSP430MachineFunctionInfo.h" 160b57cec5SDimitry Andric #include "TargetInfo/MSP430TargetInfo.h" 170b57cec5SDimitry Andric #include "llvm/CodeGen/Passes.h" 180b57cec5SDimitry Andric #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 190b57cec5SDimitry Andric #include "llvm/CodeGen/TargetPassConfig.h" 200b57cec5SDimitry Andric #include "llvm/MC/MCAsmInfo.h" 21349cc55cSDimitry Andric #include "llvm/MC/TargetRegistry.h" 22bdd1243dSDimitry Andric #include <optional> 230b57cec5SDimitry Andric using namespace llvm; 240b57cec5SDimitry Andric 25480093f4SDimitry Andric extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430Target() { 260b57cec5SDimitry Andric // Register the target. 270b57cec5SDimitry Andric RegisterTargetMachine<MSP430TargetMachine> X(getTheMSP430Target()); 28bdd1243dSDimitry Andric PassRegistry &PR = *PassRegistry::getPassRegistry(); 29*0fca6ea1SDimitry Andric initializeMSP430DAGToDAGISelLegacyPass(PR); 300b57cec5SDimitry Andric } 310b57cec5SDimitry Andric 32bdd1243dSDimitry Andric static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) { 3381ad6265SDimitry Andric return RM.value_or(Reloc::Static); 340b57cec5SDimitry Andric } 350b57cec5SDimitry Andric 360b57cec5SDimitry Andric static std::string computeDataLayout(const Triple &TT, StringRef CPU, 370b57cec5SDimitry Andric const TargetOptions &Options) { 380b57cec5SDimitry Andric return "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16"; 390b57cec5SDimitry Andric } 400b57cec5SDimitry Andric 410b57cec5SDimitry Andric MSP430TargetMachine::MSP430TargetMachine(const Target &T, const Triple &TT, 420b57cec5SDimitry Andric StringRef CPU, StringRef FS, 430b57cec5SDimitry Andric const TargetOptions &Options, 44bdd1243dSDimitry Andric std::optional<Reloc::Model> RM, 45bdd1243dSDimitry Andric std::optional<CodeModel::Model> CM, 465f757f3fSDimitry Andric CodeGenOptLevel OL, bool JIT) 470b57cec5SDimitry Andric : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS, 480b57cec5SDimitry Andric Options, getEffectiveRelocModel(RM), 490b57cec5SDimitry Andric getEffectiveCodeModel(CM, CodeModel::Small), OL), 508bcb0991SDimitry Andric TLOF(std::make_unique<TargetLoweringObjectFileELF>()), 515ffd83dbSDimitry Andric Subtarget(TT, std::string(CPU), std::string(FS), *this) { 520b57cec5SDimitry Andric initAsmInfo(); 530b57cec5SDimitry Andric } 540b57cec5SDimitry Andric 5581ad6265SDimitry Andric MSP430TargetMachine::~MSP430TargetMachine() = default; 560b57cec5SDimitry Andric 570b57cec5SDimitry Andric namespace { 580b57cec5SDimitry Andric /// MSP430 Code Generator Pass Configuration Options. 590b57cec5SDimitry Andric class MSP430PassConfig : public TargetPassConfig { 600b57cec5SDimitry Andric public: 610b57cec5SDimitry Andric MSP430PassConfig(MSP430TargetMachine &TM, PassManagerBase &PM) 620b57cec5SDimitry Andric : TargetPassConfig(TM, PM) {} 630b57cec5SDimitry Andric 640b57cec5SDimitry Andric MSP430TargetMachine &getMSP430TargetMachine() const { 650b57cec5SDimitry Andric return getTM<MSP430TargetMachine>(); 660b57cec5SDimitry Andric } 670b57cec5SDimitry Andric 681db9f3b2SDimitry Andric void addIRPasses() override; 690b57cec5SDimitry Andric bool addInstSelector() override; 700b57cec5SDimitry Andric void addPreEmitPass() override; 710b57cec5SDimitry Andric }; 720b57cec5SDimitry Andric } // namespace 730b57cec5SDimitry Andric 740b57cec5SDimitry Andric TargetPassConfig *MSP430TargetMachine::createPassConfig(PassManagerBase &PM) { 750b57cec5SDimitry Andric return new MSP430PassConfig(*this, PM); 760b57cec5SDimitry Andric } 770b57cec5SDimitry Andric 78bdd1243dSDimitry Andric MachineFunctionInfo *MSP430TargetMachine::createMachineFunctionInfo( 79bdd1243dSDimitry Andric BumpPtrAllocator &Allocator, const Function &F, 80bdd1243dSDimitry Andric const TargetSubtargetInfo *STI) const { 81bdd1243dSDimitry Andric return MSP430MachineFunctionInfo::create<MSP430MachineFunctionInfo>(Allocator, 82bdd1243dSDimitry Andric F, STI); 83bdd1243dSDimitry Andric } 84bdd1243dSDimitry Andric 851db9f3b2SDimitry Andric void MSP430PassConfig::addIRPasses() { 86*0fca6ea1SDimitry Andric addPass(createAtomicExpandLegacyPass()); 871db9f3b2SDimitry Andric 881db9f3b2SDimitry Andric TargetPassConfig::addIRPasses(); 891db9f3b2SDimitry Andric } 901db9f3b2SDimitry Andric 910b57cec5SDimitry Andric bool MSP430PassConfig::addInstSelector() { 920b57cec5SDimitry Andric // Install an instruction selector. 930b57cec5SDimitry Andric addPass(createMSP430ISelDag(getMSP430TargetMachine(), getOptLevel())); 940b57cec5SDimitry Andric return false; 950b57cec5SDimitry Andric } 960b57cec5SDimitry Andric 970b57cec5SDimitry Andric void MSP430PassConfig::addPreEmitPass() { 980b57cec5SDimitry Andric // Must run branch selection immediately preceding the asm printer. 99349cc55cSDimitry Andric addPass(createMSP430BranchSelectionPass()); 1000b57cec5SDimitry Andric } 101