10b57cec5SDimitry Andric //===-- BPFInstrInfo.h - BPF Instruction Information ------------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This file contains the BPF implementation of the TargetInstrInfo class. 100b57cec5SDimitry Andric // 110b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric 130b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_BPF_BPFINSTRINFO_H 140b57cec5SDimitry Andric #define LLVM_LIB_TARGET_BPF_BPFINSTRINFO_H 150b57cec5SDimitry Andric 160b57cec5SDimitry Andric #include "BPFRegisterInfo.h" 170b57cec5SDimitry Andric #include "llvm/CodeGen/TargetInstrInfo.h" 180b57cec5SDimitry Andric 190b57cec5SDimitry Andric #define GET_INSTRINFO_HEADER 200b57cec5SDimitry Andric #include "BPFGenInstrInfo.inc" 210b57cec5SDimitry Andric 220b57cec5SDimitry Andric namespace llvm { 230b57cec5SDimitry Andric 240b57cec5SDimitry Andric class BPFInstrInfo : public BPFGenInstrInfo { 250b57cec5SDimitry Andric const BPFRegisterInfo RI; 260b57cec5SDimitry Andric 270b57cec5SDimitry Andric public: 280b57cec5SDimitry Andric BPFInstrInfo(); 290b57cec5SDimitry Andric getRegisterInfo()300b57cec5SDimitry Andric const BPFRegisterInfo &getRegisterInfo() const { return RI; } 310b57cec5SDimitry Andric 320b57cec5SDimitry Andric void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 33480093f4SDimitry Andric const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, 340b57cec5SDimitry Andric bool KillSrc) const override; 350b57cec5SDimitry Andric 360b57cec5SDimitry Andric bool expandPostRAPseudo(MachineInstr &MI) const override; 370b57cec5SDimitry Andric 380b57cec5SDimitry Andric void storeRegToStackSlot(MachineBasicBlock &MBB, 395ffd83dbSDimitry Andric MachineBasicBlock::iterator MBBI, Register SrcReg, 400b57cec5SDimitry Andric bool isKill, int FrameIndex, 410b57cec5SDimitry Andric const TargetRegisterClass *RC, 42*bdd1243dSDimitry Andric const TargetRegisterInfo *TRI, 43*bdd1243dSDimitry Andric Register VReg) const override; 440b57cec5SDimitry Andric 450b57cec5SDimitry Andric void loadRegFromStackSlot(MachineBasicBlock &MBB, 465ffd83dbSDimitry Andric MachineBasicBlock::iterator MBBI, Register DestReg, 470b57cec5SDimitry Andric int FrameIndex, const TargetRegisterClass *RC, 48*bdd1243dSDimitry Andric const TargetRegisterInfo *TRI, 49*bdd1243dSDimitry Andric Register VReg) const override; 500b57cec5SDimitry Andric bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 510b57cec5SDimitry Andric MachineBasicBlock *&FBB, 520b57cec5SDimitry Andric SmallVectorImpl<MachineOperand> &Cond, 530b57cec5SDimitry Andric bool AllowModify) const override; 540b57cec5SDimitry Andric 550b57cec5SDimitry Andric unsigned removeBranch(MachineBasicBlock &MBB, 560b57cec5SDimitry Andric int *BytesRemoved = nullptr) const override; 570b57cec5SDimitry Andric unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 580b57cec5SDimitry Andric MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, 590b57cec5SDimitry Andric const DebugLoc &DL, 600b57cec5SDimitry Andric int *BytesAdded = nullptr) const override; 610b57cec5SDimitry Andric private: 620b57cec5SDimitry Andric void expandMEMCPY(MachineBasicBlock::iterator) const; 630b57cec5SDimitry Andric 640b57cec5SDimitry Andric }; 650b57cec5SDimitry Andric } 660b57cec5SDimitry Andric 670b57cec5SDimitry Andric #endif 68