10b57cec5SDimitry Andric //===-- AVRRegisterInfo.h - AVR Register Information Impl -------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This file contains the AVR implementation of the TargetRegisterInfo class. 100b57cec5SDimitry Andric // 110b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric 130b57cec5SDimitry Andric #ifndef LLVM_AVR_REGISTER_INFO_H 140b57cec5SDimitry Andric #define LLVM_AVR_REGISTER_INFO_H 150b57cec5SDimitry Andric 160b57cec5SDimitry Andric #include "llvm/CodeGen/TargetRegisterInfo.h" 170b57cec5SDimitry Andric 180b57cec5SDimitry Andric #define GET_REGINFO_HEADER 190b57cec5SDimitry Andric #include "AVRGenRegisterInfo.inc" 200b57cec5SDimitry Andric 210b57cec5SDimitry Andric namespace llvm { 220b57cec5SDimitry Andric 230b57cec5SDimitry Andric /// Utilities relating to AVR registers. 240b57cec5SDimitry Andric class AVRRegisterInfo : public AVRGenRegisterInfo { 250b57cec5SDimitry Andric public: 260b57cec5SDimitry Andric AVRRegisterInfo(); 270b57cec5SDimitry Andric 280b57cec5SDimitry Andric public: 290b57cec5SDimitry Andric const uint16_t * 3004eeddc0SDimitry Andric getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override; 310b57cec5SDimitry Andric const uint32_t *getCallPreservedMask(const MachineFunction &MF, 320b57cec5SDimitry Andric CallingConv::ID CC) const override; 330b57cec5SDimitry Andric BitVector getReservedRegs(const MachineFunction &MF) const override; 340b57cec5SDimitry Andric 350b57cec5SDimitry Andric const TargetRegisterClass * 360b57cec5SDimitry Andric getLargestLegalSuperClass(const TargetRegisterClass *RC, 370b57cec5SDimitry Andric const MachineFunction &MF) const override; 380b57cec5SDimitry Andric 390b57cec5SDimitry Andric /// Stack Frame Processing Methods 40*bdd1243dSDimitry Andric bool eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, 410b57cec5SDimitry Andric unsigned FIOperandNum, 4204eeddc0SDimitry Andric RegScavenger *RS = nullptr) const override; 430b57cec5SDimitry Andric 440b57cec5SDimitry Andric Register getFrameRegister(const MachineFunction &MF) const override; 450b57cec5SDimitry Andric 460b57cec5SDimitry Andric const TargetRegisterClass * 470b57cec5SDimitry Andric getPointerRegClass(const MachineFunction &MF, 480b57cec5SDimitry Andric unsigned Kind = 0) const override; 490b57cec5SDimitry Andric 500b57cec5SDimitry Andric /// Splits a 16-bit `DREGS` register into the lo/hi register pair. 510b57cec5SDimitry Andric /// \param Reg A 16-bit register to split. 525ffd83dbSDimitry Andric void splitReg(Register Reg, Register &LoReg, Register &HiReg) const; 530b57cec5SDimitry Andric 54349cc55cSDimitry Andric bool shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC, 55349cc55cSDimitry Andric unsigned SubReg, const TargetRegisterClass *DstRC, 56349cc55cSDimitry Andric unsigned DstSubReg, const TargetRegisterClass *NewRC, 570b57cec5SDimitry Andric LiveIntervals &LIS) const override; 580b57cec5SDimitry Andric }; 590b57cec5SDimitry Andric 600b57cec5SDimitry Andric } // end namespace llvm 610b57cec5SDimitry Andric 620b57cec5SDimitry Andric #endif // LLVM_AVR_REGISTER_INFO_H 63