10b57cec5SDimitry Andric //===-- ARMInstrInfo.h - ARM Instruction Information ------------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This file contains the ARM implementation of the TargetInstrInfo class. 100b57cec5SDimitry Andric // 110b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric 130b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_ARM_ARMINSTRINFO_H 140b57cec5SDimitry Andric #define LLVM_LIB_TARGET_ARM_ARMINSTRINFO_H 150b57cec5SDimitry Andric 160b57cec5SDimitry Andric #include "ARMBaseInstrInfo.h" 170b57cec5SDimitry Andric #include "ARMRegisterInfo.h" 180b57cec5SDimitry Andric 190b57cec5SDimitry Andric namespace llvm { 200b57cec5SDimitry Andric class ARMSubtarget; 210b57cec5SDimitry Andric 220b57cec5SDimitry Andric class ARMInstrInfo : public ARMBaseInstrInfo { 230b57cec5SDimitry Andric ARMRegisterInfo RI; 240b57cec5SDimitry Andric public: 250b57cec5SDimitry Andric explicit ARMInstrInfo(const ARMSubtarget &STI); 260b57cec5SDimitry Andric 270b57cec5SDimitry Andric /// Return the noop instruction to use for a noop. 28*fe6060f1SDimitry Andric MCInst getNop() const override; 290b57cec5SDimitry Andric 300b57cec5SDimitry Andric // Return the non-pre/post incrementing version of 'Opc'. Return 0 310b57cec5SDimitry Andric // if there is not such an opcode. 320b57cec5SDimitry Andric unsigned getUnindexedOpcode(unsigned Opc) const override; 330b57cec5SDimitry Andric 340b57cec5SDimitry Andric /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 350b57cec5SDimitry Andric /// such, whenever a client has an instance of instruction info, it should 360b57cec5SDimitry Andric /// always be able to get register info as well (through this method). 370b57cec5SDimitry Andric /// getRegisterInfo()380b57cec5SDimitry Andric const ARMRegisterInfo &getRegisterInfo() const override { return RI; } 390b57cec5SDimitry Andric 400b57cec5SDimitry Andric private: 410b57cec5SDimitry Andric void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override; 420b57cec5SDimitry Andric }; 430b57cec5SDimitry Andric 440b57cec5SDimitry Andric } 450b57cec5SDimitry Andric 460b57cec5SDimitry Andric #endif 47