181ad6265SDimitry Andric //===- AMDGPUMFMAIGroupLP.h - AMDGPU MFMA IGroupLP --------*- C++ -*-===// 281ad6265SDimitry Andric // 381ad6265SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 481ad6265SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 581ad6265SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 681ad6265SDimitry Andric // 781ad6265SDimitry Andric //===----------------------------------------------------------------------===// 881ad6265SDimitry Andric 981ad6265SDimitry Andric #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMFMAIGROUPLP_H 1081ad6265SDimitry Andric #define LLVM_LIB_TARGET_AMDGPU_AMDGPUMFMAIGROUPLP_H 1181ad6265SDimitry Andric 1281ad6265SDimitry Andric #include "llvm/CodeGen/ScheduleDAGMutation.h" 1381ad6265SDimitry Andric #include <memory> 14*0fca6ea1SDimitry Andric #include <vector> 1581ad6265SDimitry Andric 1681ad6265SDimitry Andric namespace llvm { 1781ad6265SDimitry Andric 18*0fca6ea1SDimitry Andric namespace AMDGPU { 19*0fca6ea1SDimitry Andric // The current phase of instruction scheduling 20*0fca6ea1SDimitry Andric enum class SchedulingPhase { Initial, PreRAReentry, PostRA }; 21*0fca6ea1SDimitry Andric } // namespace AMDGPU 22*0fca6ea1SDimitry Andric 23*0fca6ea1SDimitry Andric std::unique_ptr<ScheduleDAGMutation> 24*0fca6ea1SDimitry Andric createIGroupLPDAGMutation(AMDGPU::SchedulingPhase Phase); 2581ad6265SDimitry Andric 2681ad6265SDimitry Andric } // namespace llvm 2781ad6265SDimitry Andric 2881ad6265SDimitry Andric #endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUMFMAIGROUPLP_H 29