10b57cec5SDimitry Andric //===- lib/Target/AMDGPU/AMDGPUCallLowering.h - Call lowering -*- C++ -*---===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric /// 90b57cec5SDimitry Andric /// \file 100b57cec5SDimitry Andric /// This file describes how to lower LLVM calls to machine code calls. 110b57cec5SDimitry Andric /// 120b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUCALLLOWERING_H 150b57cec5SDimitry Andric #define LLVM_LIB_TARGET_AMDGPU_AMDGPUCALLLOWERING_H 160b57cec5SDimitry Andric 170b57cec5SDimitry Andric #include "llvm/CodeGen/GlobalISel/CallLowering.h" 180b57cec5SDimitry Andric 190b57cec5SDimitry Andric namespace llvm { 200b57cec5SDimitry Andric 210b57cec5SDimitry Andric class AMDGPUTargetLowering; 22fe6060f1SDimitry Andric class GCNSubtarget; 238bcb0991SDimitry Andric class MachineInstrBuilder; 24fe6060f1SDimitry Andric class SIMachineFunctionInfo; 250b57cec5SDimitry Andric 26e8d8bef9SDimitry Andric class AMDGPUCallLowering final : public CallLowering { 27fe6060f1SDimitry Andric void lowerParameterPtr(Register DstReg, MachineIRBuilder &B, 280b57cec5SDimitry Andric uint64_t Offset) const; 290b57cec5SDimitry Andric 30fe6060f1SDimitry Andric void lowerParameter(MachineIRBuilder &B, ArgInfo &AI, uint64_t Offset, 31fe6060f1SDimitry Andric Align Alignment) const; 32e8d8bef9SDimitry Andric 33e8d8bef9SDimitry Andric bool canLowerReturn(MachineFunction &MF, CallingConv::ID CallConv, 34e8d8bef9SDimitry Andric SmallVectorImpl<BaseArgInfo> &Outs, 35e8d8bef9SDimitry Andric bool IsVarArg) const override; 368bcb0991SDimitry Andric 378bcb0991SDimitry Andric bool lowerReturnVal(MachineIRBuilder &B, const Value *Val, 388bcb0991SDimitry Andric ArrayRef<Register> VRegs, MachineInstrBuilder &Ret) const; 390b57cec5SDimitry Andric 400b57cec5SDimitry Andric public: 410b57cec5SDimitry Andric AMDGPUCallLowering(const AMDGPUTargetLowering &TLI); 420b57cec5SDimitry Andric 438bcb0991SDimitry Andric bool lowerReturn(MachineIRBuilder &B, const Value *Val, 44e8d8bef9SDimitry Andric ArrayRef<Register> VRegs, 45e8d8bef9SDimitry Andric FunctionLoweringInfo &FLI) const override; 460b57cec5SDimitry Andric 478bcb0991SDimitry Andric bool lowerFormalArgumentsKernel(MachineIRBuilder &B, const Function &F, 480b57cec5SDimitry Andric ArrayRef<ArrayRef<Register>> VRegs) const; 490b57cec5SDimitry Andric 508bcb0991SDimitry Andric bool lowerFormalArguments(MachineIRBuilder &B, const Function &F, 51e8d8bef9SDimitry Andric ArrayRef<ArrayRef<Register>> VRegs, 52e8d8bef9SDimitry Andric FunctionLoweringInfo &FLI) const override; 53e8d8bef9SDimitry Andric 54e8d8bef9SDimitry Andric bool passSpecialInputs(MachineIRBuilder &MIRBuilder, 55e8d8bef9SDimitry Andric CCState &CCInfo, 56e8d8bef9SDimitry Andric SmallVectorImpl<std::pair<MCRegister, Register>> &ArgRegs, 57e8d8bef9SDimitry Andric CallLoweringInfo &Info) const; 58e8d8bef9SDimitry Andric 59fe6060f1SDimitry Andric bool 60fe6060f1SDimitry Andric doCallerAndCalleePassArgsTheSameWay(CallLoweringInfo &Info, 61fe6060f1SDimitry Andric MachineFunction &MF, 62fe6060f1SDimitry Andric SmallVectorImpl<ArgInfo> &InArgs) const; 63fe6060f1SDimitry Andric 64fe6060f1SDimitry Andric bool 65fe6060f1SDimitry Andric areCalleeOutgoingArgsTailCallable(CallLoweringInfo &Info, MachineFunction &MF, 66fe6060f1SDimitry Andric SmallVectorImpl<ArgInfo> &OutArgs) const; 67fe6060f1SDimitry Andric 68fe6060f1SDimitry Andric /// Returns true if the call can be lowered as a tail call. 69fe6060f1SDimitry Andric bool 70fe6060f1SDimitry Andric isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder, 71fe6060f1SDimitry Andric CallLoweringInfo &Info, 72fe6060f1SDimitry Andric SmallVectorImpl<ArgInfo> &InArgs, 73fe6060f1SDimitry Andric SmallVectorImpl<ArgInfo> &OutArgs) const; 74fe6060f1SDimitry Andric 75fe6060f1SDimitry Andric void handleImplicitCallArguments( 76fe6060f1SDimitry Andric MachineIRBuilder &MIRBuilder, MachineInstrBuilder &CallInst, 77fe6060f1SDimitry Andric const GCNSubtarget &ST, const SIMachineFunctionInfo &MFI, 78*5f757f3fSDimitry Andric CallingConv::ID CalleeCC, 79fe6060f1SDimitry Andric ArrayRef<std::pair<MCRegister, Register>> ImplicitArgRegs) const; 80fe6060f1SDimitry Andric 81fe6060f1SDimitry Andric bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info, 82fe6060f1SDimitry Andric SmallVectorImpl<ArgInfo> &OutArgs) const; 83*5f757f3fSDimitry Andric bool lowerChainCall(MachineIRBuilder &MIRBuilder, 84*5f757f3fSDimitry Andric CallLoweringInfo &Info) const; 85e8d8bef9SDimitry Andric bool lowerCall(MachineIRBuilder &MIRBuilder, 86e8d8bef9SDimitry Andric CallLoweringInfo &Info) const override; 87e8d8bef9SDimitry Andric 880b57cec5SDimitry Andric static CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg); 890b57cec5SDimitry Andric static CCAssignFn *CCAssignFnForReturn(CallingConv::ID CC, bool IsVarArg); 900b57cec5SDimitry Andric }; 910b57cec5SDimitry Andric } // End of namespace llvm; 920b57cec5SDimitry Andric #endif 93