1*0b57cec5SDimitry Andric //==- AArch64PBQPRegAlloc.h - AArch64 specific PBQP constraints --*- C++ -*-==// 2*0b57cec5SDimitry Andric // 3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric // 7*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric 9*0b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64PBQPREGALOC_H 10*0b57cec5SDimitry Andric #define LLVM_LIB_TARGET_AARCH64_AARCH64PBQPREGALOC_H 11*0b57cec5SDimitry Andric 12*0b57cec5SDimitry Andric #include "llvm/ADT/SetVector.h" 13*0b57cec5SDimitry Andric #include "llvm/CodeGen/PBQPRAConstraint.h" 14*0b57cec5SDimitry Andric 15*0b57cec5SDimitry Andric namespace llvm { 16*0b57cec5SDimitry Andric 17*0b57cec5SDimitry Andric class TargetRegisterInfo; 18*0b57cec5SDimitry Andric 19*0b57cec5SDimitry Andric /// Add the accumulator chaining constraint to a PBQP graph 20*0b57cec5SDimitry Andric class A57ChainingConstraint : public PBQPRAConstraint { 21*0b57cec5SDimitry Andric public: 22*0b57cec5SDimitry Andric // Add A57 specific constraints to the PBQP graph. 23*0b57cec5SDimitry Andric void apply(PBQPRAGraph &G) override; 24*0b57cec5SDimitry Andric 25*0b57cec5SDimitry Andric private: 26*0b57cec5SDimitry Andric SmallSetVector<unsigned, 32> Chains; 27*0b57cec5SDimitry Andric const TargetRegisterInfo *TRI; 28*0b57cec5SDimitry Andric 29*0b57cec5SDimitry Andric // Add the accumulator chaining constraint, inside the chain, i.e. so that 30*0b57cec5SDimitry Andric // parity(Rd) == parity(Ra). 31*0b57cec5SDimitry Andric // \return true if a constraint was added 32*0b57cec5SDimitry Andric bool addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra); 33*0b57cec5SDimitry Andric 34*0b57cec5SDimitry Andric // Add constraints between existing chains 35*0b57cec5SDimitry Andric void addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra); 36*0b57cec5SDimitry Andric }; 37*0b57cec5SDimitry Andric 38*0b57cec5SDimitry Andric } // end namespace llvm 39*0b57cec5SDimitry Andric 40*0b57cec5SDimitry Andric #endif // LLVM_LIB_TARGET_AARCH64_AARCH64PBQPREGALOC_H 41