1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This implements the SelectionDAG::dump method and friends. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "llvm/ADT/APFloat.h" 14 #include "llvm/ADT/APInt.h" 15 #include "llvm/ADT/None.h" 16 #include "llvm/ADT/SmallPtrSet.h" 17 #include "llvm/ADT/StringExtras.h" 18 #include "llvm/CodeGen/ISDOpcodes.h" 19 #include "llvm/CodeGen/MachineBasicBlock.h" 20 #include "llvm/CodeGen/MachineConstantPool.h" 21 #include "llvm/CodeGen/MachineMemOperand.h" 22 #include "llvm/CodeGen/SelectionDAG.h" 23 #include "llvm/CodeGen/SelectionDAGNodes.h" 24 #include "llvm/CodeGen/TargetInstrInfo.h" 25 #include "llvm/CodeGen/TargetLowering.h" 26 #include "llvm/CodeGen/TargetRegisterInfo.h" 27 #include "llvm/CodeGen/TargetSubtargetInfo.h" 28 #include "llvm/CodeGen/ValueTypes.h" 29 #include "llvm/Config/llvm-config.h" 30 #include "llvm/IR/BasicBlock.h" 31 #include "llvm/IR/Constants.h" 32 #include "llvm/IR/DebugInfoMetadata.h" 33 #include "llvm/IR/DebugLoc.h" 34 #include "llvm/IR/Function.h" 35 #include "llvm/IR/Intrinsics.h" 36 #include "llvm/IR/ModuleSlotTracker.h" 37 #include "llvm/IR/Value.h" 38 #include "llvm/Support/Casting.h" 39 #include "llvm/Support/CommandLine.h" 40 #include "llvm/Support/Compiler.h" 41 #include "llvm/Support/Debug.h" 42 #include "llvm/Support/ErrorHandling.h" 43 #include "llvm/Support/MachineValueType.h" 44 #include "llvm/Support/Printable.h" 45 #include "llvm/Support/raw_ostream.h" 46 #include "llvm/Target/TargetIntrinsicInfo.h" 47 #include "llvm/Target/TargetMachine.h" 48 #include "SDNodeDbgValue.h" 49 #include <cstdint> 50 #include <iterator> 51 52 using namespace llvm; 53 54 static cl::opt<bool> 55 VerboseDAGDumping("dag-dump-verbose", cl::Hidden, 56 cl::desc("Display more information when dumping selection " 57 "DAG nodes.")); 58 59 std::string SDNode::getOperationName(const SelectionDAG *G) const { 60 switch (getOpcode()) { 61 default: 62 if (getOpcode() < ISD::BUILTIN_OP_END) 63 return "<<Unknown DAG Node>>"; 64 if (isMachineOpcode()) { 65 if (G) 66 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo()) 67 if (getMachineOpcode() < TII->getNumOpcodes()) 68 return TII->getName(getMachineOpcode()); 69 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 70 } 71 if (G) { 72 const TargetLowering &TLI = G->getTargetLoweringInfo(); 73 const char *Name = TLI.getTargetNodeName(getOpcode()); 74 if (Name) return Name; 75 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 76 } 77 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 78 79 #ifndef NDEBUG 80 case ISD::DELETED_NODE: return "<<Deleted Node!>>"; 81 #endif 82 case ISD::PREFETCH: return "Prefetch"; 83 case ISD::ATOMIC_FENCE: return "AtomicFence"; 84 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 85 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess"; 86 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 87 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 88 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 89 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 90 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr"; 91 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 92 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 93 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 94 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 95 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 96 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 97 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 98 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd"; 99 case ISD::ATOMIC_LOAD: return "AtomicLoad"; 100 case ISD::ATOMIC_STORE: return "AtomicStore"; 101 case ISD::PCMARKER: return "PCMarker"; 102 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 103 case ISD::SRCVALUE: return "SrcValue"; 104 case ISD::MDNODE_SDNODE: return "MDNode"; 105 case ISD::EntryToken: return "EntryToken"; 106 case ISD::TokenFactor: return "TokenFactor"; 107 case ISD::AssertSext: return "AssertSext"; 108 case ISD::AssertZext: return "AssertZext"; 109 110 case ISD::BasicBlock: return "BasicBlock"; 111 case ISD::VALUETYPE: return "ValueType"; 112 case ISD::Register: return "Register"; 113 case ISD::RegisterMask: return "RegisterMask"; 114 case ISD::Constant: 115 if (cast<ConstantSDNode>(this)->isOpaque()) 116 return "OpaqueConstant"; 117 return "Constant"; 118 case ISD::ConstantFP: return "ConstantFP"; 119 case ISD::GlobalAddress: return "GlobalAddress"; 120 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 121 case ISD::FrameIndex: return "FrameIndex"; 122 case ISD::JumpTable: return "JumpTable"; 123 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 124 case ISD::RETURNADDR: return "RETURNADDR"; 125 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR"; 126 case ISD::FRAMEADDR: return "FRAMEADDR"; 127 case ISD::SPONENTRY: return "SPONENTRY"; 128 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER"; 129 case ISD::READ_REGISTER: return "READ_REGISTER"; 130 case ISD::WRITE_REGISTER: return "WRITE_REGISTER"; 131 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 132 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA"; 133 case ISD::EH_RETURN: return "EH_RETURN"; 134 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 135 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 136 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH"; 137 case ISD::ConstantPool: return "ConstantPool"; 138 case ISD::TargetIndex: return "TargetIndex"; 139 case ISD::ExternalSymbol: return "ExternalSymbol"; 140 case ISD::BlockAddress: return "BlockAddress"; 141 case ISD::INTRINSIC_WO_CHAIN: 142 case ISD::INTRINSIC_VOID: 143 case ISD::INTRINSIC_W_CHAIN: { 144 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 145 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 146 if (IID < Intrinsic::num_intrinsics) 147 return Intrinsic::getName((Intrinsic::ID)IID, None); 148 else if (!G) 149 return "Unknown intrinsic"; 150 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 151 return TII->getName(IID); 152 llvm_unreachable("Invalid intrinsic ID"); 153 } 154 155 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 156 case ISD::TargetConstant: 157 if (cast<ConstantSDNode>(this)->isOpaque()) 158 return "OpaqueTargetConstant"; 159 return "TargetConstant"; 160 case ISD::TargetConstantFP: return "TargetConstantFP"; 161 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 162 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 163 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 164 case ISD::TargetJumpTable: return "TargetJumpTable"; 165 case ISD::TargetConstantPool: return "TargetConstantPool"; 166 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 167 case ISD::MCSymbol: return "MCSymbol"; 168 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 169 170 case ISD::CopyToReg: return "CopyToReg"; 171 case ISD::CopyFromReg: return "CopyFromReg"; 172 case ISD::UNDEF: return "undef"; 173 case ISD::MERGE_VALUES: return "merge_values"; 174 case ISD::INLINEASM: return "inlineasm"; 175 case ISD::INLINEASM_BR: return "inlineasm_br"; 176 case ISD::EH_LABEL: return "eh_label"; 177 case ISD::ANNOTATION_LABEL: return "annotation_label"; 178 case ISD::HANDLENODE: return "handlenode"; 179 180 // Unary operators 181 case ISD::FABS: return "fabs"; 182 case ISD::FMINNUM: return "fminnum"; 183 case ISD::STRICT_FMINNUM: return "strict_fminnum"; 184 case ISD::FMAXNUM: return "fmaxnum"; 185 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum"; 186 case ISD::FMINNUM_IEEE: return "fminnum_ieee"; 187 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee"; 188 case ISD::FMINIMUM: return "fminimum"; 189 case ISD::FMAXIMUM: return "fmaximum"; 190 case ISD::FNEG: return "fneg"; 191 case ISD::FSQRT: return "fsqrt"; 192 case ISD::STRICT_FSQRT: return "strict_fsqrt"; 193 case ISD::FCBRT: return "fcbrt"; 194 case ISD::FSIN: return "fsin"; 195 case ISD::STRICT_FSIN: return "strict_fsin"; 196 case ISD::FCOS: return "fcos"; 197 case ISD::STRICT_FCOS: return "strict_fcos"; 198 case ISD::FSINCOS: return "fsincos"; 199 case ISD::FTRUNC: return "ftrunc"; 200 case ISD::STRICT_FTRUNC: return "strict_ftrunc"; 201 case ISD::FFLOOR: return "ffloor"; 202 case ISD::STRICT_FFLOOR: return "strict_ffloor"; 203 case ISD::FCEIL: return "fceil"; 204 case ISD::STRICT_FCEIL: return "strict_fceil"; 205 case ISD::FRINT: return "frint"; 206 case ISD::STRICT_FRINT: return "strict_frint"; 207 case ISD::FNEARBYINT: return "fnearbyint"; 208 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint"; 209 case ISD::FROUND: return "fround"; 210 case ISD::STRICT_FROUND: return "strict_fround"; 211 case ISD::FEXP: return "fexp"; 212 case ISD::STRICT_FEXP: return "strict_fexp"; 213 case ISD::FEXP2: return "fexp2"; 214 case ISD::STRICT_FEXP2: return "strict_fexp2"; 215 case ISD::FLOG: return "flog"; 216 case ISD::STRICT_FLOG: return "strict_flog"; 217 case ISD::FLOG2: return "flog2"; 218 case ISD::STRICT_FLOG2: return "strict_flog2"; 219 case ISD::FLOG10: return "flog10"; 220 case ISD::STRICT_FLOG10: return "strict_flog10"; 221 222 // Binary operators 223 case ISD::ADD: return "add"; 224 case ISD::SUB: return "sub"; 225 case ISD::MUL: return "mul"; 226 case ISD::MULHU: return "mulhu"; 227 case ISD::MULHS: return "mulhs"; 228 case ISD::SDIV: return "sdiv"; 229 case ISD::UDIV: return "udiv"; 230 case ISD::SREM: return "srem"; 231 case ISD::UREM: return "urem"; 232 case ISD::SMUL_LOHI: return "smul_lohi"; 233 case ISD::UMUL_LOHI: return "umul_lohi"; 234 case ISD::SDIVREM: return "sdivrem"; 235 case ISD::UDIVREM: return "udivrem"; 236 case ISD::AND: return "and"; 237 case ISD::OR: return "or"; 238 case ISD::XOR: return "xor"; 239 case ISD::SHL: return "shl"; 240 case ISD::SRA: return "sra"; 241 case ISD::SRL: return "srl"; 242 case ISD::ROTL: return "rotl"; 243 case ISD::ROTR: return "rotr"; 244 case ISD::FSHL: return "fshl"; 245 case ISD::FSHR: return "fshr"; 246 case ISD::FADD: return "fadd"; 247 case ISD::STRICT_FADD: return "strict_fadd"; 248 case ISD::FSUB: return "fsub"; 249 case ISD::STRICT_FSUB: return "strict_fsub"; 250 case ISD::FMUL: return "fmul"; 251 case ISD::STRICT_FMUL: return "strict_fmul"; 252 case ISD::FDIV: return "fdiv"; 253 case ISD::STRICT_FDIV: return "strict_fdiv"; 254 case ISD::FMA: return "fma"; 255 case ISD::STRICT_FMA: return "strict_fma"; 256 case ISD::FMAD: return "fmad"; 257 case ISD::FREM: return "frem"; 258 case ISD::STRICT_FREM: return "strict_frem"; 259 case ISD::FCOPYSIGN: return "fcopysign"; 260 case ISD::FGETSIGN: return "fgetsign"; 261 case ISD::FCANONICALIZE: return "fcanonicalize"; 262 case ISD::FPOW: return "fpow"; 263 case ISD::STRICT_FPOW: return "strict_fpow"; 264 case ISD::SMIN: return "smin"; 265 case ISD::SMAX: return "smax"; 266 case ISD::UMIN: return "umin"; 267 case ISD::UMAX: return "umax"; 268 269 case ISD::FPOWI: return "fpowi"; 270 case ISD::STRICT_FPOWI: return "strict_fpowi"; 271 case ISD::SETCC: return "setcc"; 272 case ISD::SETCCCARRY: return "setcccarry"; 273 case ISD::SELECT: return "select"; 274 case ISD::VSELECT: return "vselect"; 275 case ISD::SELECT_CC: return "select_cc"; 276 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 277 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 278 case ISD::CONCAT_VECTORS: return "concat_vectors"; 279 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 280 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 281 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 282 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 283 case ISD::SPLAT_VECTOR: return "splat_vector"; 284 case ISD::CARRY_FALSE: return "carry_false"; 285 case ISD::ADDC: return "addc"; 286 case ISD::ADDE: return "adde"; 287 case ISD::ADDCARRY: return "addcarry"; 288 case ISD::SADDO: return "saddo"; 289 case ISD::UADDO: return "uaddo"; 290 case ISD::SSUBO: return "ssubo"; 291 case ISD::USUBO: return "usubo"; 292 case ISD::SMULO: return "smulo"; 293 case ISD::UMULO: return "umulo"; 294 case ISD::SUBC: return "subc"; 295 case ISD::SUBE: return "sube"; 296 case ISD::SUBCARRY: return "subcarry"; 297 case ISD::SHL_PARTS: return "shl_parts"; 298 case ISD::SRA_PARTS: return "sra_parts"; 299 case ISD::SRL_PARTS: return "srl_parts"; 300 301 case ISD::SADDSAT: return "saddsat"; 302 case ISD::UADDSAT: return "uaddsat"; 303 case ISD::SSUBSAT: return "ssubsat"; 304 case ISD::USUBSAT: return "usubsat"; 305 306 case ISD::SMULFIX: return "smulfix"; 307 case ISD::SMULFIXSAT: return "smulfixsat"; 308 case ISD::UMULFIX: return "umulfix"; 309 case ISD::UMULFIXSAT: return "umulfixsat"; 310 311 // Conversion operators. 312 case ISD::SIGN_EXTEND: return "sign_extend"; 313 case ISD::ZERO_EXTEND: return "zero_extend"; 314 case ISD::ANY_EXTEND: return "any_extend"; 315 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 316 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg"; 317 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg"; 318 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg"; 319 case ISD::TRUNCATE: return "truncate"; 320 case ISD::FP_ROUND: return "fp_round"; 321 case ISD::STRICT_FP_ROUND: return "strict_fp_round"; 322 case ISD::FLT_ROUNDS_: return "flt_rounds"; 323 case ISD::FP_EXTEND: return "fp_extend"; 324 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend"; 325 326 case ISD::SINT_TO_FP: return "sint_to_fp"; 327 case ISD::UINT_TO_FP: return "uint_to_fp"; 328 case ISD::FP_TO_SINT: return "fp_to_sint"; 329 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint"; 330 case ISD::FP_TO_UINT: return "fp_to_uint"; 331 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint"; 332 case ISD::BITCAST: return "bitcast"; 333 case ISD::ADDRSPACECAST: return "addrspacecast"; 334 case ISD::FP16_TO_FP: return "fp16_to_fp"; 335 case ISD::FP_TO_FP16: return "fp_to_fp16"; 336 case ISD::LROUND: return "lround"; 337 case ISD::STRICT_LROUND: return "strict_lround"; 338 case ISD::LLROUND: return "llround"; 339 case ISD::STRICT_LLROUND: return "strict_llround"; 340 case ISD::LRINT: return "lrint"; 341 case ISD::STRICT_LRINT: return "strict_lrint"; 342 case ISD::LLRINT: return "llrint"; 343 case ISD::STRICT_LLRINT: return "strict_llrint"; 344 345 // Control flow instructions 346 case ISD::BR: return "br"; 347 case ISD::BRIND: return "brind"; 348 case ISD::BR_JT: return "br_jt"; 349 case ISD::BRCOND: return "brcond"; 350 case ISD::BR_CC: return "br_cc"; 351 case ISD::CALLSEQ_START: return "callseq_start"; 352 case ISD::CALLSEQ_END: return "callseq_end"; 353 354 // EH instructions 355 case ISD::CATCHRET: return "catchret"; 356 case ISD::CLEANUPRET: return "cleanupret"; 357 358 // Other operators 359 case ISD::LOAD: return "load"; 360 case ISD::STORE: return "store"; 361 case ISD::MLOAD: return "masked_load"; 362 case ISD::MSTORE: return "masked_store"; 363 case ISD::MGATHER: return "masked_gather"; 364 case ISD::MSCATTER: return "masked_scatter"; 365 case ISD::VAARG: return "vaarg"; 366 case ISD::VACOPY: return "vacopy"; 367 case ISD::VAEND: return "vaend"; 368 case ISD::VASTART: return "vastart"; 369 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 370 case ISD::EXTRACT_ELEMENT: return "extract_element"; 371 case ISD::BUILD_PAIR: return "build_pair"; 372 case ISD::STACKSAVE: return "stacksave"; 373 case ISD::STACKRESTORE: return "stackrestore"; 374 case ISD::TRAP: return "trap"; 375 case ISD::DEBUGTRAP: return "debugtrap"; 376 case ISD::LIFETIME_START: return "lifetime.start"; 377 case ISD::LIFETIME_END: return "lifetime.end"; 378 case ISD::GC_TRANSITION_START: return "gc_transition.start"; 379 case ISD::GC_TRANSITION_END: return "gc_transition.end"; 380 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset"; 381 382 // Bit manipulation 383 case ISD::ABS: return "abs"; 384 case ISD::BITREVERSE: return "bitreverse"; 385 case ISD::BSWAP: return "bswap"; 386 case ISD::CTPOP: return "ctpop"; 387 case ISD::CTTZ: return "cttz"; 388 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef"; 389 case ISD::CTLZ: return "ctlz"; 390 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef"; 391 392 // Trampolines 393 case ISD::INIT_TRAMPOLINE: return "init_trampoline"; 394 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline"; 395 396 case ISD::CONDCODE: 397 switch (cast<CondCodeSDNode>(this)->get()) { 398 default: llvm_unreachable("Unknown setcc condition!"); 399 case ISD::SETOEQ: return "setoeq"; 400 case ISD::SETOGT: return "setogt"; 401 case ISD::SETOGE: return "setoge"; 402 case ISD::SETOLT: return "setolt"; 403 case ISD::SETOLE: return "setole"; 404 case ISD::SETONE: return "setone"; 405 406 case ISD::SETO: return "seto"; 407 case ISD::SETUO: return "setuo"; 408 case ISD::SETUEQ: return "setueq"; 409 case ISD::SETUGT: return "setugt"; 410 case ISD::SETUGE: return "setuge"; 411 case ISD::SETULT: return "setult"; 412 case ISD::SETULE: return "setule"; 413 case ISD::SETUNE: return "setune"; 414 415 case ISD::SETEQ: return "seteq"; 416 case ISD::SETGT: return "setgt"; 417 case ISD::SETGE: return "setge"; 418 case ISD::SETLT: return "setlt"; 419 case ISD::SETLE: return "setle"; 420 case ISD::SETNE: return "setne"; 421 422 case ISD::SETTRUE: return "settrue"; 423 case ISD::SETTRUE2: return "settrue2"; 424 case ISD::SETFALSE: return "setfalse"; 425 case ISD::SETFALSE2: return "setfalse2"; 426 } 427 case ISD::VECREDUCE_FADD: return "vecreduce_fadd"; 428 case ISD::VECREDUCE_STRICT_FADD: return "vecreduce_strict_fadd"; 429 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul"; 430 case ISD::VECREDUCE_STRICT_FMUL: return "vecreduce_strict_fmul"; 431 case ISD::VECREDUCE_ADD: return "vecreduce_add"; 432 case ISD::VECREDUCE_MUL: return "vecreduce_mul"; 433 case ISD::VECREDUCE_AND: return "vecreduce_and"; 434 case ISD::VECREDUCE_OR: return "vecreduce_or"; 435 case ISD::VECREDUCE_XOR: return "vecreduce_xor"; 436 case ISD::VECREDUCE_SMAX: return "vecreduce_smax"; 437 case ISD::VECREDUCE_SMIN: return "vecreduce_smin"; 438 case ISD::VECREDUCE_UMAX: return "vecreduce_umax"; 439 case ISD::VECREDUCE_UMIN: return "vecreduce_umin"; 440 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax"; 441 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin"; 442 } 443 } 444 445 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 446 switch (AM) { 447 default: return ""; 448 case ISD::PRE_INC: return "<pre-inc>"; 449 case ISD::PRE_DEC: return "<pre-dec>"; 450 case ISD::POST_INC: return "<post-inc>"; 451 case ISD::POST_DEC: return "<post-dec>"; 452 } 453 } 454 455 static Printable PrintNodeId(const SDNode &Node) { 456 return Printable([&Node](raw_ostream &OS) { 457 #ifndef NDEBUG 458 OS << 't' << Node.PersistentId; 459 #else 460 OS << (const void*)&Node; 461 #endif 462 }); 463 } 464 465 // Print the MMO with more information from the SelectionDAG. 466 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 467 const MachineFunction *MF, const Module *M, 468 const MachineFrameInfo *MFI, 469 const TargetInstrInfo *TII, LLVMContext &Ctx) { 470 ModuleSlotTracker MST(M); 471 if (MF) 472 MST.incorporateFunction(MF->getFunction()); 473 SmallVector<StringRef, 0> SSNs; 474 MMO.print(OS, MST, SSNs, Ctx, MFI, TII); 475 } 476 477 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 478 const SelectionDAG *G) { 479 if (G) { 480 const MachineFunction *MF = &G->getMachineFunction(); 481 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(), 482 &MF->getFrameInfo(), G->getSubtarget().getInstrInfo(), 483 *G->getContext()); 484 } else { 485 LLVMContext Ctx; 486 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr, 487 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx); 488 } 489 } 490 491 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 492 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); } 493 494 LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const { 495 print(dbgs(), G); 496 dbgs() << '\n'; 497 } 498 #endif 499 500 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 501 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 502 if (i) OS << ","; 503 if (getValueType(i) == MVT::Other) 504 OS << "ch"; 505 else 506 OS << getValueType(i).getEVTString(); 507 } 508 } 509 510 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 511 if (getFlags().hasNoUnsignedWrap()) 512 OS << " nuw"; 513 514 if (getFlags().hasNoSignedWrap()) 515 OS << " nsw"; 516 517 if (getFlags().hasExact()) 518 OS << " exact"; 519 520 if (getFlags().hasNoNaNs()) 521 OS << " nnan"; 522 523 if (getFlags().hasNoInfs()) 524 OS << " ninf"; 525 526 if (getFlags().hasNoSignedZeros()) 527 OS << " nsz"; 528 529 if (getFlags().hasAllowReciprocal()) 530 OS << " arcp"; 531 532 if (getFlags().hasAllowContract()) 533 OS << " contract"; 534 535 if (getFlags().hasApproximateFuncs()) 536 OS << " afn"; 537 538 if (getFlags().hasAllowReassociation()) 539 OS << " reassoc"; 540 541 if (getFlags().hasVectorReduction()) 542 OS << " vector-reduction"; 543 544 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 545 if (!MN->memoperands_empty()) { 546 OS << "<"; 547 OS << "Mem:"; 548 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 549 e = MN->memoperands_end(); i != e; ++i) { 550 printMemOperand(OS, **i, G); 551 if (std::next(i) != e) 552 OS << " "; 553 } 554 OS << ">"; 555 } 556 } else if (const ShuffleVectorSDNode *SVN = 557 dyn_cast<ShuffleVectorSDNode>(this)) { 558 OS << "<"; 559 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 560 int Idx = SVN->getMaskElt(i); 561 if (i) OS << ","; 562 if (Idx < 0) 563 OS << "u"; 564 else 565 OS << Idx; 566 } 567 OS << ">"; 568 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 569 OS << '<' << CSDN->getAPIntValue() << '>'; 570 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 571 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle()) 572 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 573 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble()) 574 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 575 else { 576 OS << "<APFloat("; 577 CSDN->getValueAPF().bitcastToAPInt().print(OS, false); 578 OS << ")>"; 579 } 580 } else if (const GlobalAddressSDNode *GADN = 581 dyn_cast<GlobalAddressSDNode>(this)) { 582 int64_t offset = GADN->getOffset(); 583 OS << '<'; 584 GADN->getGlobal()->printAsOperand(OS); 585 OS << '>'; 586 if (offset > 0) 587 OS << " + " << offset; 588 else 589 OS << " " << offset; 590 if (unsigned int TF = GADN->getTargetFlags()) 591 OS << " [TF=" << TF << ']'; 592 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 593 OS << "<" << FIDN->getIndex() << ">"; 594 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 595 OS << "<" << JTDN->getIndex() << ">"; 596 if (unsigned int TF = JTDN->getTargetFlags()) 597 OS << " [TF=" << TF << ']'; 598 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 599 int offset = CP->getOffset(); 600 if (CP->isMachineConstantPoolEntry()) 601 OS << "<" << *CP->getMachineCPVal() << ">"; 602 else 603 OS << "<" << *CP->getConstVal() << ">"; 604 if (offset > 0) 605 OS << " + " << offset; 606 else 607 OS << " " << offset; 608 if (unsigned int TF = CP->getTargetFlags()) 609 OS << " [TF=" << TF << ']'; 610 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) { 611 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">"; 612 if (unsigned TF = TI->getTargetFlags()) 613 OS << " [TF=" << TF << ']'; 614 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 615 OS << "<"; 616 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 617 if (LBB) 618 OS << LBB->getName() << " "; 619 OS << (const void*)BBDN->getBasicBlock() << ">"; 620 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 621 OS << ' ' << printReg(R->getReg(), 622 G ? G->getSubtarget().getRegisterInfo() : nullptr); 623 } else if (const ExternalSymbolSDNode *ES = 624 dyn_cast<ExternalSymbolSDNode>(this)) { 625 OS << "'" << ES->getSymbol() << "'"; 626 if (unsigned int TF = ES->getTargetFlags()) 627 OS << " [TF=" << TF << ']'; 628 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 629 if (M->getValue()) 630 OS << "<" << M->getValue() << ">"; 631 else 632 OS << "<null>"; 633 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 634 if (MD->getMD()) 635 OS << "<" << MD->getMD() << ">"; 636 else 637 OS << "<null>"; 638 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 639 OS << ":" << N->getVT().getEVTString(); 640 } 641 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 642 OS << "<"; 643 644 printMemOperand(OS, *LD->getMemOperand(), G); 645 646 bool doExt = true; 647 switch (LD->getExtensionType()) { 648 default: doExt = false; break; 649 case ISD::EXTLOAD: OS << ", anyext"; break; 650 case ISD::SEXTLOAD: OS << ", sext"; break; 651 case ISD::ZEXTLOAD: OS << ", zext"; break; 652 } 653 if (doExt) 654 OS << " from " << LD->getMemoryVT().getEVTString(); 655 656 const char *AM = getIndexedModeName(LD->getAddressingMode()); 657 if (*AM) 658 OS << ", " << AM; 659 660 OS << ">"; 661 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 662 OS << "<"; 663 printMemOperand(OS, *ST->getMemOperand(), G); 664 665 if (ST->isTruncatingStore()) 666 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 667 668 const char *AM = getIndexedModeName(ST->getAddressingMode()); 669 if (*AM) 670 OS << ", " << AM; 671 672 OS << ">"; 673 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) { 674 OS << "<"; 675 676 printMemOperand(OS, *MLd->getMemOperand(), G); 677 678 bool doExt = true; 679 switch (MLd->getExtensionType()) { 680 default: doExt = false; break; 681 case ISD::EXTLOAD: OS << ", anyext"; break; 682 case ISD::SEXTLOAD: OS << ", sext"; break; 683 case ISD::ZEXTLOAD: OS << ", zext"; break; 684 } 685 if (doExt) 686 OS << " from " << MLd->getMemoryVT().getEVTString(); 687 688 if (MLd->isExpandingLoad()) 689 OS << ", expanding"; 690 691 OS << ">"; 692 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) { 693 OS << "<"; 694 printMemOperand(OS, *MSt->getMemOperand(), G); 695 696 if (MSt->isTruncatingStore()) 697 OS << ", trunc to " << MSt->getMemoryVT().getEVTString(); 698 699 if (MSt->isCompressingStore()) 700 OS << ", compressing"; 701 702 OS << ">"; 703 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 704 OS << "<"; 705 printMemOperand(OS, *M->getMemOperand(), G); 706 OS << ">"; 707 } else if (const BlockAddressSDNode *BA = 708 dyn_cast<BlockAddressSDNode>(this)) { 709 int64_t offset = BA->getOffset(); 710 OS << "<"; 711 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false); 712 OS << ", "; 713 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false); 714 OS << ">"; 715 if (offset > 0) 716 OS << " + " << offset; 717 else 718 OS << " " << offset; 719 if (unsigned int TF = BA->getTargetFlags()) 720 OS << " [TF=" << TF << ']'; 721 } else if (const AddrSpaceCastSDNode *ASC = 722 dyn_cast<AddrSpaceCastSDNode>(this)) { 723 OS << '[' 724 << ASC->getSrcAddressSpace() 725 << " -> " 726 << ASC->getDestAddressSpace() 727 << ']'; 728 } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) { 729 if (LN->hasOffset()) 730 OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">"; 731 } 732 733 if (VerboseDAGDumping) { 734 if (unsigned Order = getIROrder()) 735 OS << " [ORD=" << Order << ']'; 736 737 if (getNodeId() != -1) 738 OS << " [ID=" << getNodeId() << ']'; 739 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this)))) 740 OS << " # D:" << isDivergent(); 741 742 if (G && !G->GetDbgValues(this).empty()) { 743 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']'; 744 for (SDDbgValue *Dbg : G->GetDbgValues(this)) 745 if (!Dbg->isInvalidated()) 746 Dbg->print(OS); 747 } else if (getHasDebugValue()) 748 OS << " [NoOfDbgValues>0]"; 749 } 750 } 751 752 LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const { 753 OS << " DbgVal(Order=" << getOrder() << ')'; 754 if (isInvalidated()) OS << "(Invalidated)"; 755 if (isEmitted()) OS << "(Emitted)"; 756 switch (getKind()) { 757 case SDNODE: 758 if (getSDNode()) 759 OS << "(SDNODE=" << PrintNodeId(*getSDNode()) << ':' << getResNo() << ')'; 760 else 761 OS << "(SDNODE)"; 762 break; 763 case CONST: 764 OS << "(CONST)"; 765 break; 766 case FRAMEIX: 767 OS << "(FRAMEIX=" << getFrameIx() << ')'; 768 break; 769 case VREG: 770 OS << "(VREG=" << getVReg() << ')'; 771 break; 772 } 773 if (isIndirect()) OS << "(Indirect)"; 774 OS << ":\"" << Var->getName() << '"'; 775 #ifndef NDEBUG 776 if (Expr->getNumElements()) 777 Expr->dump(); 778 #endif 779 } 780 781 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 782 LLVM_DUMP_METHOD void SDDbgValue::dump() const { 783 if (isInvalidated()) 784 return; 785 print(dbgs()); 786 dbgs() << "\n"; 787 } 788 #endif 789 790 /// Return true if this node is so simple that we should just print it inline 791 /// if it appears as an operand. 792 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) { 793 // Avoid lots of cluttering when inline printing nodes with associated 794 // DbgValues in verbose mode. 795 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty()) 796 return false; 797 if (Node.getOpcode() == ISD::EntryToken) 798 return false; 799 return Node.getNumOperands() == 0; 800 } 801 802 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 803 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 804 for (const SDValue &Op : N->op_values()) { 805 if (shouldPrintInline(*Op.getNode(), G)) 806 continue; 807 if (Op.getNode()->hasOneUse()) 808 DumpNodes(Op.getNode(), indent+2, G); 809 } 810 811 dbgs().indent(indent); 812 N->dump(G); 813 } 814 815 LLVM_DUMP_METHOD void SelectionDAG::dump() const { 816 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n"; 817 818 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 819 I != E; ++I) { 820 const SDNode *N = &*I; 821 if (!N->hasOneUse() && N != getRoot().getNode() && 822 (!shouldPrintInline(*N, this) || N->use_empty())) 823 DumpNodes(N, 2, this); 824 } 825 826 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 827 dbgs() << "\n"; 828 829 if (VerboseDAGDumping) { 830 if (DbgBegin() != DbgEnd()) 831 dbgs() << "SDDbgValues:\n"; 832 for (auto *Dbg : make_range(DbgBegin(), DbgEnd())) 833 Dbg->dump(); 834 if (ByvalParmDbgBegin() != ByvalParmDbgEnd()) 835 dbgs() << "Byval SDDbgValues:\n"; 836 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd())) 837 Dbg->dump(); 838 } 839 dbgs() << "\n"; 840 } 841 #endif 842 843 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 844 OS << PrintNodeId(*this) << ": "; 845 print_types(OS, G); 846 OS << " = " << getOperationName(G); 847 print_details(OS, G); 848 } 849 850 static bool printOperand(raw_ostream &OS, const SelectionDAG *G, 851 const SDValue Value) { 852 if (!Value.getNode()) { 853 OS << "<null>"; 854 return false; 855 } else if (shouldPrintInline(*Value.getNode(), G)) { 856 OS << Value->getOperationName(G) << ':'; 857 Value->print_types(OS, G); 858 Value->print_details(OS, G); 859 return true; 860 } else { 861 OS << PrintNodeId(*Value.getNode()); 862 if (unsigned RN = Value.getResNo()) 863 OS << ':' << RN; 864 return false; 865 } 866 } 867 868 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 869 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>; 870 871 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 872 const SelectionDAG *G, VisitedSDNodeSet &once) { 873 if (!once.insert(N).second) // If we've been here before, return now. 874 return; 875 876 // Dump the current SDNode, but don't end the line yet. 877 OS.indent(indent); 878 N->printr(OS, G); 879 880 // Having printed this SDNode, walk the children: 881 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 882 if (i) OS << ","; 883 OS << " "; 884 885 const SDValue Op = N->getOperand(i); 886 bool printedInline = printOperand(OS, G, Op); 887 if (printedInline) 888 once.insert(Op.getNode()); 889 } 890 891 OS << "\n"; 892 893 // Dump children that have grandchildren on their own line(s). 894 for (const SDValue &Op : N->op_values()) 895 DumpNodesr(OS, Op.getNode(), indent+2, G, once); 896 } 897 898 LLVM_DUMP_METHOD void SDNode::dumpr() const { 899 VisitedSDNodeSet once; 900 DumpNodesr(dbgs(), this, 0, nullptr, once); 901 } 902 903 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const { 904 VisitedSDNodeSet once; 905 DumpNodesr(dbgs(), this, 0, G, once); 906 } 907 #endif 908 909 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 910 const SelectionDAG *G, unsigned depth, 911 unsigned indent) { 912 if (depth == 0) 913 return; 914 915 OS.indent(indent); 916 917 N->print(OS, G); 918 919 if (depth < 1) 920 return; 921 922 for (const SDValue &Op : N->op_values()) { 923 // Don't follow chain operands. 924 if (Op.getValueType() == MVT::Other) 925 continue; 926 OS << '\n'; 927 printrWithDepthHelper(OS, Op.getNode(), G, depth-1, indent+2); 928 } 929 } 930 931 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 932 unsigned depth) const { 933 printrWithDepthHelper(OS, this, G, depth, 0); 934 } 935 936 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 937 // Don't print impossibly deep things. 938 printrWithDepth(OS, G, 10); 939 } 940 941 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 942 LLVM_DUMP_METHOD 943 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 944 printrWithDepth(dbgs(), G, depth); 945 } 946 947 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const { 948 // Don't print impossibly deep things. 949 dumprWithDepth(G, 10); 950 } 951 #endif 952 953 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 954 printr(OS, G); 955 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 956 if (i) OS << ", "; else OS << " "; 957 printOperand(OS, G, getOperand(i)); 958 } 959 if (DebugLoc DL = getDebugLoc()) { 960 OS << ", "; 961 DL.print(OS); 962 } 963 } 964