xref: /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/MachineSSAContext.cpp (revision 5f757f3ff9144b609b3c433dfd370cc6bdc191ad)
10eae32dcSDimitry Andric //===- MachineSSAContext.cpp ------------------------------------*- C++ -*-===//
20eae32dcSDimitry Andric //
30eae32dcSDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40eae32dcSDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50eae32dcSDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60eae32dcSDimitry Andric //
70eae32dcSDimitry Andric //===----------------------------------------------------------------------===//
80eae32dcSDimitry Andric /// \file
90eae32dcSDimitry Andric ///
100eae32dcSDimitry Andric /// This file defines a specialization of the GenericSSAContext<X>
110eae32dcSDimitry Andric /// template class for Machine IR.
120eae32dcSDimitry Andric ///
130eae32dcSDimitry Andric //===----------------------------------------------------------------------===//
140eae32dcSDimitry Andric 
150eae32dcSDimitry Andric #include "llvm/CodeGen/MachineSSAContext.h"
16*5f757f3fSDimitry Andric #include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
170eae32dcSDimitry Andric #include "llvm/CodeGen/MachineBasicBlock.h"
1881ad6265SDimitry Andric #include "llvm/CodeGen/MachineFunction.h"
190eae32dcSDimitry Andric #include "llvm/CodeGen/MachineInstr.h"
2081ad6265SDimitry Andric #include "llvm/CodeGen/MachineRegisterInfo.h"
210eae32dcSDimitry Andric #include "llvm/Support/raw_ostream.h"
220eae32dcSDimitry Andric 
230eae32dcSDimitry Andric using namespace llvm;
240eae32dcSDimitry Andric 
25*5f757f3fSDimitry Andric template <>
appendBlockDefs(SmallVectorImpl<Register> & defs,const MachineBasicBlock & block)26*5f757f3fSDimitry Andric void MachineSSAContext::appendBlockDefs(SmallVectorImpl<Register> &defs,
27*5f757f3fSDimitry Andric                                         const MachineBasicBlock &block) {
28*5f757f3fSDimitry Andric   for (auto &instr : block.instrs()) {
29*5f757f3fSDimitry Andric     for (auto &op : instr.all_defs())
30*5f757f3fSDimitry Andric       defs.push_back(op.getReg());
31*5f757f3fSDimitry Andric   }
320eae32dcSDimitry Andric }
330eae32dcSDimitry Andric 
34*5f757f3fSDimitry Andric template <>
appendBlockTerms(SmallVectorImpl<MachineInstr * > & terms,MachineBasicBlock & block)35*5f757f3fSDimitry Andric void MachineSSAContext::appendBlockTerms(SmallVectorImpl<MachineInstr *> &terms,
36*5f757f3fSDimitry Andric                                          MachineBasicBlock &block) {
37*5f757f3fSDimitry Andric   for (auto &T : block.terminators())
38*5f757f3fSDimitry Andric     terms.push_back(&T);
39bdd1243dSDimitry Andric }
40bdd1243dSDimitry Andric 
41*5f757f3fSDimitry Andric template <>
appendBlockTerms(SmallVectorImpl<const MachineInstr * > & terms,const MachineBasicBlock & block)42bdd1243dSDimitry Andric void MachineSSAContext::appendBlockTerms(
43bdd1243dSDimitry Andric     SmallVectorImpl<const MachineInstr *> &terms,
44bdd1243dSDimitry Andric     const MachineBasicBlock &block) {
45bdd1243dSDimitry Andric   for (auto &T : block.terminators())
46bdd1243dSDimitry Andric     terms.push_back(&T);
47bdd1243dSDimitry Andric }
48bdd1243dSDimitry Andric 
49bdd1243dSDimitry Andric /// Get the defining block of a value.
50*5f757f3fSDimitry Andric template <>
getDefBlock(Register value) const51*5f757f3fSDimitry Andric const MachineBasicBlock *MachineSSAContext::getDefBlock(Register value) const {
52bdd1243dSDimitry Andric   if (!value)
53bdd1243dSDimitry Andric     return nullptr;
54*5f757f3fSDimitry Andric   return F->getRegInfo().getVRegDef(value)->getParent();
55bdd1243dSDimitry Andric }
56bdd1243dSDimitry Andric 
57*5f757f3fSDimitry Andric template <>
isConstantOrUndefValuePhi(const MachineInstr & Phi)5806c3fb27SDimitry Andric bool MachineSSAContext::isConstantOrUndefValuePhi(const MachineInstr &Phi) {
59bdd1243dSDimitry Andric   return Phi.isConstantValuePHI();
60bdd1243dSDimitry Andric }
61bdd1243dSDimitry Andric 
62*5f757f3fSDimitry Andric template <>
getIntrinsicID(const MachineInstr & MI)63*5f757f3fSDimitry Andric Intrinsic::ID MachineSSAContext::getIntrinsicID(const MachineInstr &MI) {
64*5f757f3fSDimitry Andric   if (auto *GI = dyn_cast<GIntrinsic>(&MI))
65*5f757f3fSDimitry Andric     return GI->getIntrinsicID();
66*5f757f3fSDimitry Andric   return Intrinsic::not_intrinsic;
67*5f757f3fSDimitry Andric }
68*5f757f3fSDimitry Andric 
69*5f757f3fSDimitry Andric template <>
print(const MachineBasicBlock * Block) const70bdd1243dSDimitry Andric Printable MachineSSAContext::print(const MachineBasicBlock *Block) const {
71bdd1243dSDimitry Andric   if (!Block)
72bdd1243dSDimitry Andric     return Printable([](raw_ostream &Out) { Out << "<nullptr>"; });
730eae32dcSDimitry Andric   return Printable([Block](raw_ostream &Out) { Block->printName(Out); });
740eae32dcSDimitry Andric }
750eae32dcSDimitry Andric 
print(const MachineInstr * I) const76*5f757f3fSDimitry Andric template <> Printable MachineSSAContext::print(const MachineInstr *I) const {
770eae32dcSDimitry Andric   return Printable([I](raw_ostream &Out) { I->print(Out); });
780eae32dcSDimitry Andric }
790eae32dcSDimitry Andric 
print(Register Value) const80*5f757f3fSDimitry Andric template <> Printable MachineSSAContext::print(Register Value) const {
81*5f757f3fSDimitry Andric   auto *MRI = &F->getRegInfo();
820eae32dcSDimitry Andric   return Printable([MRI, Value](raw_ostream &Out) {
830eae32dcSDimitry Andric     Out << printReg(Value, MRI->getTargetRegisterInfo(), 0, MRI);
840eae32dcSDimitry Andric 
850eae32dcSDimitry Andric     if (Value) {
860eae32dcSDimitry Andric       // Try to print the definition.
870eae32dcSDimitry Andric       if (auto *Instr = MRI->getUniqueVRegDef(Value)) {
880eae32dcSDimitry Andric         Out << ": ";
890eae32dcSDimitry Andric         Instr->print(Out);
900eae32dcSDimitry Andric       }
910eae32dcSDimitry Andric     }
920eae32dcSDimitry Andric   });
930eae32dcSDimitry Andric }
94*5f757f3fSDimitry Andric 
95*5f757f3fSDimitry Andric template <>
printAsOperand(const MachineBasicBlock * BB) const96*5f757f3fSDimitry Andric Printable MachineSSAContext::printAsOperand(const MachineBasicBlock *BB) const {
97*5f757f3fSDimitry Andric   return Printable([BB](raw_ostream &Out) { BB->printAsOperand(Out); });
98*5f757f3fSDimitry Andric }
99