1*0b57cec5SDimitry Andric//===----------------------Hexagon builtin routine ------------------------===// 2*0b57cec5SDimitry Andric// 3*0b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric// 7*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric 9*0b57cec5SDimitry Andric .macro FUNCTION_BEGIN name 10*0b57cec5SDimitry Andric .text 11*0b57cec5SDimitry Andric .p2align 5 12*0b57cec5SDimitry Andric .globl \name 13*0b57cec5SDimitry Andric .type \name, @function 14*0b57cec5SDimitry Andric\name: 15*0b57cec5SDimitry Andric .endm 16*0b57cec5SDimitry Andric 17*0b57cec5SDimitry Andric .macro FUNCTION_END name 18*0b57cec5SDimitry Andric .size \name, . - \name 19*0b57cec5SDimitry Andric .endm 20*0b57cec5SDimitry Andric 21*0b57cec5SDimitry Andric 22*0b57cec5SDimitry AndricFUNCTION_BEGIN __hexagon_divdi3 23*0b57cec5SDimitry Andric { 24*0b57cec5SDimitry Andric p2 = tstbit(r1,#31) 25*0b57cec5SDimitry Andric p3 = tstbit(r3,#31) 26*0b57cec5SDimitry Andric } 27*0b57cec5SDimitry Andric { 28*0b57cec5SDimitry Andric r1:0 = abs(r1:0) 29*0b57cec5SDimitry Andric r3:2 = abs(r3:2) 30*0b57cec5SDimitry Andric } 31*0b57cec5SDimitry Andric { 32*0b57cec5SDimitry Andric r6 = cl0(r1:0) // count leading 0's of dividend (numerator) 33*0b57cec5SDimitry Andric r7 = cl0(r3:2) // count leading 0's of divisor (denominator) 34*0b57cec5SDimitry Andric r5:4 = r3:2 // divisor moved into working registers 35*0b57cec5SDimitry Andric r3:2 = r1:0 // dividend is the initial remainder, r3:2 contains remainder 36*0b57cec5SDimitry Andric } 37*0b57cec5SDimitry Andric { 38*0b57cec5SDimitry Andric p3 = xor(p2,p3) 39*0b57cec5SDimitry Andric r10 = sub(r7,r6) // left shift count for bit & divisor 40*0b57cec5SDimitry Andric r1:0 = #0 // initialize quotient to 0 41*0b57cec5SDimitry Andric r15:14 = #1 // initialize bit to 1 42*0b57cec5SDimitry Andric } 43*0b57cec5SDimitry Andric { 44*0b57cec5SDimitry Andric r11 = add(r10,#1) // loop count is 1 more than shift count 45*0b57cec5SDimitry Andric r13:12 = lsl(r5:4,r10) // shift divisor msb into same bit position as dividend msb 46*0b57cec5SDimitry Andric r15:14 = lsl(r15:14,r10) // shift the bit left by same amount as divisor 47*0b57cec5SDimitry Andric } 48*0b57cec5SDimitry Andric { 49*0b57cec5SDimitry Andric p0 = cmp.gtu(r5:4,r3:2) // check if divisor > dividend 50*0b57cec5SDimitry Andric loop0(1f,r11) // register loop 51*0b57cec5SDimitry Andric } 52*0b57cec5SDimitry Andric { 53*0b57cec5SDimitry Andric if (p0) jump .hexagon_divdi3_return // if divisor > dividend, we're done, so return 54*0b57cec5SDimitry Andric } 55*0b57cec5SDimitry Andric .falign 56*0b57cec5SDimitry Andric1: 57*0b57cec5SDimitry Andric { 58*0b57cec5SDimitry Andric p0 = cmp.gtu(r13:12,r3:2) // set predicate reg if shifted divisor > current remainder 59*0b57cec5SDimitry Andric } 60*0b57cec5SDimitry Andric { 61*0b57cec5SDimitry Andric r7:6 = sub(r3:2, r13:12) // subtract shifted divisor from current remainder 62*0b57cec5SDimitry Andric r9:8 = add(r1:0, r15:14) // save current quotient to temp (r9:8) 63*0b57cec5SDimitry Andric } 64*0b57cec5SDimitry Andric { 65*0b57cec5SDimitry Andric r1:0 = vmux(p0, r1:0, r9:8) // choose either current quotient or new quotient (r9:8) 66*0b57cec5SDimitry Andric r3:2 = vmux(p0, r3:2, r7:6) // choose either current remainder or new remainder (r7:6) 67*0b57cec5SDimitry Andric } 68*0b57cec5SDimitry Andric { 69*0b57cec5SDimitry Andric r15:14 = lsr(r15:14, #1) // shift bit right by 1 for next iteration 70*0b57cec5SDimitry Andric r13:12 = lsr(r13:12, #1) // shift "shifted divisor" right by 1 for next iteration 71*0b57cec5SDimitry Andric }:endloop0 72*0b57cec5SDimitry Andric 73*0b57cec5SDimitry Andric.hexagon_divdi3_return: 74*0b57cec5SDimitry Andric { 75*0b57cec5SDimitry Andric r3:2 = neg(r1:0) 76*0b57cec5SDimitry Andric } 77*0b57cec5SDimitry Andric { 78*0b57cec5SDimitry Andric r1:0 = vmux(p3,r3:2,r1:0) 79*0b57cec5SDimitry Andric jumpr r31 80*0b57cec5SDimitry Andric } 81*0b57cec5SDimitry AndricFUNCTION_END __hexagon_divdi3 82*0b57cec5SDimitry Andric 83*0b57cec5SDimitry Andric .globl __qdsp_divdi3 84*0b57cec5SDimitry Andric .set __qdsp_divdi3, __hexagon_divdi3 85