1*99a2dd95SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause 2*99a2dd95SBruce Richardson * Copyright(c) 2010-2014 Intel Corporation 3*99a2dd95SBruce Richardson */ 4*99a2dd95SBruce Richardson 5*99a2dd95SBruce Richardson #ifndef __INCLUDE_RTE_LRU_H__ 6*99a2dd95SBruce Richardson #define __INCLUDE_RTE_LRU_H__ 7*99a2dd95SBruce Richardson 8*99a2dd95SBruce Richardson #include <rte_config.h> 9*99a2dd95SBruce Richardson #ifdef RTE_ARCH_X86_64 10*99a2dd95SBruce Richardson #include "rte_lru_x86.h" 11*99a2dd95SBruce Richardson #elif defined(RTE_ARCH_ARM64) 12*99a2dd95SBruce Richardson #include "rte_lru_arm64.h" 13*99a2dd95SBruce Richardson #else 14*99a2dd95SBruce Richardson #undef RTE_TABLE_HASH_LRU_STRATEGY 15*99a2dd95SBruce Richardson #define RTE_TABLE_HASH_LRU_STRATEGY 1 16*99a2dd95SBruce Richardson #endif 17*99a2dd95SBruce Richardson 18*99a2dd95SBruce Richardson #if RTE_TABLE_HASH_LRU_STRATEGY == 0 19*99a2dd95SBruce Richardson 20*99a2dd95SBruce Richardson #define lru_init(bucket) \ 21*99a2dd95SBruce Richardson do \ 22*99a2dd95SBruce Richardson bucket = bucket; \ 23*99a2dd95SBruce Richardson while (0) 24*99a2dd95SBruce Richardson 25*99a2dd95SBruce Richardson #define lru_pos(bucket) (bucket->lru_list & 0xFFFFLLU) 26*99a2dd95SBruce Richardson 27*99a2dd95SBruce Richardson #define lru_update(bucket, mru_val) \ 28*99a2dd95SBruce Richardson do { \ 29*99a2dd95SBruce Richardson bucket = bucket; \ 30*99a2dd95SBruce Richardson mru_val = mru_val; \ 31*99a2dd95SBruce Richardson } while (0) 32*99a2dd95SBruce Richardson 33*99a2dd95SBruce Richardson #elif RTE_TABLE_HASH_LRU_STRATEGY == 1 34*99a2dd95SBruce Richardson 35*99a2dd95SBruce Richardson #define lru_init(bucket) \ 36*99a2dd95SBruce Richardson do \ 37*99a2dd95SBruce Richardson bucket->lru_list = 0x0000000100020003LLU; \ 38*99a2dd95SBruce Richardson while (0) 39*99a2dd95SBruce Richardson 40*99a2dd95SBruce Richardson #define lru_pos(bucket) (bucket->lru_list & 0xFFFFLLU) 41*99a2dd95SBruce Richardson 42*99a2dd95SBruce Richardson #define lru_update(bucket, mru_val) \ 43*99a2dd95SBruce Richardson do { \ 44*99a2dd95SBruce Richardson uint64_t x, pos, x0, x1, x2, mask; \ 45*99a2dd95SBruce Richardson \ 46*99a2dd95SBruce Richardson x = bucket->lru_list; \ 47*99a2dd95SBruce Richardson \ 48*99a2dd95SBruce Richardson pos = 4; \ 49*99a2dd95SBruce Richardson if ((x >> 48) == ((uint64_t) mru_val)) \ 50*99a2dd95SBruce Richardson pos = 3; \ 51*99a2dd95SBruce Richardson \ 52*99a2dd95SBruce Richardson if (((x >> 32) & 0xFFFFLLU) == ((uint64_t) mru_val)) \ 53*99a2dd95SBruce Richardson pos = 2; \ 54*99a2dd95SBruce Richardson \ 55*99a2dd95SBruce Richardson if (((x >> 16) & 0xFFFFLLU) == ((uint64_t) mru_val)) \ 56*99a2dd95SBruce Richardson pos = 1; \ 57*99a2dd95SBruce Richardson \ 58*99a2dd95SBruce Richardson if ((x & 0xFFFFLLU) == ((uint64_t) mru_val)) \ 59*99a2dd95SBruce Richardson pos = 0; \ 60*99a2dd95SBruce Richardson \ 61*99a2dd95SBruce Richardson \ 62*99a2dd95SBruce Richardson pos <<= 4; \ 63*99a2dd95SBruce Richardson mask = (~0LLU) << pos; \ 64*99a2dd95SBruce Richardson x0 = x & (~mask); \ 65*99a2dd95SBruce Richardson x1 = (x >> 16) & mask; \ 66*99a2dd95SBruce Richardson x2 = (x << (48 - pos)) & (0xFFFFLLU << 48); \ 67*99a2dd95SBruce Richardson x = x0 | x1 | x2; \ 68*99a2dd95SBruce Richardson \ 69*99a2dd95SBruce Richardson if (pos != 64) \ 70*99a2dd95SBruce Richardson bucket->lru_list = x; \ 71*99a2dd95SBruce Richardson } while (0) 72*99a2dd95SBruce Richardson 73*99a2dd95SBruce Richardson #elif (RTE_TABLE_HASH_LRU_STRATEGY == 2) || (RTE_TABLE_HASH_LRU_STRATEGY == 3) 74*99a2dd95SBruce Richardson 75*99a2dd95SBruce Richardson /** 76*99a2dd95SBruce Richardson * These strategies are implemented in architecture specific header files. 77*99a2dd95SBruce Richardson */ 78*99a2dd95SBruce Richardson 79*99a2dd95SBruce Richardson #else 80*99a2dd95SBruce Richardson 81*99a2dd95SBruce Richardson #error "Incorrect value for RTE_TABLE_HASH_LRU_STRATEGY" 82*99a2dd95SBruce Richardson 83*99a2dd95SBruce Richardson #endif 84*99a2dd95SBruce Richardson 85*99a2dd95SBruce Richardson #endif 86