199a2dd95SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause 299a2dd95SBruce Richardson * Copyright(c) 2010-2014 Intel Corporation 399a2dd95SBruce Richardson */ 499a2dd95SBruce Richardson 599a2dd95SBruce Richardson #ifndef _RTE_CPUFLAGS_X86_64_H_ 699a2dd95SBruce Richardson #define _RTE_CPUFLAGS_X86_64_H_ 799a2dd95SBruce Richardson 899a2dd95SBruce Richardson enum rte_cpu_flag_t { 999a2dd95SBruce Richardson /* (EAX 01h) ECX features*/ 1099a2dd95SBruce Richardson RTE_CPUFLAG_SSE3 = 0, /**< SSE3 */ 1199a2dd95SBruce Richardson RTE_CPUFLAG_PCLMULQDQ, /**< PCLMULQDQ */ 1299a2dd95SBruce Richardson RTE_CPUFLAG_DTES64, /**< DTES64 */ 1399a2dd95SBruce Richardson RTE_CPUFLAG_MONITOR, /**< MONITOR */ 1499a2dd95SBruce Richardson RTE_CPUFLAG_DS_CPL, /**< DS_CPL */ 1599a2dd95SBruce Richardson RTE_CPUFLAG_VMX, /**< VMX */ 1699a2dd95SBruce Richardson RTE_CPUFLAG_SMX, /**< SMX */ 1799a2dd95SBruce Richardson RTE_CPUFLAG_EIST, /**< EIST */ 1899a2dd95SBruce Richardson RTE_CPUFLAG_TM2, /**< TM2 */ 1999a2dd95SBruce Richardson RTE_CPUFLAG_SSSE3, /**< SSSE3 */ 2099a2dd95SBruce Richardson RTE_CPUFLAG_CNXT_ID, /**< CNXT_ID */ 2199a2dd95SBruce Richardson RTE_CPUFLAG_FMA, /**< FMA */ 2299a2dd95SBruce Richardson RTE_CPUFLAG_CMPXCHG16B, /**< CMPXCHG16B */ 2399a2dd95SBruce Richardson RTE_CPUFLAG_XTPR, /**< XTPR */ 2499a2dd95SBruce Richardson RTE_CPUFLAG_PDCM, /**< PDCM */ 2599a2dd95SBruce Richardson RTE_CPUFLAG_PCID, /**< PCID */ 2699a2dd95SBruce Richardson RTE_CPUFLAG_DCA, /**< DCA */ 2799a2dd95SBruce Richardson RTE_CPUFLAG_SSE4_1, /**< SSE4_1 */ 2899a2dd95SBruce Richardson RTE_CPUFLAG_SSE4_2, /**< SSE4_2 */ 2999a2dd95SBruce Richardson RTE_CPUFLAG_X2APIC, /**< X2APIC */ 3099a2dd95SBruce Richardson RTE_CPUFLAG_MOVBE, /**< MOVBE */ 3199a2dd95SBruce Richardson RTE_CPUFLAG_POPCNT, /**< POPCNT */ 3299a2dd95SBruce Richardson RTE_CPUFLAG_TSC_DEADLINE, /**< TSC_DEADLINE */ 3399a2dd95SBruce Richardson RTE_CPUFLAG_AES, /**< AES */ 3499a2dd95SBruce Richardson RTE_CPUFLAG_XSAVE, /**< XSAVE */ 3599a2dd95SBruce Richardson RTE_CPUFLAG_OSXSAVE, /**< OSXSAVE */ 3699a2dd95SBruce Richardson RTE_CPUFLAG_AVX, /**< AVX */ 3799a2dd95SBruce Richardson RTE_CPUFLAG_F16C, /**< F16C */ 3899a2dd95SBruce Richardson RTE_CPUFLAG_RDRAND, /**< RDRAND */ 3999a2dd95SBruce Richardson RTE_CPUFLAG_HYPERVISOR, /**< Running in a VM */ 4099a2dd95SBruce Richardson 4199a2dd95SBruce Richardson /* (EAX 01h) EDX features */ 4299a2dd95SBruce Richardson RTE_CPUFLAG_FPU, /**< FPU */ 4399a2dd95SBruce Richardson RTE_CPUFLAG_VME, /**< VME */ 4499a2dd95SBruce Richardson RTE_CPUFLAG_DE, /**< DE */ 4599a2dd95SBruce Richardson RTE_CPUFLAG_PSE, /**< PSE */ 4699a2dd95SBruce Richardson RTE_CPUFLAG_TSC, /**< TSC */ 4799a2dd95SBruce Richardson RTE_CPUFLAG_MSR, /**< MSR */ 4899a2dd95SBruce Richardson RTE_CPUFLAG_PAE, /**< PAE */ 4999a2dd95SBruce Richardson RTE_CPUFLAG_MCE, /**< MCE */ 5099a2dd95SBruce Richardson RTE_CPUFLAG_CX8, /**< CX8 */ 5199a2dd95SBruce Richardson RTE_CPUFLAG_APIC, /**< APIC */ 5299a2dd95SBruce Richardson RTE_CPUFLAG_SEP, /**< SEP */ 5399a2dd95SBruce Richardson RTE_CPUFLAG_MTRR, /**< MTRR */ 5499a2dd95SBruce Richardson RTE_CPUFLAG_PGE, /**< PGE */ 5599a2dd95SBruce Richardson RTE_CPUFLAG_MCA, /**< MCA */ 5699a2dd95SBruce Richardson RTE_CPUFLAG_CMOV, /**< CMOV */ 5799a2dd95SBruce Richardson RTE_CPUFLAG_PAT, /**< PAT */ 5899a2dd95SBruce Richardson RTE_CPUFLAG_PSE36, /**< PSE36 */ 5999a2dd95SBruce Richardson RTE_CPUFLAG_PSN, /**< PSN */ 6099a2dd95SBruce Richardson RTE_CPUFLAG_CLFSH, /**< CLFSH */ 6199a2dd95SBruce Richardson RTE_CPUFLAG_DS, /**< DS */ 6299a2dd95SBruce Richardson RTE_CPUFLAG_ACPI, /**< ACPI */ 6399a2dd95SBruce Richardson RTE_CPUFLAG_MMX, /**< MMX */ 6499a2dd95SBruce Richardson RTE_CPUFLAG_FXSR, /**< FXSR */ 6599a2dd95SBruce Richardson RTE_CPUFLAG_SSE, /**< SSE */ 6699a2dd95SBruce Richardson RTE_CPUFLAG_SSE2, /**< SSE2 */ 6799a2dd95SBruce Richardson RTE_CPUFLAG_SS, /**< SS */ 6899a2dd95SBruce Richardson RTE_CPUFLAG_HTT, /**< HTT */ 6999a2dd95SBruce Richardson RTE_CPUFLAG_TM, /**< TM */ 7099a2dd95SBruce Richardson RTE_CPUFLAG_PBE, /**< PBE */ 7199a2dd95SBruce Richardson 7299a2dd95SBruce Richardson /* (EAX 06h) EAX features */ 7399a2dd95SBruce Richardson RTE_CPUFLAG_DIGTEMP, /**< DIGTEMP */ 7499a2dd95SBruce Richardson RTE_CPUFLAG_TRBOBST, /**< TRBOBST */ 7599a2dd95SBruce Richardson RTE_CPUFLAG_ARAT, /**< ARAT */ 7699a2dd95SBruce Richardson RTE_CPUFLAG_PLN, /**< PLN */ 7799a2dd95SBruce Richardson RTE_CPUFLAG_ECMD, /**< ECMD */ 7899a2dd95SBruce Richardson RTE_CPUFLAG_PTM, /**< PTM */ 7999a2dd95SBruce Richardson 8099a2dd95SBruce Richardson /* (EAX 06h) ECX features */ 8199a2dd95SBruce Richardson RTE_CPUFLAG_MPERF_APERF_MSR, /**< MPERF_APERF_MSR */ 8299a2dd95SBruce Richardson RTE_CPUFLAG_ACNT2, /**< ACNT2 */ 8399a2dd95SBruce Richardson RTE_CPUFLAG_ENERGY_EFF, /**< ENERGY_EFF */ 8499a2dd95SBruce Richardson 8599a2dd95SBruce Richardson /* (EAX 07h, ECX 0h) EBX features */ 8699a2dd95SBruce Richardson RTE_CPUFLAG_FSGSBASE, /**< FSGSBASE */ 8799a2dd95SBruce Richardson RTE_CPUFLAG_BMI1, /**< BMI1 */ 8899a2dd95SBruce Richardson RTE_CPUFLAG_HLE, /**< Hardware Lock elision */ 8999a2dd95SBruce Richardson RTE_CPUFLAG_AVX2, /**< AVX2 */ 9099a2dd95SBruce Richardson RTE_CPUFLAG_SMEP, /**< SMEP */ 9199a2dd95SBruce Richardson RTE_CPUFLAG_BMI2, /**< BMI2 */ 9299a2dd95SBruce Richardson RTE_CPUFLAG_ERMS, /**< ERMS */ 9399a2dd95SBruce Richardson RTE_CPUFLAG_INVPCID, /**< INVPCID */ 9499a2dd95SBruce Richardson RTE_CPUFLAG_RTM, /**< Transactional memory */ 9599a2dd95SBruce Richardson RTE_CPUFLAG_AVX512F, /**< AVX512F */ 9699a2dd95SBruce Richardson RTE_CPUFLAG_RDSEED, /**< RDSEED instruction */ 9799a2dd95SBruce Richardson 9899a2dd95SBruce Richardson /* (EAX 80000001h) ECX features */ 9999a2dd95SBruce Richardson RTE_CPUFLAG_LAHF_SAHF, /**< LAHF_SAHF */ 10099a2dd95SBruce Richardson RTE_CPUFLAG_LZCNT, /**< LZCNT */ 10199a2dd95SBruce Richardson 10299a2dd95SBruce Richardson /* (EAX 80000001h) EDX features */ 10399a2dd95SBruce Richardson RTE_CPUFLAG_SYSCALL, /**< SYSCALL */ 10499a2dd95SBruce Richardson RTE_CPUFLAG_XD, /**< XD */ 10599a2dd95SBruce Richardson RTE_CPUFLAG_1GB_PG, /**< 1GB_PG */ 10699a2dd95SBruce Richardson RTE_CPUFLAG_RDTSCP, /**< RDTSCP */ 10799a2dd95SBruce Richardson RTE_CPUFLAG_EM64T, /**< EM64T */ 10899a2dd95SBruce Richardson 10999a2dd95SBruce Richardson /* (EAX 80000007h) EDX features */ 11099a2dd95SBruce Richardson RTE_CPUFLAG_INVTSC, /**< INVTSC */ 11199a2dd95SBruce Richardson 11299a2dd95SBruce Richardson RTE_CPUFLAG_AVX512DQ, /**< AVX512 Doubleword and Quadword */ 11399a2dd95SBruce Richardson RTE_CPUFLAG_AVX512IFMA, /**< AVX512 Integer Fused Multiply-Add */ 11499a2dd95SBruce Richardson RTE_CPUFLAG_AVX512CD, /**< AVX512 Conflict Detection*/ 11599a2dd95SBruce Richardson RTE_CPUFLAG_AVX512BW, /**< AVX512 Byte and Word */ 11699a2dd95SBruce Richardson RTE_CPUFLAG_AVX512VL, /**< AVX512 Vector Length */ 11799a2dd95SBruce Richardson RTE_CPUFLAG_AVX512VBMI, /**< AVX512 Vector Bit Manipulation */ 11899a2dd95SBruce Richardson RTE_CPUFLAG_AVX512VBMI2, /**< AVX512 Vector Bit Manipulation 2 */ 11999a2dd95SBruce Richardson RTE_CPUFLAG_GFNI, /**< Galois Field New Instructions */ 12099a2dd95SBruce Richardson RTE_CPUFLAG_VAES, /**< Vector AES */ 12199a2dd95SBruce Richardson RTE_CPUFLAG_VPCLMULQDQ, /**< Vector Carry-less Multiply */ 12299a2dd95SBruce Richardson RTE_CPUFLAG_AVX512VNNI, 12399a2dd95SBruce Richardson /**< AVX512 Vector Neural Network Instructions */ 12499a2dd95SBruce Richardson RTE_CPUFLAG_AVX512BITALG, /**< AVX512 Bit Algorithms */ 12599a2dd95SBruce Richardson RTE_CPUFLAG_AVX512VPOPCNTDQ, /**< AVX512 Vector Popcount */ 12699a2dd95SBruce Richardson RTE_CPUFLAG_CLDEMOTE, /**< Cache Line Demote */ 12799a2dd95SBruce Richardson RTE_CPUFLAG_MOVDIRI, /**< Direct Store Instructions */ 12899a2dd95SBruce Richardson RTE_CPUFLAG_MOVDIR64B, /**< Direct Store Instructions 64B */ 12999a2dd95SBruce Richardson RTE_CPUFLAG_AVX512VP2INTERSECT, /**< AVX512 Two Register Intersection */ 13099a2dd95SBruce Richardson 13199a2dd95SBruce Richardson RTE_CPUFLAG_WAITPKG, /**< UMONITOR/UMWAIT/TPAUSE */ 132*c359a72fSSivaprasad Tummala RTE_CPUFLAG_MONITORX, /**< MONITORX */ 13399a2dd95SBruce Richardson }; 13499a2dd95SBruce Richardson 13599a2dd95SBruce Richardson #include "generic/rte_cpuflags.h" 13699a2dd95SBruce Richardson 13799a2dd95SBruce Richardson #endif /* _RTE_CPUFLAGS_X86_64_H_ */ 138