191e581e5SChengwen Feng /* SPDX-License-Identifier: BSD-3-Clause 291e581e5SChengwen Feng * Copyright(c) 2021 HiSilicon Limited 391e581e5SChengwen Feng * Copyright(c) 2021 Intel Corporation 491e581e5SChengwen Feng */ 591e581e5SChengwen Feng 691e581e5SChengwen Feng #ifndef RTE_DMADEV_CORE_H 791e581e5SChengwen Feng #define RTE_DMADEV_CORE_H 891e581e5SChengwen Feng 991e581e5SChengwen Feng /** 1091e581e5SChengwen Feng * @file 1191e581e5SChengwen Feng * 1291e581e5SChengwen Feng * DMA Device internal header. 1391e581e5SChengwen Feng * 1491e581e5SChengwen Feng * This header contains internal data types which are used by dataplane inline 1591e581e5SChengwen Feng * function. 1691e581e5SChengwen Feng * 1791e581e5SChengwen Feng * Applications should not use these functions directly. 1891e581e5SChengwen Feng */ 1991e581e5SChengwen Feng 2091e581e5SChengwen Feng /** @internal Used to enqueue a copy operation. */ 2191e581e5SChengwen Feng typedef int (*rte_dma_copy_t)(void *dev_private, uint16_t vchan, 2291e581e5SChengwen Feng rte_iova_t src, rte_iova_t dst, 2391e581e5SChengwen Feng uint32_t length, uint64_t flags); 2491e581e5SChengwen Feng 2591e581e5SChengwen Feng /** @internal Used to enqueue a scatter-gather list copy operation. */ 2691e581e5SChengwen Feng typedef int (*rte_dma_copy_sg_t)(void *dev_private, uint16_t vchan, 2791e581e5SChengwen Feng const struct rte_dma_sge *src, 2891e581e5SChengwen Feng const struct rte_dma_sge *dst, 2991e581e5SChengwen Feng uint16_t nb_src, uint16_t nb_dst, 3091e581e5SChengwen Feng uint64_t flags); 3191e581e5SChengwen Feng 3291e581e5SChengwen Feng /** @internal Used to enqueue a fill operation. */ 3391e581e5SChengwen Feng typedef int (*rte_dma_fill_t)(void *dev_private, uint16_t vchan, 3491e581e5SChengwen Feng uint64_t pattern, rte_iova_t dst, 3591e581e5SChengwen Feng uint32_t length, uint64_t flags); 3691e581e5SChengwen Feng 3791e581e5SChengwen Feng /** @internal Used to trigger hardware to begin working. */ 3891e581e5SChengwen Feng typedef int (*rte_dma_submit_t)(void *dev_private, uint16_t vchan); 3991e581e5SChengwen Feng 4091e581e5SChengwen Feng /** @internal Used to return number of successful completed operations. */ 4191e581e5SChengwen Feng typedef uint16_t (*rte_dma_completed_t)(void *dev_private, 4291e581e5SChengwen Feng uint16_t vchan, const uint16_t nb_cpls, 4391e581e5SChengwen Feng uint16_t *last_idx, bool *has_error); 4491e581e5SChengwen Feng 4591e581e5SChengwen Feng /** @internal Used to return number of completed operations. */ 4691e581e5SChengwen Feng typedef uint16_t (*rte_dma_completed_status_t)(void *dev_private, 4791e581e5SChengwen Feng uint16_t vchan, const uint16_t nb_cpls, 4891e581e5SChengwen Feng uint16_t *last_idx, enum rte_dma_status_code *status); 4991e581e5SChengwen Feng 50ea8cf0f8SKevin Laatz /** @internal Used to check the remaining space in descriptor ring. */ 51ea8cf0f8SKevin Laatz typedef uint16_t (*rte_dma_burst_capacity_t)(const void *dev_private, uint16_t vchan); 52ea8cf0f8SKevin Laatz 5391e581e5SChengwen Feng /** 5491e581e5SChengwen Feng * @internal 5591e581e5SChengwen Feng * Fast-path dmadev functions and related data are hold in a flat array. 5691e581e5SChengwen Feng * One entry per dmadev. 5791e581e5SChengwen Feng * 5891e581e5SChengwen Feng * This structure occupy exactly 128B which reserve space for future IO 5991e581e5SChengwen Feng * functions. 6091e581e5SChengwen Feng * 6191e581e5SChengwen Feng * The 'dev_private' field was placed in the first cache line to optimize 62f8dbaebbSSean Morrissey * performance because the PMD mainly depends on this field. 6391e581e5SChengwen Feng */ 64*c6552d9aSTyler Retzlaff struct __rte_cache_aligned rte_dma_fp_object { 6591e581e5SChengwen Feng /** PMD-specific private data. The driver should copy 662ece65f0SChengwen Feng * rte_dma_dev.data->dev_private to this field during initialization. 6791e581e5SChengwen Feng */ 6891e581e5SChengwen Feng void *dev_private; 6991e581e5SChengwen Feng rte_dma_copy_t copy; 7091e581e5SChengwen Feng rte_dma_copy_sg_t copy_sg; 7191e581e5SChengwen Feng rte_dma_fill_t fill; 7291e581e5SChengwen Feng rte_dma_submit_t submit; 7391e581e5SChengwen Feng rte_dma_completed_t completed; 7491e581e5SChengwen Feng rte_dma_completed_status_t completed_status; 75ea8cf0f8SKevin Laatz rte_dma_burst_capacity_t burst_capacity; 76*c6552d9aSTyler Retzlaff }; 7791e581e5SChengwen Feng 7891e581e5SChengwen Feng extern struct rte_dma_fp_object *rte_dma_fp_objs; 7991e581e5SChengwen Feng 8091e581e5SChengwen Feng #endif /* RTE_DMADEV_CORE_H */ 81