1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2020 Mellanox Technologies, Ltd 3 */ 4 5 #include <rte_malloc.h> 6 #include <rte_log.h> 7 #include <rte_errno.h> 8 #include <rte_bus_pci.h> 9 #include <rte_pci.h> 10 #include <rte_regexdev.h> 11 #include <rte_regexdev_core.h> 12 #include <rte_regexdev_driver.h> 13 14 #include <mlx5_glue.h> 15 #include <mlx5_devx_cmds.h> 16 #include <mlx5_prm.h> 17 18 #include "mlx5_regex.h" 19 #include "mlx5_regex_utils.h" 20 #include "mlx5_rxp_csrs.h" 21 22 int mlx5_regex_logtype; 23 24 const struct rte_regexdev_ops mlx5_regexdev_ops = { 25 .dev_info_get = mlx5_regex_info_get, 26 .dev_configure = mlx5_regex_configure, 27 .dev_db_import = mlx5_regex_rules_db_import, 28 .dev_qp_setup = mlx5_regex_qp_setup, 29 }; 30 31 static struct ibv_device * 32 mlx5_regex_get_ib_device_match(struct rte_pci_addr *addr) 33 { 34 int n; 35 struct ibv_device **ibv_list = mlx5_glue->get_device_list(&n); 36 struct ibv_device *ibv_match = NULL; 37 38 if (!ibv_list) { 39 rte_errno = ENOSYS; 40 return NULL; 41 } 42 while (n-- > 0) { 43 struct rte_pci_addr pci_addr; 44 45 DRV_LOG(DEBUG, "Checking device \"%s\"..", ibv_list[n]->name); 46 if (mlx5_dev_to_pci_addr(ibv_list[n]->ibdev_path, &pci_addr)) 47 continue; 48 if (rte_pci_addr_cmp(addr, &pci_addr)) 49 continue; 50 ibv_match = ibv_list[n]; 51 break; 52 } 53 if (!ibv_match) 54 rte_errno = ENOENT; 55 mlx5_glue->free_device_list(ibv_list); 56 return ibv_match; 57 } 58 static int 59 mlx5_regex_engines_status(struct ibv_context *ctx, int num_engines) 60 { 61 uint32_t fpga_ident = 0; 62 int err; 63 int i; 64 65 for (i = 0; i < num_engines; i++) { 66 err = mlx5_devx_regex_register_read(ctx, i, 67 MLX5_RXP_CSR_IDENTIFIER, 68 &fpga_ident); 69 fpga_ident = (fpga_ident & (0x0000FFFF)); 70 if (err || fpga_ident != MLX5_RXP_IDENTIFIER) { 71 DRV_LOG(ERR, "Failed setup RXP %d err %d database " 72 "memory 0x%x", i, err, fpga_ident); 73 if (!err) 74 err = EINVAL; 75 return err; 76 } 77 } 78 return 0; 79 } 80 81 static void 82 mlx5_regex_get_name(char *name, struct rte_pci_device *pci_dev __rte_unused) 83 { 84 sprintf(name, "mlx5_regex_%02x:%02x.%02x", pci_dev->addr.bus, 85 pci_dev->addr.devid, pci_dev->addr.function); 86 } 87 88 static int 89 mlx5_regex_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 90 struct rte_pci_device *pci_dev) 91 { 92 struct ibv_device *ibv; 93 struct mlx5_regex_priv *priv = NULL; 94 struct ibv_context *ctx = NULL; 95 struct mlx5_hca_attr attr; 96 char name[RTE_REGEXDEV_NAME_MAX_LEN]; 97 int ret; 98 99 ibv = mlx5_regex_get_ib_device_match(&pci_dev->addr); 100 if (!ibv) { 101 DRV_LOG(ERR, "No matching IB device for PCI slot " 102 PCI_PRI_FMT ".", pci_dev->addr.domain, 103 pci_dev->addr.bus, pci_dev->addr.devid, 104 pci_dev->addr.function); 105 return -rte_errno; 106 } 107 DRV_LOG(INFO, "PCI information matches for device \"%s\".", 108 ibv->name); 109 ctx = mlx5_glue->dv_open_device(ibv); 110 if (!ctx) { 111 DRV_LOG(ERR, "Failed to open IB device \"%s\".", ibv->name); 112 rte_errno = ENODEV; 113 return -rte_errno; 114 } 115 ret = mlx5_devx_cmd_query_hca_attr(ctx, &attr); 116 if (ret) { 117 DRV_LOG(ERR, "Unable to read HCA capabilities."); 118 rte_errno = ENOTSUP; 119 goto error; 120 } else if (!attr.regex || attr.regexp_num_of_engines == 0) { 121 DRV_LOG(ERR, "Not enough capabilities to support RegEx, maybe " 122 "old FW/OFED version?"); 123 rte_errno = ENOTSUP; 124 goto error; 125 } 126 if (mlx5_regex_engines_status(ctx, 2)) { 127 DRV_LOG(ERR, "RegEx engine error."); 128 rte_errno = ENOMEM; 129 goto error; 130 } 131 priv = rte_zmalloc("mlx5 regex device private", sizeof(*priv), 132 RTE_CACHE_LINE_SIZE); 133 if (!priv) { 134 DRV_LOG(ERR, "Failed to allocate private memory."); 135 rte_errno = ENOMEM; 136 goto error; 137 } 138 priv->ctx = ctx; 139 priv->nb_engines = 2; /* attr.regexp_num_of_engines */ 140 /* Default RXP programming mode to Shared. */ 141 priv->prog_mode = MLX5_RXP_SHARED_PROG_MODE; 142 mlx5_regex_get_name(name, pci_dev); 143 priv->regexdev = rte_regexdev_register(name); 144 if (priv->regexdev == NULL) { 145 DRV_LOG(ERR, "Failed to register RegEx device."); 146 rte_errno = rte_errno ? rte_errno : EINVAL; 147 goto error; 148 } 149 ret = mlx5_glue->devx_query_eqn(ctx, 0, &priv->eqn); 150 if (ret) { 151 DRV_LOG(ERR, "can't query event queue number."); 152 rte_errno = ENOMEM; 153 goto error; 154 } 155 priv->uar = mlx5_glue->devx_alloc_uar(ctx, 0); 156 if (!priv->uar) { 157 DRV_LOG(ERR, "can't allocate uar."); 158 rte_errno = ENOMEM; 159 goto error; 160 } 161 priv->pd = mlx5_glue->alloc_pd(ctx); 162 if (!priv->pd) { 163 DRV_LOG(ERR, "can't allocate pd."); 164 rte_errno = ENOMEM; 165 goto error; 166 } 167 priv->regexdev->dev_ops = &mlx5_regexdev_ops; 168 priv->regexdev->enqueue = mlx5_regexdev_enqueue; 169 priv->regexdev->dequeue = mlx5_regexdev_dequeue; 170 priv->regexdev->device = (struct rte_device *)pci_dev; 171 priv->regexdev->data->dev_private = priv; 172 priv->regexdev->state = RTE_REGEXDEV_READY; 173 return 0; 174 175 error: 176 if (priv->pd) 177 mlx5_glue->dealloc_pd(priv->pd); 178 if (priv->uar) 179 mlx5_glue->devx_free_uar(priv->uar); 180 if (priv->regexdev) 181 rte_regexdev_unregister(priv->regexdev); 182 if (ctx) 183 mlx5_glue->close_device(ctx); 184 if (priv) 185 rte_free(priv); 186 return -rte_errno; 187 } 188 189 static int 190 mlx5_regex_pci_remove(struct rte_pci_device *pci_dev) 191 { 192 char name[RTE_REGEXDEV_NAME_MAX_LEN]; 193 struct rte_regexdev *dev; 194 struct mlx5_regex_priv *priv = NULL; 195 196 mlx5_regex_get_name(name, pci_dev); 197 dev = rte_regexdev_get_device_by_name(name); 198 if (!dev) 199 return 0; 200 priv = dev->data->dev_private; 201 if (priv) { 202 if (priv->pd) 203 mlx5_glue->dealloc_pd(priv->pd); 204 if (priv->uar) 205 mlx5_glue->devx_free_uar(priv->uar); 206 if (priv->regexdev) 207 rte_regexdev_unregister(priv->regexdev); 208 if (priv->ctx) 209 mlx5_glue->close_device(priv->ctx); 210 if (priv->regexdev) 211 rte_regexdev_unregister(priv->regexdev); 212 rte_free(priv); 213 } 214 return 0; 215 } 216 217 static const struct rte_pci_id mlx5_regex_pci_id_map[] = { 218 { 219 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, 220 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF) 221 }, 222 { 223 .vendor_id = 0 224 } 225 }; 226 227 static struct rte_pci_driver mlx5_regex_driver = { 228 .driver = { 229 .name = "mlx5_regex", 230 }, 231 .id_table = mlx5_regex_pci_id_map, 232 .probe = mlx5_regex_pci_probe, 233 .remove = mlx5_regex_pci_remove, 234 .drv_flags = 0, 235 }; 236 237 RTE_INIT(rte_mlx5_regex_init) 238 { 239 if (mlx5_glue) 240 rte_pci_register(&mlx5_regex_driver); 241 } 242 243 RTE_LOG_REGISTER(mlx5_regex_logtype, pmd.regex.mlx5, NOTICE) 244 RTE_PMD_EXPORT_NAME(net_mlx5_regex, __COUNTER__); 245 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5_regex, mlx5_regex_pci_id_map); 246 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5_regex, "* ib_uverbs & mlx5_core & mlx5_ib"); 247